fsl-diu-fb.c 47 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * Freescale DIU Frame Buffer device driver
  5. *
  6. * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
  7. * Paul Widmer <paul.widmer@freescale.com>
  8. * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
  9. * York Sun <yorksun@freescale.com>
  10. *
  11. * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/string.h>
  23. #include <linux/slab.h>
  24. #include <linux/fb.h>
  25. #include <linux/init.h>
  26. #include <linux/dma-mapping.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/vmalloc.h>
  32. #include <sysdev/fsl_soc.h>
  33. #include <linux/fsl-diu-fb.h>
  34. #include "edid.h"
  35. /*
  36. * These parameters give default parameters
  37. * for video output 1024x768,
  38. * FIXME - change timing to proper amounts
  39. * hsync 31.5kHz, vsync 60Hz
  40. */
  41. static struct fb_videomode __devinitdata fsl_diu_default_mode = {
  42. .refresh = 60,
  43. .xres = 1024,
  44. .yres = 768,
  45. .pixclock = 15385,
  46. .left_margin = 160,
  47. .right_margin = 24,
  48. .upper_margin = 29,
  49. .lower_margin = 3,
  50. .hsync_len = 136,
  51. .vsync_len = 6,
  52. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  53. .vmode = FB_VMODE_NONINTERLACED
  54. };
  55. static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
  56. {
  57. .name = "1024x768-60",
  58. .refresh = 60,
  59. .xres = 1024,
  60. .yres = 768,
  61. .pixclock = 15385,
  62. .left_margin = 160,
  63. .right_margin = 24,
  64. .upper_margin = 29,
  65. .lower_margin = 3,
  66. .hsync_len = 136,
  67. .vsync_len = 6,
  68. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. .vmode = FB_VMODE_NONINTERLACED
  70. },
  71. {
  72. .name = "1024x768-70",
  73. .refresh = 70,
  74. .xres = 1024,
  75. .yres = 768,
  76. .pixclock = 16886,
  77. .left_margin = 3,
  78. .right_margin = 3,
  79. .upper_margin = 2,
  80. .lower_margin = 2,
  81. .hsync_len = 40,
  82. .vsync_len = 18,
  83. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  84. .vmode = FB_VMODE_NONINTERLACED
  85. },
  86. {
  87. .name = "1024x768-75",
  88. .refresh = 75,
  89. .xres = 1024,
  90. .yres = 768,
  91. .pixclock = 15009,
  92. .left_margin = 3,
  93. .right_margin = 3,
  94. .upper_margin = 2,
  95. .lower_margin = 2,
  96. .hsync_len = 80,
  97. .vsync_len = 32,
  98. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  99. .vmode = FB_VMODE_NONINTERLACED
  100. },
  101. {
  102. .name = "1280x1024-60",
  103. .refresh = 60,
  104. .xres = 1280,
  105. .yres = 1024,
  106. .pixclock = 9375,
  107. .left_margin = 38,
  108. .right_margin = 128,
  109. .upper_margin = 2,
  110. .lower_margin = 7,
  111. .hsync_len = 216,
  112. .vsync_len = 37,
  113. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  114. .vmode = FB_VMODE_NONINTERLACED
  115. },
  116. {
  117. .name = "1280x1024-70",
  118. .refresh = 70,
  119. .xres = 1280,
  120. .yres = 1024,
  121. .pixclock = 9380,
  122. .left_margin = 6,
  123. .right_margin = 6,
  124. .upper_margin = 4,
  125. .lower_margin = 4,
  126. .hsync_len = 60,
  127. .vsync_len = 94,
  128. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  129. .vmode = FB_VMODE_NONINTERLACED
  130. },
  131. {
  132. .name = "1280x1024-75",
  133. .refresh = 75,
  134. .xres = 1280,
  135. .yres = 1024,
  136. .pixclock = 9380,
  137. .left_margin = 6,
  138. .right_margin = 6,
  139. .upper_margin = 4,
  140. .lower_margin = 4,
  141. .hsync_len = 60,
  142. .vsync_len = 15,
  143. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  144. .vmode = FB_VMODE_NONINTERLACED
  145. },
  146. {
  147. .name = "320x240", /* for AOI only */
  148. .refresh = 60,
  149. .xres = 320,
  150. .yres = 240,
  151. .pixclock = 15385,
  152. .left_margin = 0,
  153. .right_margin = 0,
  154. .upper_margin = 0,
  155. .lower_margin = 0,
  156. .hsync_len = 0,
  157. .vsync_len = 0,
  158. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  159. .vmode = FB_VMODE_NONINTERLACED
  160. },
  161. {
  162. .name = "1280x480-60",
  163. .refresh = 60,
  164. .xres = 1280,
  165. .yres = 480,
  166. .pixclock = 18939,
  167. .left_margin = 353,
  168. .right_margin = 47,
  169. .upper_margin = 39,
  170. .lower_margin = 4,
  171. .hsync_len = 8,
  172. .vsync_len = 2,
  173. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  174. .vmode = FB_VMODE_NONINTERLACED
  175. },
  176. };
  177. static char *fb_mode = "1024x768-32@60";
  178. static unsigned long default_bpp = 32;
  179. static enum fsl_diu_monitor_port monitor_port;
  180. static char *monitor_string;
  181. #if defined(CONFIG_NOT_COHERENT_CACHE)
  182. static u8 *coherence_data;
  183. static size_t coherence_data_size;
  184. static unsigned int d_cache_line_size;
  185. #endif
  186. static DEFINE_SPINLOCK(diu_lock);
  187. struct fsl_diu_data {
  188. struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
  189. /*FSL_AOI_NUM has one dummy AOI */
  190. struct device_attribute dev_attr;
  191. struct diu_ad *dummy_ad;
  192. void *dummy_aoi_virt;
  193. unsigned int irq;
  194. int fb_enabled;
  195. enum fsl_diu_monitor_port monitor_port;
  196. };
  197. struct mfb_info {
  198. int index;
  199. int type;
  200. char *id;
  201. int registered;
  202. int blank;
  203. unsigned long pseudo_palette[16];
  204. struct diu_ad *ad;
  205. int cursor_reset;
  206. unsigned char g_alpha;
  207. unsigned int count;
  208. int x_aoi_d; /* aoi display x offset to physical screen */
  209. int y_aoi_d; /* aoi display y offset to physical screen */
  210. struct fsl_diu_data *parent;
  211. u8 *edid_data;
  212. };
  213. static struct mfb_info mfb_template[] = {
  214. { /* AOI 0 for plane 0 */
  215. .index = 0,
  216. .type = MFB_TYPE_OUTPUT,
  217. .id = "Panel0",
  218. .registered = 0,
  219. .count = 0,
  220. .x_aoi_d = 0,
  221. .y_aoi_d = 0,
  222. },
  223. { /* AOI 0 for plane 1 */
  224. .index = 1,
  225. .type = MFB_TYPE_OUTPUT,
  226. .id = "Panel1 AOI0",
  227. .registered = 0,
  228. .g_alpha = 0xff,
  229. .count = 0,
  230. .x_aoi_d = 0,
  231. .y_aoi_d = 0,
  232. },
  233. { /* AOI 1 for plane 1 */
  234. .index = 2,
  235. .type = MFB_TYPE_OUTPUT,
  236. .id = "Panel1 AOI1",
  237. .registered = 0,
  238. .g_alpha = 0xff,
  239. .count = 0,
  240. .x_aoi_d = 0,
  241. .y_aoi_d = 480,
  242. },
  243. { /* AOI 0 for plane 2 */
  244. .index = 3,
  245. .type = MFB_TYPE_OUTPUT,
  246. .id = "Panel2 AOI0",
  247. .registered = 0,
  248. .g_alpha = 0xff,
  249. .count = 0,
  250. .x_aoi_d = 640,
  251. .y_aoi_d = 0,
  252. },
  253. { /* AOI 1 for plane 2 */
  254. .index = 4,
  255. .type = MFB_TYPE_OUTPUT,
  256. .id = "Panel2 AOI1",
  257. .registered = 0,
  258. .g_alpha = 0xff,
  259. .count = 0,
  260. .x_aoi_d = 640,
  261. .y_aoi_d = 480,
  262. },
  263. };
  264. static struct diu_hw dr = {
  265. .mode = MFB_MODE1,
  266. .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
  267. };
  268. static struct diu_pool pool;
  269. /**
  270. * fsl_diu_name_to_port - convert a port name to a monitor port enum
  271. *
  272. * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
  273. * the enum fsl_diu_monitor_port that corresponds to that string.
  274. *
  275. * For compatibility with older versions, a number ("0", "1", or "2") is also
  276. * supported.
  277. *
  278. * If the string is unknown, DVI is assumed.
  279. *
  280. * If the particular port is not supported by the platform, another port
  281. * (platform-specific) is chosen instead.
  282. */
  283. static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
  284. {
  285. enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
  286. unsigned long val;
  287. if (s) {
  288. if (!strict_strtoul(s, 10, &val) && (val <= 2))
  289. port = (enum fsl_diu_monitor_port) val;
  290. else if (strncmp(s, "lvds", 4) == 0)
  291. port = FSL_DIU_PORT_LVDS;
  292. else if (strncmp(s, "dlvds", 5) == 0)
  293. port = FSL_DIU_PORT_DLVDS;
  294. }
  295. return diu_ops.valid_monitor_port(port);
  296. }
  297. /**
  298. * fsl_diu_alloc - allocate memory for the DIU
  299. * @size: number of bytes to allocate
  300. * @param: returned physical address of memory
  301. *
  302. * This function allocates a physically-contiguous block of memory.
  303. */
  304. static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
  305. {
  306. void *virt;
  307. pr_debug("size=%zu\n", size);
  308. virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
  309. if (virt) {
  310. *phys = virt_to_phys(virt);
  311. pr_debug("virt=%p phys=%llx\n", virt,
  312. (unsigned long long)*phys);
  313. }
  314. return virt;
  315. }
  316. /**
  317. * fsl_diu_free - release DIU memory
  318. * @virt: pointer returned by fsl_diu_alloc()
  319. * @size: number of bytes allocated by fsl_diu_alloc()
  320. *
  321. * This function releases memory allocated by fsl_diu_alloc().
  322. */
  323. static void fsl_diu_free(void *virt, size_t size)
  324. {
  325. pr_debug("virt=%p size=%zu\n", virt, size);
  326. if (virt && size)
  327. free_pages_exact(virt, size);
  328. }
  329. /*
  330. * Workaround for failed writing desc register of planes.
  331. * Needed with MPC5121 DIU rev 2.0 silicon.
  332. */
  333. void wr_reg_wa(u32 *reg, u32 val)
  334. {
  335. do {
  336. out_be32(reg, val);
  337. } while (in_be32(reg) != val);
  338. }
  339. static int fsl_diu_enable_panel(struct fb_info *info)
  340. {
  341. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  342. struct diu *hw = dr.diu_reg;
  343. struct diu_ad *ad = mfbi->ad;
  344. struct fsl_diu_data *machine_data = mfbi->parent;
  345. int res = 0;
  346. pr_debug("enable_panel index %d\n", mfbi->index);
  347. if (mfbi->type != MFB_TYPE_OFF) {
  348. switch (mfbi->index) {
  349. case 0: /* plane 0 */
  350. if (hw->desc[0] != ad->paddr)
  351. wr_reg_wa(&hw->desc[0], ad->paddr);
  352. break;
  353. case 1: /* plane 1 AOI 0 */
  354. cmfbi = machine_data->fsl_diu_info[2]->par;
  355. if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
  356. if (cmfbi->count > 0) /* AOI1 open */
  357. ad->next_ad =
  358. cpu_to_le32(cmfbi->ad->paddr);
  359. else
  360. ad->next_ad = 0;
  361. wr_reg_wa(&hw->desc[1], ad->paddr);
  362. }
  363. break;
  364. case 3: /* plane 2 AOI 0 */
  365. cmfbi = machine_data->fsl_diu_info[4]->par;
  366. if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
  367. if (cmfbi->count > 0) /* AOI1 open */
  368. ad->next_ad =
  369. cpu_to_le32(cmfbi->ad->paddr);
  370. else
  371. ad->next_ad = 0;
  372. wr_reg_wa(&hw->desc[2], ad->paddr);
  373. }
  374. break;
  375. case 2: /* plane 1 AOI 1 */
  376. pmfbi = machine_data->fsl_diu_info[1]->par;
  377. ad->next_ad = 0;
  378. if (hw->desc[1] == machine_data->dummy_ad->paddr)
  379. wr_reg_wa(&hw->desc[1], ad->paddr);
  380. else /* AOI0 open */
  381. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  382. break;
  383. case 4: /* plane 2 AOI 1 */
  384. pmfbi = machine_data->fsl_diu_info[3]->par;
  385. ad->next_ad = 0;
  386. if (hw->desc[2] == machine_data->dummy_ad->paddr)
  387. wr_reg_wa(&hw->desc[2], ad->paddr);
  388. else /* AOI0 was open */
  389. pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
  390. break;
  391. default:
  392. res = -EINVAL;
  393. break;
  394. }
  395. } else
  396. res = -EINVAL;
  397. return res;
  398. }
  399. static int fsl_diu_disable_panel(struct fb_info *info)
  400. {
  401. struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
  402. struct diu *hw = dr.diu_reg;
  403. struct diu_ad *ad = mfbi->ad;
  404. struct fsl_diu_data *machine_data = mfbi->parent;
  405. int res = 0;
  406. switch (mfbi->index) {
  407. case 0: /* plane 0 */
  408. if (hw->desc[0] != machine_data->dummy_ad->paddr)
  409. wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
  410. break;
  411. case 1: /* plane 1 AOI 0 */
  412. cmfbi = machine_data->fsl_diu_info[2]->par;
  413. if (cmfbi->count > 0) /* AOI1 is open */
  414. wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
  415. /* move AOI1 to the first */
  416. else /* AOI1 was closed */
  417. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  418. /* close AOI 0 */
  419. break;
  420. case 3: /* plane 2 AOI 0 */
  421. cmfbi = machine_data->fsl_diu_info[4]->par;
  422. if (cmfbi->count > 0) /* AOI1 is open */
  423. wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
  424. /* move AOI1 to the first */
  425. else /* AOI1 was closed */
  426. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  427. /* close AOI 0 */
  428. break;
  429. case 2: /* plane 1 AOI 1 */
  430. pmfbi = machine_data->fsl_diu_info[1]->par;
  431. if (hw->desc[1] != ad->paddr) {
  432. /* AOI1 is not the first in the chain */
  433. if (pmfbi->count > 0)
  434. /* AOI0 is open, must be the first */
  435. pmfbi->ad->next_ad = 0;
  436. } else /* AOI1 is the first in the chain */
  437. wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
  438. /* close AOI 1 */
  439. break;
  440. case 4: /* plane 2 AOI 1 */
  441. pmfbi = machine_data->fsl_diu_info[3]->par;
  442. if (hw->desc[2] != ad->paddr) {
  443. /* AOI1 is not the first in the chain */
  444. if (pmfbi->count > 0)
  445. /* AOI0 is open, must be the first */
  446. pmfbi->ad->next_ad = 0;
  447. } else /* AOI1 is the first in the chain */
  448. wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
  449. /* close AOI 1 */
  450. break;
  451. default:
  452. res = -EINVAL;
  453. break;
  454. }
  455. return res;
  456. }
  457. static void enable_lcdc(struct fb_info *info)
  458. {
  459. struct diu *hw = dr.diu_reg;
  460. struct mfb_info *mfbi = info->par;
  461. struct fsl_diu_data *machine_data = mfbi->parent;
  462. if (!machine_data->fb_enabled) {
  463. out_be32(&hw->diu_mode, dr.mode);
  464. machine_data->fb_enabled++;
  465. }
  466. }
  467. static void disable_lcdc(struct fb_info *info)
  468. {
  469. struct diu *hw = dr.diu_reg;
  470. struct mfb_info *mfbi = info->par;
  471. struct fsl_diu_data *machine_data = mfbi->parent;
  472. if (machine_data->fb_enabled) {
  473. out_be32(&hw->diu_mode, 0);
  474. machine_data->fb_enabled = 0;
  475. }
  476. }
  477. static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
  478. struct fb_info *info)
  479. {
  480. struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
  481. struct fsl_diu_data *machine_data = mfbi->parent;
  482. int available_height, upper_aoi_bottom, index = mfbi->index;
  483. int lower_aoi_is_open, upper_aoi_is_open;
  484. __u32 base_plane_width, base_plane_height, upper_aoi_height;
  485. base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
  486. base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
  487. if (mfbi->x_aoi_d < 0)
  488. mfbi->x_aoi_d = 0;
  489. if (mfbi->y_aoi_d < 0)
  490. mfbi->y_aoi_d = 0;
  491. switch (index) {
  492. case 0:
  493. if (mfbi->x_aoi_d != 0)
  494. mfbi->x_aoi_d = 0;
  495. if (mfbi->y_aoi_d != 0)
  496. mfbi->y_aoi_d = 0;
  497. break;
  498. case 1: /* AOI 0 */
  499. case 3:
  500. lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
  501. lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
  502. if (var->xres > base_plane_width)
  503. var->xres = base_plane_width;
  504. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  505. mfbi->x_aoi_d = base_plane_width - var->xres;
  506. if (lower_aoi_is_open)
  507. available_height = lower_aoi_mfbi->y_aoi_d;
  508. else
  509. available_height = base_plane_height;
  510. if (var->yres > available_height)
  511. var->yres = available_height;
  512. if ((mfbi->y_aoi_d + var->yres) > available_height)
  513. mfbi->y_aoi_d = available_height - var->yres;
  514. break;
  515. case 2: /* AOI 1 */
  516. case 4:
  517. upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
  518. upper_aoi_height =
  519. machine_data->fsl_diu_info[index-1]->var.yres;
  520. upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
  521. upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
  522. if (var->xres > base_plane_width)
  523. var->xres = base_plane_width;
  524. if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
  525. mfbi->x_aoi_d = base_plane_width - var->xres;
  526. if (mfbi->y_aoi_d < 0)
  527. mfbi->y_aoi_d = 0;
  528. if (upper_aoi_is_open) {
  529. if (mfbi->y_aoi_d < upper_aoi_bottom)
  530. mfbi->y_aoi_d = upper_aoi_bottom;
  531. available_height = base_plane_height
  532. - upper_aoi_bottom;
  533. } else
  534. available_height = base_plane_height;
  535. if (var->yres > available_height)
  536. var->yres = available_height;
  537. if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
  538. mfbi->y_aoi_d = base_plane_height - var->yres;
  539. break;
  540. }
  541. }
  542. /*
  543. * Checks to see if the hardware supports the state requested by var passed
  544. * in. This function does not alter the hardware state! If the var passed in
  545. * is slightly off by what the hardware can support then we alter the var
  546. * PASSED in to what we can do. If the hardware doesn't support mode change
  547. * a -EINVAL will be returned by the upper layers.
  548. */
  549. static int fsl_diu_check_var(struct fb_var_screeninfo *var,
  550. struct fb_info *info)
  551. {
  552. pr_debug("check_var xres: %d\n", var->xres);
  553. pr_debug("check_var yres: %d\n", var->yres);
  554. if (var->xres_virtual < var->xres)
  555. var->xres_virtual = var->xres;
  556. if (var->yres_virtual < var->yres)
  557. var->yres_virtual = var->yres;
  558. if (var->xoffset < 0)
  559. var->xoffset = 0;
  560. if (var->yoffset < 0)
  561. var->yoffset = 0;
  562. if (var->xoffset + info->var.xres > info->var.xres_virtual)
  563. var->xoffset = info->var.xres_virtual - info->var.xres;
  564. if (var->yoffset + info->var.yres > info->var.yres_virtual)
  565. var->yoffset = info->var.yres_virtual - info->var.yres;
  566. if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
  567. (var->bits_per_pixel != 16))
  568. var->bits_per_pixel = default_bpp;
  569. switch (var->bits_per_pixel) {
  570. case 16:
  571. var->red.length = 5;
  572. var->red.offset = 11;
  573. var->red.msb_right = 0;
  574. var->green.length = 6;
  575. var->green.offset = 5;
  576. var->green.msb_right = 0;
  577. var->blue.length = 5;
  578. var->blue.offset = 0;
  579. var->blue.msb_right = 0;
  580. var->transp.length = 0;
  581. var->transp.offset = 0;
  582. var->transp.msb_right = 0;
  583. break;
  584. case 24:
  585. var->red.length = 8;
  586. var->red.offset = 0;
  587. var->red.msb_right = 0;
  588. var->green.length = 8;
  589. var->green.offset = 8;
  590. var->green.msb_right = 0;
  591. var->blue.length = 8;
  592. var->blue.offset = 16;
  593. var->blue.msb_right = 0;
  594. var->transp.length = 0;
  595. var->transp.offset = 0;
  596. var->transp.msb_right = 0;
  597. break;
  598. case 32:
  599. var->red.length = 8;
  600. var->red.offset = 16;
  601. var->red.msb_right = 0;
  602. var->green.length = 8;
  603. var->green.offset = 8;
  604. var->green.msb_right = 0;
  605. var->blue.length = 8;
  606. var->blue.offset = 0;
  607. var->blue.msb_right = 0;
  608. var->transp.length = 8;
  609. var->transp.offset = 24;
  610. var->transp.msb_right = 0;
  611. break;
  612. }
  613. var->height = -1;
  614. var->width = -1;
  615. var->grayscale = 0;
  616. /* Copy nonstd field to/from sync for fbset usage */
  617. var->sync |= var->nonstd;
  618. var->nonstd |= var->sync;
  619. adjust_aoi_size_position(var, info);
  620. return 0;
  621. }
  622. static void set_fix(struct fb_info *info)
  623. {
  624. struct fb_fix_screeninfo *fix = &info->fix;
  625. struct fb_var_screeninfo *var = &info->var;
  626. struct mfb_info *mfbi = info->par;
  627. strncpy(fix->id, mfbi->id, strlen(mfbi->id));
  628. fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
  629. fix->type = FB_TYPE_PACKED_PIXELS;
  630. fix->accel = FB_ACCEL_NONE;
  631. fix->visual = FB_VISUAL_TRUECOLOR;
  632. fix->xpanstep = 1;
  633. fix->ypanstep = 1;
  634. }
  635. static void update_lcdc(struct fb_info *info)
  636. {
  637. struct fb_var_screeninfo *var = &info->var;
  638. struct mfb_info *mfbi = info->par;
  639. struct fsl_diu_data *machine_data = mfbi->parent;
  640. struct diu *hw;
  641. int i, j;
  642. char __iomem *cursor_base, *gamma_table_base;
  643. u32 temp;
  644. hw = dr.diu_reg;
  645. if (mfbi->type == MFB_TYPE_OFF) {
  646. fsl_diu_disable_panel(info);
  647. return;
  648. }
  649. diu_ops.set_monitor_port(machine_data->monitor_port);
  650. gamma_table_base = pool.gamma.vaddr;
  651. cursor_base = pool.cursor.vaddr;
  652. /* Prep for DIU init - gamma table, cursor table */
  653. for (i = 0; i <= 2; i++)
  654. for (j = 0; j <= 255; j++)
  655. *gamma_table_base++ = j;
  656. diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
  657. pr_debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
  658. disable_lcdc(info);
  659. /* Program DIU registers */
  660. out_be32(&hw->gamma, pool.gamma.paddr);
  661. out_be32(&hw->cursor, pool.cursor.paddr);
  662. out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
  663. out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
  664. out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
  665. /* DISP SIZE */
  666. pr_debug("DIU xres: %d\n", var->xres);
  667. pr_debug("DIU yres: %d\n", var->yres);
  668. out_be32(&hw->wb_size, 0); /* WB SIZE */
  669. out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
  670. /* Horizontal and vertical configuration register */
  671. temp = var->left_margin << 22 | /* BP_H */
  672. var->hsync_len << 11 | /* PW_H */
  673. var->right_margin; /* FP_H */
  674. out_be32(&hw->hsyn_para, temp);
  675. temp = var->upper_margin << 22 | /* BP_V */
  676. var->vsync_len << 11 | /* PW_V */
  677. var->lower_margin; /* FP_V */
  678. out_be32(&hw->vsyn_para, temp);
  679. pr_debug("DIU right_margin - %d\n", var->right_margin);
  680. pr_debug("DIU left_margin - %d\n", var->left_margin);
  681. pr_debug("DIU hsync_len - %d\n", var->hsync_len);
  682. pr_debug("DIU upper_margin - %d\n", var->upper_margin);
  683. pr_debug("DIU lower_margin - %d\n", var->lower_margin);
  684. pr_debug("DIU vsync_len - %d\n", var->vsync_len);
  685. pr_debug("DIU HSYNC - 0x%08x\n", hw->hsyn_para);
  686. pr_debug("DIU VSYNC - 0x%08x\n", hw->vsyn_para);
  687. diu_ops.set_pixel_clock(var->pixclock);
  688. out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
  689. out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
  690. out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
  691. out_be32(&hw->plut, 0x01F5F666);
  692. /* Enable the DIU */
  693. enable_lcdc(info);
  694. }
  695. static int map_video_memory(struct fb_info *info)
  696. {
  697. phys_addr_t phys;
  698. u32 smem_len = info->fix.line_length * info->var.yres_virtual;
  699. pr_debug("info->var.xres_virtual = %d\n", info->var.xres_virtual);
  700. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  701. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  702. pr_debug("MAP_VIDEO_MEMORY: smem_len = %u\n", smem_len);
  703. info->screen_base = fsl_diu_alloc(smem_len, &phys);
  704. if (info->screen_base == NULL) {
  705. printk(KERN_ERR "Unable to allocate fb memory\n");
  706. return -ENOMEM;
  707. }
  708. mutex_lock(&info->mm_lock);
  709. info->fix.smem_start = (unsigned long) phys;
  710. info->fix.smem_len = smem_len;
  711. mutex_unlock(&info->mm_lock);
  712. info->screen_size = info->fix.smem_len;
  713. pr_debug("Allocated fb @ paddr=0x%08lx, size=%d.\n",
  714. info->fix.smem_start, info->fix.smem_len);
  715. pr_debug("screen base %p\n", info->screen_base);
  716. return 0;
  717. }
  718. static void unmap_video_memory(struct fb_info *info)
  719. {
  720. fsl_diu_free(info->screen_base, info->fix.smem_len);
  721. mutex_lock(&info->mm_lock);
  722. info->screen_base = NULL;
  723. info->fix.smem_start = 0;
  724. info->fix.smem_len = 0;
  725. mutex_unlock(&info->mm_lock);
  726. }
  727. /*
  728. * Using the fb_var_screeninfo in fb_info we set the aoi of this
  729. * particular framebuffer. It is a light version of fsl_diu_set_par.
  730. */
  731. static int fsl_diu_set_aoi(struct fb_info *info)
  732. {
  733. struct fb_var_screeninfo *var = &info->var;
  734. struct mfb_info *mfbi = info->par;
  735. struct diu_ad *ad = mfbi->ad;
  736. /* AOI should not be greater than display size */
  737. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  738. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  739. return 0;
  740. }
  741. /*
  742. * Using the fb_var_screeninfo in fb_info we set the resolution of this
  743. * particular framebuffer. This function alters the fb_fix_screeninfo stored
  744. * in fb_info. It does not alter var in fb_info since we are using that
  745. * data. This means we depend on the data in var inside fb_info to be
  746. * supported by the hardware. fsl_diu_check_var is always called before
  747. * fsl_diu_set_par to ensure this.
  748. */
  749. static int fsl_diu_set_par(struct fb_info *info)
  750. {
  751. unsigned long len;
  752. struct fb_var_screeninfo *var = &info->var;
  753. struct mfb_info *mfbi = info->par;
  754. struct fsl_diu_data *machine_data = mfbi->parent;
  755. struct diu_ad *ad = mfbi->ad;
  756. struct diu *hw;
  757. hw = dr.diu_reg;
  758. set_fix(info);
  759. mfbi->cursor_reset = 1;
  760. len = info->var.yres_virtual * info->fix.line_length;
  761. /* Alloc & dealloc each time resolution/bpp change */
  762. if (len != info->fix.smem_len) {
  763. if (info->fix.smem_start)
  764. unmap_video_memory(info);
  765. pr_debug("SET PAR: smem_len = %d\n", info->fix.smem_len);
  766. /* Memory allocation for framebuffer */
  767. if (map_video_memory(info)) {
  768. printk(KERN_ERR "Unable to allocate fb memory 1\n");
  769. return -ENOMEM;
  770. }
  771. }
  772. ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
  773. var->bits_per_pixel);
  774. ad->addr = cpu_to_le32(info->fix.smem_start);
  775. ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
  776. var->xres_virtual) | mfbi->g_alpha;
  777. /* AOI should not be greater than display size */
  778. ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
  779. ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
  780. ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
  781. /* Disable chroma keying function */
  782. ad->ckmax_r = 0;
  783. ad->ckmax_g = 0;
  784. ad->ckmax_b = 0;
  785. ad->ckmin_r = 255;
  786. ad->ckmin_g = 255;
  787. ad->ckmin_b = 255;
  788. if (mfbi->index == 0)
  789. update_lcdc(info);
  790. return 0;
  791. }
  792. static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
  793. {
  794. return ((val<<width) + 0x7FFF - val)>>16;
  795. }
  796. /*
  797. * Set a single color register. The values supplied have a 16 bit magnitude
  798. * which needs to be scaled in this function for the hardware. Things to take
  799. * into consideration are how many color registers, if any, are supported with
  800. * the current color visual. With truecolor mode no color palettes are
  801. * supported. Here a pseudo palette is created which we store the value in
  802. * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
  803. * color palette.
  804. */
  805. static int fsl_diu_setcolreg(unsigned regno, unsigned red, unsigned green,
  806. unsigned blue, unsigned transp, struct fb_info *info)
  807. {
  808. int ret = 1;
  809. /*
  810. * If greyscale is true, then we convert the RGB value
  811. * to greyscale no matter what visual we are using.
  812. */
  813. if (info->var.grayscale)
  814. red = green = blue = (19595 * red + 38470 * green +
  815. 7471 * blue) >> 16;
  816. switch (info->fix.visual) {
  817. case FB_VISUAL_TRUECOLOR:
  818. /*
  819. * 16-bit True Colour. We encode the RGB value
  820. * according to the RGB bitfield information.
  821. */
  822. if (regno < 16) {
  823. u32 *pal = info->pseudo_palette;
  824. u32 v;
  825. red = CNVT_TOHW(red, info->var.red.length);
  826. green = CNVT_TOHW(green, info->var.green.length);
  827. blue = CNVT_TOHW(blue, info->var.blue.length);
  828. transp = CNVT_TOHW(transp, info->var.transp.length);
  829. v = (red << info->var.red.offset) |
  830. (green << info->var.green.offset) |
  831. (blue << info->var.blue.offset) |
  832. (transp << info->var.transp.offset);
  833. pal[regno] = v;
  834. ret = 0;
  835. }
  836. break;
  837. case FB_VISUAL_STATIC_PSEUDOCOLOR:
  838. case FB_VISUAL_PSEUDOCOLOR:
  839. break;
  840. }
  841. return ret;
  842. }
  843. /*
  844. * Pan (or wrap, depending on the `vmode' field) the display using the
  845. * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
  846. * don't fit, return -EINVAL.
  847. */
  848. static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
  849. struct fb_info *info)
  850. {
  851. if ((info->var.xoffset == var->xoffset) &&
  852. (info->var.yoffset == var->yoffset))
  853. return 0; /* No change, do nothing */
  854. if (var->xoffset < 0 || var->yoffset < 0
  855. || var->xoffset + info->var.xres > info->var.xres_virtual
  856. || var->yoffset + info->var.yres > info->var.yres_virtual)
  857. return -EINVAL;
  858. info->var.xoffset = var->xoffset;
  859. info->var.yoffset = var->yoffset;
  860. if (var->vmode & FB_VMODE_YWRAP)
  861. info->var.vmode |= FB_VMODE_YWRAP;
  862. else
  863. info->var.vmode &= ~FB_VMODE_YWRAP;
  864. fsl_diu_set_aoi(info);
  865. return 0;
  866. }
  867. /*
  868. * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
  869. * succeeded, != 0 if un-/blanking failed.
  870. * blank_mode == 2: suspend vsync
  871. * blank_mode == 3: suspend hsync
  872. * blank_mode == 4: powerdown
  873. */
  874. static int fsl_diu_blank(int blank_mode, struct fb_info *info)
  875. {
  876. struct mfb_info *mfbi = info->par;
  877. mfbi->blank = blank_mode;
  878. switch (blank_mode) {
  879. case FB_BLANK_VSYNC_SUSPEND:
  880. case FB_BLANK_HSYNC_SUSPEND:
  881. /* FIXME: fixes to enable_panel and enable lcdc needed */
  882. case FB_BLANK_NORMAL:
  883. /* fsl_diu_disable_panel(info);*/
  884. break;
  885. case FB_BLANK_POWERDOWN:
  886. /* disable_lcdc(info); */
  887. break;
  888. case FB_BLANK_UNBLANK:
  889. /* fsl_diu_enable_panel(info);*/
  890. break;
  891. }
  892. return 0;
  893. }
  894. static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
  895. unsigned long arg)
  896. {
  897. struct mfb_info *mfbi = info->par;
  898. struct diu_ad *ad = mfbi->ad;
  899. struct mfb_chroma_key ck;
  900. unsigned char global_alpha;
  901. struct aoi_display_offset aoi_d;
  902. __u32 pix_fmt;
  903. void __user *buf = (void __user *)arg;
  904. if (!arg)
  905. return -EINVAL;
  906. switch (cmd) {
  907. case MFB_SET_PIXFMT:
  908. if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
  909. return -EFAULT;
  910. ad->pix_fmt = pix_fmt;
  911. pr_debug("Set pixel format to 0x%08x\n", ad->pix_fmt);
  912. break;
  913. case MFB_GET_PIXFMT:
  914. pix_fmt = ad->pix_fmt;
  915. if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
  916. return -EFAULT;
  917. pr_debug("get pixel format 0x%08x\n", ad->pix_fmt);
  918. break;
  919. case MFB_SET_AOID:
  920. if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
  921. return -EFAULT;
  922. mfbi->x_aoi_d = aoi_d.x_aoi_d;
  923. mfbi->y_aoi_d = aoi_d.y_aoi_d;
  924. pr_debug("set AOI display offset of index %d to (%d,%d)\n",
  925. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  926. fsl_diu_check_var(&info->var, info);
  927. fsl_diu_set_aoi(info);
  928. break;
  929. case MFB_GET_AOID:
  930. aoi_d.x_aoi_d = mfbi->x_aoi_d;
  931. aoi_d.y_aoi_d = mfbi->y_aoi_d;
  932. if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
  933. return -EFAULT;
  934. pr_debug("get AOI display offset of index %d (%d,%d)\n",
  935. mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
  936. break;
  937. case MFB_GET_ALPHA:
  938. global_alpha = mfbi->g_alpha;
  939. if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
  940. return -EFAULT;
  941. pr_debug("get global alpha of index %d\n", mfbi->index);
  942. break;
  943. case MFB_SET_ALPHA:
  944. /* set panel information */
  945. if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
  946. return -EFAULT;
  947. ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
  948. (global_alpha & 0xff);
  949. mfbi->g_alpha = global_alpha;
  950. pr_debug("set global alpha for index %d\n", mfbi->index);
  951. break;
  952. case MFB_SET_CHROMA_KEY:
  953. /* set panel winformation */
  954. if (copy_from_user(&ck, buf, sizeof(ck)))
  955. return -EFAULT;
  956. if (ck.enable &&
  957. (ck.red_max < ck.red_min ||
  958. ck.green_max < ck.green_min ||
  959. ck.blue_max < ck.blue_min))
  960. return -EINVAL;
  961. if (!ck.enable) {
  962. ad->ckmax_r = 0;
  963. ad->ckmax_g = 0;
  964. ad->ckmax_b = 0;
  965. ad->ckmin_r = 255;
  966. ad->ckmin_g = 255;
  967. ad->ckmin_b = 255;
  968. } else {
  969. ad->ckmax_r = ck.red_max;
  970. ad->ckmax_g = ck.green_max;
  971. ad->ckmax_b = ck.blue_max;
  972. ad->ckmin_r = ck.red_min;
  973. ad->ckmin_g = ck.green_min;
  974. ad->ckmin_b = ck.blue_min;
  975. }
  976. pr_debug("set chroma key\n");
  977. break;
  978. case FBIOGET_GWINFO:
  979. if (mfbi->type == MFB_TYPE_OFF)
  980. return -ENODEV;
  981. /* get graphic window information */
  982. if (copy_to_user(buf, ad, sizeof(*ad)))
  983. return -EFAULT;
  984. break;
  985. case FBIOGET_HWCINFO:
  986. pr_debug("FBIOGET_HWCINFO:0x%08x\n", FBIOGET_HWCINFO);
  987. break;
  988. case FBIOPUT_MODEINFO:
  989. pr_debug("FBIOPUT_MODEINFO:0x%08x\n", FBIOPUT_MODEINFO);
  990. break;
  991. case FBIOGET_DISPINFO:
  992. pr_debug("FBIOGET_DISPINFO:0x%08x\n", FBIOGET_DISPINFO);
  993. break;
  994. default:
  995. printk(KERN_ERR "Unknown ioctl command (0x%08X)\n", cmd);
  996. return -ENOIOCTLCMD;
  997. }
  998. return 0;
  999. }
  1000. /* turn on fb if count == 1
  1001. */
  1002. static int fsl_diu_open(struct fb_info *info, int user)
  1003. {
  1004. struct mfb_info *mfbi = info->par;
  1005. int res = 0;
  1006. /* free boot splash memory on first /dev/fb0 open */
  1007. if (!mfbi->index && diu_ops.release_bootmem)
  1008. diu_ops.release_bootmem();
  1009. spin_lock(&diu_lock);
  1010. mfbi->count++;
  1011. if (mfbi->count == 1) {
  1012. pr_debug("open plane index %d\n", mfbi->index);
  1013. fsl_diu_check_var(&info->var, info);
  1014. res = fsl_diu_set_par(info);
  1015. if (res < 0)
  1016. mfbi->count--;
  1017. else {
  1018. res = fsl_diu_enable_panel(info);
  1019. if (res < 0)
  1020. mfbi->count--;
  1021. }
  1022. }
  1023. spin_unlock(&diu_lock);
  1024. return res;
  1025. }
  1026. /* turn off fb if count == 0
  1027. */
  1028. static int fsl_diu_release(struct fb_info *info, int user)
  1029. {
  1030. struct mfb_info *mfbi = info->par;
  1031. int res = 0;
  1032. spin_lock(&diu_lock);
  1033. mfbi->count--;
  1034. if (mfbi->count == 0) {
  1035. pr_debug("release plane index %d\n", mfbi->index);
  1036. res = fsl_diu_disable_panel(info);
  1037. if (res < 0)
  1038. mfbi->count++;
  1039. }
  1040. spin_unlock(&diu_lock);
  1041. return res;
  1042. }
  1043. static struct fb_ops fsl_diu_ops = {
  1044. .owner = THIS_MODULE,
  1045. .fb_check_var = fsl_diu_check_var,
  1046. .fb_set_par = fsl_diu_set_par,
  1047. .fb_setcolreg = fsl_diu_setcolreg,
  1048. .fb_blank = fsl_diu_blank,
  1049. .fb_pan_display = fsl_diu_pan_display,
  1050. .fb_fillrect = cfb_fillrect,
  1051. .fb_copyarea = cfb_copyarea,
  1052. .fb_imageblit = cfb_imageblit,
  1053. .fb_ioctl = fsl_diu_ioctl,
  1054. .fb_open = fsl_diu_open,
  1055. .fb_release = fsl_diu_release,
  1056. };
  1057. static int init_fbinfo(struct fb_info *info)
  1058. {
  1059. struct mfb_info *mfbi = info->par;
  1060. info->device = NULL;
  1061. info->var.activate = FB_ACTIVATE_NOW;
  1062. info->fbops = &fsl_diu_ops;
  1063. info->flags = FBINFO_FLAG_DEFAULT;
  1064. info->pseudo_palette = &mfbi->pseudo_palette;
  1065. /* Allocate colormap */
  1066. fb_alloc_cmap(&info->cmap, 16, 0);
  1067. return 0;
  1068. }
  1069. static int __devinit install_fb(struct fb_info *info)
  1070. {
  1071. int rc;
  1072. struct mfb_info *mfbi = info->par;
  1073. const char *aoi_mode, *init_aoi_mode = "320x240";
  1074. struct fb_videomode *db = fsl_diu_mode_db;
  1075. unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
  1076. int has_default_mode = 1;
  1077. if (init_fbinfo(info))
  1078. return -EINVAL;
  1079. if (mfbi->index == 0) { /* plane 0 */
  1080. if (mfbi->edid_data) {
  1081. /* Now build modedb from EDID */
  1082. fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
  1083. fb_videomode_to_modelist(info->monspecs.modedb,
  1084. info->monspecs.modedb_len,
  1085. &info->modelist);
  1086. db = info->monspecs.modedb;
  1087. dbsize = info->monspecs.modedb_len;
  1088. }
  1089. aoi_mode = fb_mode;
  1090. } else {
  1091. aoi_mode = init_aoi_mode;
  1092. }
  1093. pr_debug("mode used = %s\n", aoi_mode);
  1094. rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize,
  1095. &fsl_diu_default_mode, default_bpp);
  1096. switch (rc) {
  1097. case 1:
  1098. pr_debug("using mode specified in @mode\n");
  1099. break;
  1100. case 2:
  1101. pr_debug("using mode specified in @mode "
  1102. "with ignored refresh rate\n");
  1103. break;
  1104. case 3:
  1105. pr_debug("using mode default mode\n");
  1106. break;
  1107. case 4:
  1108. pr_debug("using mode from list\n");
  1109. break;
  1110. default:
  1111. pr_debug("rc = %d\n", rc);
  1112. pr_debug("failed to find mode\n");
  1113. /*
  1114. * For plane 0 we continue and look into
  1115. * driver's internal modedb.
  1116. */
  1117. if (mfbi->index == 0 && mfbi->edid_data)
  1118. has_default_mode = 0;
  1119. else
  1120. return -EINVAL;
  1121. break;
  1122. }
  1123. if (!has_default_mode) {
  1124. rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
  1125. ARRAY_SIZE(fsl_diu_mode_db),
  1126. &fsl_diu_default_mode,
  1127. default_bpp);
  1128. if (rc > 0 && rc < 5)
  1129. has_default_mode = 1;
  1130. }
  1131. /* Still not found, use preferred mode from database if any */
  1132. if (!has_default_mode && info->monspecs.modedb) {
  1133. struct fb_monspecs *specs = &info->monspecs;
  1134. struct fb_videomode *modedb = &specs->modedb[0];
  1135. /*
  1136. * Get preferred timing. If not found,
  1137. * first mode in database will be used.
  1138. */
  1139. if (specs->misc & FB_MISC_1ST_DETAIL) {
  1140. int i;
  1141. for (i = 0; i < specs->modedb_len; i++) {
  1142. if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
  1143. modedb = &specs->modedb[i];
  1144. break;
  1145. }
  1146. }
  1147. }
  1148. info->var.bits_per_pixel = default_bpp;
  1149. fb_videomode_to_var(&info->var, modedb);
  1150. }
  1151. pr_debug("xres_virtual %d\n", info->var.xres_virtual);
  1152. pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
  1153. pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
  1154. pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
  1155. if (mfbi->type == MFB_TYPE_OFF)
  1156. mfbi->blank = FB_BLANK_NORMAL;
  1157. else
  1158. mfbi->blank = FB_BLANK_UNBLANK;
  1159. if (fsl_diu_check_var(&info->var, info)) {
  1160. printk(KERN_ERR "fb_check_var failed");
  1161. fb_dealloc_cmap(&info->cmap);
  1162. return -EINVAL;
  1163. }
  1164. if (register_framebuffer(info) < 0) {
  1165. printk(KERN_ERR "register_framebuffer failed");
  1166. unmap_video_memory(info);
  1167. fb_dealloc_cmap(&info->cmap);
  1168. return -EINVAL;
  1169. }
  1170. mfbi->registered = 1;
  1171. printk(KERN_INFO "fb%d: %s fb device registered successfully.\n",
  1172. info->node, info->fix.id);
  1173. return 0;
  1174. }
  1175. static void uninstall_fb(struct fb_info *info)
  1176. {
  1177. struct mfb_info *mfbi = info->par;
  1178. if (!mfbi->registered)
  1179. return;
  1180. if (mfbi->index == 0)
  1181. kfree(mfbi->edid_data);
  1182. unregister_framebuffer(info);
  1183. unmap_video_memory(info);
  1184. if (&info->cmap)
  1185. fb_dealloc_cmap(&info->cmap);
  1186. mfbi->registered = 0;
  1187. }
  1188. static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
  1189. {
  1190. struct diu *hw = dr.diu_reg;
  1191. unsigned int status = in_be32(&hw->int_status);
  1192. if (status) {
  1193. /* This is the workaround for underrun */
  1194. if (status & INT_UNDRUN) {
  1195. out_be32(&hw->diu_mode, 0);
  1196. pr_debug("Err: DIU occurs underrun!\n");
  1197. udelay(1);
  1198. out_be32(&hw->diu_mode, 1);
  1199. }
  1200. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1201. else if (status & INT_VSYNC) {
  1202. unsigned int i;
  1203. for (i = 0; i < coherence_data_size;
  1204. i += d_cache_line_size)
  1205. __asm__ __volatile__ (
  1206. "dcbz 0, %[input]"
  1207. ::[input]"r"(&coherence_data[i]));
  1208. }
  1209. #endif
  1210. return IRQ_HANDLED;
  1211. }
  1212. return IRQ_NONE;
  1213. }
  1214. static int request_irq_local(int irq)
  1215. {
  1216. unsigned long status, ints;
  1217. struct diu *hw;
  1218. int ret;
  1219. hw = dr.diu_reg;
  1220. /* Read to clear the status */
  1221. status = in_be32(&hw->int_status);
  1222. ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
  1223. if (ret)
  1224. pr_info("Request diu IRQ failed.\n");
  1225. else {
  1226. ints = INT_PARERR | INT_LS_BF_VS;
  1227. #if !defined(CONFIG_NOT_COHERENT_CACHE)
  1228. ints |= INT_VSYNC;
  1229. #endif
  1230. if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
  1231. ints |= INT_VSYNC_WB;
  1232. /* Read to clear the status */
  1233. status = in_be32(&hw->int_status);
  1234. out_be32(&hw->int_mask, ints);
  1235. }
  1236. return ret;
  1237. }
  1238. static void free_irq_local(int irq)
  1239. {
  1240. struct diu *hw = dr.diu_reg;
  1241. /* Disable all LCDC interrupt */
  1242. out_be32(&hw->int_mask, 0x1f);
  1243. free_irq(irq, NULL);
  1244. }
  1245. #ifdef CONFIG_PM
  1246. /*
  1247. * Power management hooks. Note that we won't be called from IRQ context,
  1248. * unlike the blank functions above, so we may sleep.
  1249. */
  1250. static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
  1251. {
  1252. struct fsl_diu_data *machine_data;
  1253. machine_data = dev_get_drvdata(&ofdev->dev);
  1254. disable_lcdc(machine_data->fsl_diu_info[0]);
  1255. return 0;
  1256. }
  1257. static int fsl_diu_resume(struct platform_device *ofdev)
  1258. {
  1259. struct fsl_diu_data *machine_data;
  1260. machine_data = dev_get_drvdata(&ofdev->dev);
  1261. enable_lcdc(machine_data->fsl_diu_info[0]);
  1262. return 0;
  1263. }
  1264. #else
  1265. #define fsl_diu_suspend NULL
  1266. #define fsl_diu_resume NULL
  1267. #endif /* CONFIG_PM */
  1268. /* Align to 64-bit(8-byte), 32-byte, etc. */
  1269. static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1270. u32 bytes_align)
  1271. {
  1272. u32 offset, ssize;
  1273. u32 mask;
  1274. dma_addr_t paddr = 0;
  1275. ssize = size + bytes_align;
  1276. buf->vaddr = dma_alloc_coherent(dev, ssize, &paddr, GFP_DMA |
  1277. __GFP_ZERO);
  1278. if (!buf->vaddr)
  1279. return -ENOMEM;
  1280. buf->paddr = (__u32) paddr;
  1281. mask = bytes_align - 1;
  1282. offset = (u32)buf->paddr & mask;
  1283. if (offset) {
  1284. buf->offset = bytes_align - offset;
  1285. buf->paddr = (u32)buf->paddr + offset;
  1286. } else
  1287. buf->offset = 0;
  1288. return 0;
  1289. }
  1290. static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
  1291. u32 bytes_align)
  1292. {
  1293. dma_free_coherent(dev, size + bytes_align,
  1294. buf->vaddr, (buf->paddr - buf->offset));
  1295. return;
  1296. }
  1297. static ssize_t store_monitor(struct device *device,
  1298. struct device_attribute *attr, const char *buf, size_t count)
  1299. {
  1300. enum fsl_diu_monitor_port old_monitor_port;
  1301. struct fsl_diu_data *machine_data =
  1302. container_of(attr, struct fsl_diu_data, dev_attr);
  1303. old_monitor_port = machine_data->monitor_port;
  1304. machine_data->monitor_port = fsl_diu_name_to_port(buf);
  1305. if (old_monitor_port != machine_data->monitor_port) {
  1306. /* All AOIs need adjust pixel format
  1307. * fsl_diu_set_par only change the pixsel format here
  1308. * unlikely to fail. */
  1309. fsl_diu_set_par(machine_data->fsl_diu_info[0]);
  1310. fsl_diu_set_par(machine_data->fsl_diu_info[1]);
  1311. fsl_diu_set_par(machine_data->fsl_diu_info[2]);
  1312. fsl_diu_set_par(machine_data->fsl_diu_info[3]);
  1313. fsl_diu_set_par(machine_data->fsl_diu_info[4]);
  1314. }
  1315. return count;
  1316. }
  1317. static ssize_t show_monitor(struct device *device,
  1318. struct device_attribute *attr, char *buf)
  1319. {
  1320. struct fsl_diu_data *machine_data =
  1321. container_of(attr, struct fsl_diu_data, dev_attr);
  1322. switch (machine_data->monitor_port) {
  1323. case FSL_DIU_PORT_DVI:
  1324. return sprintf(buf, "DVI\n");
  1325. case FSL_DIU_PORT_LVDS:
  1326. return sprintf(buf, "Single-link LVDS\n");
  1327. case FSL_DIU_PORT_DLVDS:
  1328. return sprintf(buf, "Dual-link LVDS\n");
  1329. }
  1330. return 0;
  1331. }
  1332. static int __devinit fsl_diu_probe(struct platform_device *ofdev)
  1333. {
  1334. struct device_node *np = ofdev->dev.of_node;
  1335. struct mfb_info *mfbi;
  1336. phys_addr_t dummy_ad_addr;
  1337. int ret, i, error = 0;
  1338. struct resource res;
  1339. struct fsl_diu_data *machine_data;
  1340. int diu_mode;
  1341. machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
  1342. if (!machine_data)
  1343. return -ENOMEM;
  1344. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1345. machine_data->fsl_diu_info[i] =
  1346. framebuffer_alloc(sizeof(struct mfb_info), &ofdev->dev);
  1347. if (!machine_data->fsl_diu_info[i]) {
  1348. dev_err(&ofdev->dev, "cannot allocate memory\n");
  1349. ret = -ENOMEM;
  1350. goto error2;
  1351. }
  1352. mfbi = machine_data->fsl_diu_info[i]->par;
  1353. memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
  1354. mfbi->parent = machine_data;
  1355. if (mfbi->index == 0) {
  1356. const u8 *prop;
  1357. int len;
  1358. /* Get EDID */
  1359. prop = of_get_property(np, "edid", &len);
  1360. if (prop && len == EDID_LENGTH)
  1361. mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
  1362. GFP_KERNEL);
  1363. }
  1364. }
  1365. ret = of_address_to_resource(np, 0, &res);
  1366. if (ret) {
  1367. dev_err(&ofdev->dev, "could not obtain DIU address\n");
  1368. goto error;
  1369. }
  1370. if (!res.start) {
  1371. dev_err(&ofdev->dev, "invalid DIU address\n");
  1372. goto error;
  1373. }
  1374. dev_dbg(&ofdev->dev, "%s, res.start: 0x%08x\n", __func__, res.start);
  1375. dr.diu_reg = ioremap(res.start, sizeof(struct diu));
  1376. if (!dr.diu_reg) {
  1377. dev_err(&ofdev->dev, "Err: can't map DIU registers!\n");
  1378. ret = -EFAULT;
  1379. goto error2;
  1380. }
  1381. diu_mode = in_be32(&dr.diu_reg->diu_mode);
  1382. if (diu_mode != MFB_MODE1)
  1383. out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU */
  1384. /* Get the IRQ of the DIU */
  1385. machine_data->irq = irq_of_parse_and_map(np, 0);
  1386. if (!machine_data->irq) {
  1387. dev_err(&ofdev->dev, "could not get DIU IRQ\n");
  1388. ret = -EINVAL;
  1389. goto error;
  1390. }
  1391. machine_data->monitor_port = monitor_port;
  1392. /* Area descriptor memory pool aligns to 64-bit boundary */
  1393. if (allocate_buf(&ofdev->dev, &pool.ad,
  1394. sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
  1395. return -ENOMEM;
  1396. /* Get memory for Gamma Table - 32-byte aligned memory */
  1397. if (allocate_buf(&ofdev->dev, &pool.gamma, 768, 32)) {
  1398. ret = -ENOMEM;
  1399. goto error;
  1400. }
  1401. /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
  1402. if (allocate_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1403. 32)) {
  1404. ret = -ENOMEM;
  1405. goto error;
  1406. }
  1407. i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1408. machine_data->dummy_ad = (struct diu_ad *)
  1409. ((u32)pool.ad.vaddr + pool.ad.offset) + i;
  1410. machine_data->dummy_ad->paddr = pool.ad.paddr +
  1411. i * sizeof(struct diu_ad);
  1412. machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
  1413. if (!machine_data->dummy_aoi_virt) {
  1414. ret = -ENOMEM;
  1415. goto error;
  1416. }
  1417. machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
  1418. machine_data->dummy_ad->pix_fmt = 0x88882317;
  1419. machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
  1420. machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
  1421. machine_data->dummy_ad->offset_xyi = 0;
  1422. machine_data->dummy_ad->offset_xyd = 0;
  1423. machine_data->dummy_ad->next_ad = 0;
  1424. /*
  1425. * Let DIU display splash screen if it was pre-initialized
  1426. * by the bootloader, set dummy area descriptor otherwise.
  1427. */
  1428. if (diu_mode != MFB_MODE1)
  1429. out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
  1430. out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
  1431. out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
  1432. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
  1433. machine_data->fsl_diu_info[i]->fix.smem_start = 0;
  1434. mfbi = machine_data->fsl_diu_info[i]->par;
  1435. mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
  1436. + pool.ad.offset) + i;
  1437. mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
  1438. ret = install_fb(machine_data->fsl_diu_info[i]);
  1439. if (ret) {
  1440. dev_err(&ofdev->dev,
  1441. "Failed to register framebuffer %d\n",
  1442. i);
  1443. goto error;
  1444. }
  1445. }
  1446. if (request_irq_local(machine_data->irq)) {
  1447. dev_err(machine_data->fsl_diu_info[0]->dev,
  1448. "could not request irq for diu.");
  1449. goto error;
  1450. }
  1451. sysfs_attr_init(&machine_data->dev_attr.attr);
  1452. machine_data->dev_attr.attr.name = "monitor";
  1453. machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
  1454. machine_data->dev_attr.show = show_monitor;
  1455. machine_data->dev_attr.store = store_monitor;
  1456. error = device_create_file(machine_data->fsl_diu_info[0]->dev,
  1457. &machine_data->dev_attr);
  1458. if (error) {
  1459. dev_err(machine_data->fsl_diu_info[0]->dev,
  1460. "could not create sysfs %s file\n",
  1461. machine_data->dev_attr.attr.name);
  1462. }
  1463. dev_set_drvdata(&ofdev->dev, machine_data);
  1464. return 0;
  1465. error:
  1466. for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
  1467. i > 0; i--)
  1468. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1469. if (pool.ad.vaddr)
  1470. free_buf(&ofdev->dev, &pool.ad,
  1471. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1472. if (pool.gamma.vaddr)
  1473. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1474. if (pool.cursor.vaddr)
  1475. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1476. 32);
  1477. if (machine_data->dummy_aoi_virt)
  1478. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1479. iounmap(dr.diu_reg);
  1480. error2:
  1481. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1482. if (machine_data->fsl_diu_info[i])
  1483. framebuffer_release(machine_data->fsl_diu_info[i]);
  1484. kfree(machine_data);
  1485. return ret;
  1486. }
  1487. static int fsl_diu_remove(struct platform_device *ofdev)
  1488. {
  1489. struct fsl_diu_data *machine_data;
  1490. int i;
  1491. machine_data = dev_get_drvdata(&ofdev->dev);
  1492. disable_lcdc(machine_data->fsl_diu_info[0]);
  1493. free_irq_local(machine_data->irq);
  1494. for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
  1495. uninstall_fb(machine_data->fsl_diu_info[i - 1]);
  1496. if (pool.ad.vaddr)
  1497. free_buf(&ofdev->dev, &pool.ad,
  1498. sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
  1499. if (pool.gamma.vaddr)
  1500. free_buf(&ofdev->dev, &pool.gamma, 768, 32);
  1501. if (pool.cursor.vaddr)
  1502. free_buf(&ofdev->dev, &pool.cursor, MAX_CURS * MAX_CURS * 2,
  1503. 32);
  1504. if (machine_data->dummy_aoi_virt)
  1505. fsl_diu_free(machine_data->dummy_aoi_virt, 64);
  1506. iounmap(dr.diu_reg);
  1507. for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
  1508. if (machine_data->fsl_diu_info[i])
  1509. framebuffer_release(machine_data->fsl_diu_info[i]);
  1510. kfree(machine_data);
  1511. return 0;
  1512. }
  1513. #ifndef MODULE
  1514. static int __init fsl_diu_setup(char *options)
  1515. {
  1516. char *opt;
  1517. unsigned long val;
  1518. if (!options || !*options)
  1519. return 0;
  1520. while ((opt = strsep(&options, ",")) != NULL) {
  1521. if (!*opt)
  1522. continue;
  1523. if (!strncmp(opt, "monitor=", 8)) {
  1524. monitor_port = fsl_diu_name_to_port(opt + 8);
  1525. } else if (!strncmp(opt, "bpp=", 4)) {
  1526. if (!strict_strtoul(opt + 4, 10, &val))
  1527. default_bpp = val;
  1528. } else
  1529. fb_mode = opt;
  1530. }
  1531. return 0;
  1532. }
  1533. #endif
  1534. static struct of_device_id fsl_diu_match[] = {
  1535. #ifdef CONFIG_PPC_MPC512x
  1536. {
  1537. .compatible = "fsl,mpc5121-diu",
  1538. },
  1539. #endif
  1540. {
  1541. .compatible = "fsl,diu",
  1542. },
  1543. {}
  1544. };
  1545. MODULE_DEVICE_TABLE(of, fsl_diu_match);
  1546. static struct platform_driver fsl_diu_driver = {
  1547. .driver = {
  1548. .name = "fsl_diu",
  1549. .owner = THIS_MODULE,
  1550. .of_match_table = fsl_diu_match,
  1551. },
  1552. .probe = fsl_diu_probe,
  1553. .remove = fsl_diu_remove,
  1554. .suspend = fsl_diu_suspend,
  1555. .resume = fsl_diu_resume,
  1556. };
  1557. static int __init fsl_diu_init(void)
  1558. {
  1559. #ifdef CONFIG_NOT_COHERENT_CACHE
  1560. struct device_node *np;
  1561. const u32 *prop;
  1562. #endif
  1563. int ret;
  1564. #ifndef MODULE
  1565. char *option;
  1566. /*
  1567. * For kernel boot options (in 'video=xxxfb:<options>' format)
  1568. */
  1569. if (fb_get_options("fslfb", &option))
  1570. return -ENODEV;
  1571. fsl_diu_setup(option);
  1572. #else
  1573. monitor_port = fsl_diu_name_to_port(monitor_string);
  1574. #endif
  1575. printk(KERN_INFO "Freescale DIU driver\n");
  1576. #ifdef CONFIG_NOT_COHERENT_CACHE
  1577. np = of_find_node_by_type(NULL, "cpu");
  1578. if (!np) {
  1579. printk(KERN_ERR "Err: can't find device node 'cpu'\n");
  1580. return -ENODEV;
  1581. }
  1582. prop = of_get_property(np, "d-cache-size", NULL);
  1583. if (prop == NULL) {
  1584. of_node_put(np);
  1585. return -ENODEV;
  1586. }
  1587. /* Freescale PLRU requires 13/8 times the cache size to do a proper
  1588. displacement flush
  1589. */
  1590. coherence_data_size = *prop * 13;
  1591. coherence_data_size /= 8;
  1592. prop = of_get_property(np, "d-cache-line-size", NULL);
  1593. if (prop == NULL) {
  1594. of_node_put(np);
  1595. return -ENODEV;
  1596. }
  1597. d_cache_line_size = *prop;
  1598. of_node_put(np);
  1599. coherence_data = vmalloc(coherence_data_size);
  1600. if (!coherence_data)
  1601. return -ENOMEM;
  1602. #endif
  1603. ret = platform_driver_register(&fsl_diu_driver);
  1604. if (ret) {
  1605. printk(KERN_ERR
  1606. "fsl-diu: failed to register platform driver\n");
  1607. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1608. vfree(coherence_data);
  1609. #endif
  1610. iounmap(dr.diu_reg);
  1611. }
  1612. return ret;
  1613. }
  1614. static void __exit fsl_diu_exit(void)
  1615. {
  1616. platform_driver_unregister(&fsl_diu_driver);
  1617. #if defined(CONFIG_NOT_COHERENT_CACHE)
  1618. vfree(coherence_data);
  1619. #endif
  1620. }
  1621. module_init(fsl_diu_init);
  1622. module_exit(fsl_diu_exit);
  1623. MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
  1624. MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
  1625. MODULE_LICENSE("GPL");
  1626. module_param_named(mode, fb_mode, charp, 0);
  1627. MODULE_PARM_DESC(mode,
  1628. "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
  1629. module_param_named(bpp, default_bpp, ulong, 0);
  1630. MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
  1631. module_param_named(monitor, monitor_string, charp, 0);
  1632. MODULE_PARM_DESC(monitor, "Specify the monitor port "
  1633. "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");