txx9aclc.c 12 KB

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  1. /*
  2. * Generic TXx9 ACLC platform driver
  3. *
  4. * Copyright (C) 2009 Atsushi Nemoto
  5. *
  6. * Based on RBTX49xx patch from CELF patch archive.
  7. * (C) Copyright TOSHIBA CORPORATION 2004-2006
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/scatterlist.h>
  17. #include <sound/core.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/soc.h>
  21. #include "txx9aclc.h"
  22. static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
  23. /*
  24. * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
  25. * needs more works for noncoherent MIPS.
  26. */
  27. .info = SNDRV_PCM_INFO_INTERLEAVED |
  28. SNDRV_PCM_INFO_BATCH |
  29. SNDRV_PCM_INFO_PAUSE,
  30. #ifdef __BIG_ENDIAN
  31. .formats = SNDRV_PCM_FMTBIT_S16_BE,
  32. #else
  33. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  34. #endif
  35. .period_bytes_min = 1024,
  36. .period_bytes_max = 8 * 1024,
  37. .periods_min = 2,
  38. .periods_max = 4096,
  39. .buffer_bytes_max = 32 * 1024,
  40. };
  41. static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
  42. struct snd_pcm_hw_params *params)
  43. {
  44. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  45. struct snd_soc_device *socdev = rtd->socdev;
  46. struct snd_pcm_runtime *runtime = substream->runtime;
  47. struct txx9aclc_dmadata *dmadata = runtime->private_data;
  48. int ret;
  49. ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
  50. if (ret < 0)
  51. return ret;
  52. dev_dbg(socdev->dev,
  53. "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
  54. "runtime->min_align %ld\n",
  55. (unsigned long)runtime->dma_area,
  56. (unsigned long)runtime->dma_addr, runtime->dma_bytes,
  57. runtime->min_align);
  58. dev_dbg(socdev->dev,
  59. "periods %d period_bytes %d stream %d\n",
  60. params_periods(params), params_period_bytes(params),
  61. substream->stream);
  62. dmadata->substream = substream;
  63. dmadata->pos = 0;
  64. return 0;
  65. }
  66. static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
  67. {
  68. return snd_pcm_lib_free_pages(substream);
  69. }
  70. static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
  71. {
  72. struct snd_pcm_runtime *runtime = substream->runtime;
  73. struct txx9aclc_dmadata *dmadata = runtime->private_data;
  74. dmadata->dma_addr = runtime->dma_addr;
  75. dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
  76. dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
  77. if (dmadata->buffer_bytes == dmadata->period_bytes) {
  78. dmadata->frag_bytes = dmadata->period_bytes >> 1;
  79. dmadata->frags = 2;
  80. } else {
  81. dmadata->frag_bytes = dmadata->period_bytes;
  82. dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
  83. }
  84. dmadata->frag_count = 0;
  85. dmadata->pos = 0;
  86. return 0;
  87. }
  88. static void txx9aclc_dma_complete(void *arg)
  89. {
  90. struct txx9aclc_dmadata *dmadata = arg;
  91. unsigned long flags;
  92. /* dma completion handler cannot submit new operations */
  93. spin_lock_irqsave(&dmadata->dma_lock, flags);
  94. if (dmadata->frag_count >= 0) {
  95. dmadata->dmacount--;
  96. BUG_ON(dmadata->dmacount < 0);
  97. tasklet_schedule(&dmadata->tasklet);
  98. }
  99. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  100. }
  101. static struct dma_async_tx_descriptor *
  102. txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
  103. {
  104. struct dma_chan *chan = dmadata->dma_chan;
  105. struct dma_async_tx_descriptor *desc;
  106. struct scatterlist sg;
  107. sg_init_table(&sg, 1);
  108. sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
  109. dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
  110. sg_dma_address(&sg) = buf_dma_addr;
  111. desc = chan->device->device_prep_slave_sg(chan, &sg, 1,
  112. dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  113. DMA_TO_DEVICE : DMA_FROM_DEVICE,
  114. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  115. if (!desc) {
  116. dev_err(&chan->dev->device, "cannot prepare slave dma\n");
  117. return NULL;
  118. }
  119. desc->callback = txx9aclc_dma_complete;
  120. desc->callback_param = dmadata;
  121. desc->tx_submit(desc);
  122. return desc;
  123. }
  124. #define NR_DMA_CHAIN 2
  125. static void txx9aclc_dma_tasklet(unsigned long data)
  126. {
  127. struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
  128. struct dma_chan *chan = dmadata->dma_chan;
  129. struct dma_async_tx_descriptor *desc;
  130. struct snd_pcm_substream *substream = dmadata->substream;
  131. u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  132. ACCTL_AUDODMA : ACCTL_AUDIDMA;
  133. int i;
  134. unsigned long flags;
  135. spin_lock_irqsave(&dmadata->dma_lock, flags);
  136. if (dmadata->frag_count < 0) {
  137. struct txx9aclc_soc_device *dev =
  138. container_of(dmadata, struct txx9aclc_soc_device,
  139. dmadata[substream->stream]);
  140. struct txx9aclc_plat_drvdata *drvdata =
  141. txx9aclc_get_plat_drvdata(dev);
  142. void __iomem *base = drvdata->base;
  143. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  144. chan->device->device_terminate_all(chan);
  145. /* first time */
  146. for (i = 0; i < NR_DMA_CHAIN; i++) {
  147. desc = txx9aclc_dma_submit(dmadata,
  148. dmadata->dma_addr + i * dmadata->frag_bytes);
  149. if (!desc)
  150. return;
  151. }
  152. dmadata->dmacount = NR_DMA_CHAIN;
  153. chan->device->device_issue_pending(chan);
  154. spin_lock_irqsave(&dmadata->dma_lock, flags);
  155. __raw_writel(ctlbit, base + ACCTLEN);
  156. dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
  157. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  158. return;
  159. }
  160. BUG_ON(dmadata->dmacount >= NR_DMA_CHAIN);
  161. while (dmadata->dmacount < NR_DMA_CHAIN) {
  162. dmadata->dmacount++;
  163. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  164. desc = txx9aclc_dma_submit(dmadata,
  165. dmadata->dma_addr +
  166. dmadata->frag_count * dmadata->frag_bytes);
  167. if (!desc)
  168. return;
  169. chan->device->device_issue_pending(chan);
  170. spin_lock_irqsave(&dmadata->dma_lock, flags);
  171. dmadata->frag_count++;
  172. dmadata->frag_count %= dmadata->frags;
  173. dmadata->pos += dmadata->frag_bytes;
  174. dmadata->pos %= dmadata->buffer_bytes;
  175. if ((dmadata->frag_count * dmadata->frag_bytes) %
  176. dmadata->period_bytes == 0)
  177. snd_pcm_period_elapsed(substream);
  178. }
  179. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  180. }
  181. static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  182. {
  183. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  184. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  185. struct txx9aclc_soc_device *dev =
  186. container_of(rtd->socdev, struct txx9aclc_soc_device, soc_dev);
  187. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  188. void __iomem *base = drvdata->base;
  189. unsigned long flags;
  190. int ret = 0;
  191. u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  192. ACCTL_AUDODMA : ACCTL_AUDIDMA;
  193. spin_lock_irqsave(&dmadata->dma_lock, flags);
  194. switch (cmd) {
  195. case SNDRV_PCM_TRIGGER_START:
  196. dmadata->frag_count = -1;
  197. tasklet_schedule(&dmadata->tasklet);
  198. break;
  199. case SNDRV_PCM_TRIGGER_STOP:
  200. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  201. case SNDRV_PCM_TRIGGER_SUSPEND:
  202. __raw_writel(ctlbit, base + ACCTLDIS);
  203. break;
  204. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  205. case SNDRV_PCM_TRIGGER_RESUME:
  206. __raw_writel(ctlbit, base + ACCTLEN);
  207. break;
  208. default:
  209. ret = -EINVAL;
  210. }
  211. spin_unlock_irqrestore(&dmadata->dma_lock, flags);
  212. return ret;
  213. }
  214. static snd_pcm_uframes_t
  215. txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
  216. {
  217. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  218. return bytes_to_frames(substream->runtime, dmadata->pos);
  219. }
  220. static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
  221. {
  222. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  223. struct txx9aclc_soc_device *dev =
  224. container_of(rtd->socdev, struct txx9aclc_soc_device, soc_dev);
  225. struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
  226. int ret;
  227. ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
  228. if (ret)
  229. return ret;
  230. /* ensure that buffer size is a multiple of period size */
  231. ret = snd_pcm_hw_constraint_integer(substream->runtime,
  232. SNDRV_PCM_HW_PARAM_PERIODS);
  233. if (ret < 0)
  234. return ret;
  235. substream->runtime->private_data = dmadata;
  236. return 0;
  237. }
  238. static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
  239. {
  240. struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
  241. struct dma_chan *chan = dmadata->dma_chan;
  242. dmadata->frag_count = -1;
  243. chan->device->device_terminate_all(chan);
  244. return 0;
  245. }
  246. static struct snd_pcm_ops txx9aclc_pcm_ops = {
  247. .open = txx9aclc_pcm_open,
  248. .close = txx9aclc_pcm_close,
  249. .ioctl = snd_pcm_lib_ioctl,
  250. .hw_params = txx9aclc_pcm_hw_params,
  251. .hw_free = txx9aclc_pcm_hw_free,
  252. .prepare = txx9aclc_pcm_prepare,
  253. .trigger = txx9aclc_pcm_trigger,
  254. .pointer = txx9aclc_pcm_pointer,
  255. };
  256. static void txx9aclc_pcm_free_dma_buffers(struct snd_pcm *pcm)
  257. {
  258. snd_pcm_lib_preallocate_free_for_all(pcm);
  259. }
  260. static int txx9aclc_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
  261. struct snd_pcm *pcm)
  262. {
  263. return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  264. card->dev, 64 * 1024, 4 * 1024 * 1024);
  265. }
  266. static bool filter(struct dma_chan *chan, void *param)
  267. {
  268. struct txx9aclc_dmadata *dmadata = param;
  269. char *devname;
  270. bool found = false;
  271. devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
  272. (int)dmadata->dma_res->start);
  273. if (strcmp(dev_name(chan->device->dev), devname) == 0) {
  274. chan->private = &dmadata->dma_slave;
  275. found = true;
  276. }
  277. kfree(devname);
  278. return found;
  279. }
  280. static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
  281. struct txx9aclc_dmadata *dmadata)
  282. {
  283. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  284. struct txx9dmac_slave *ds = &dmadata->dma_slave;
  285. dma_cap_mask_t mask;
  286. spin_lock_init(&dmadata->dma_lock);
  287. ds->reg_width = sizeof(u32);
  288. if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  289. ds->tx_reg = drvdata->physbase + ACAUDODAT;
  290. ds->rx_reg = 0;
  291. } else {
  292. ds->tx_reg = 0;
  293. ds->rx_reg = drvdata->physbase + ACAUDIDAT;
  294. }
  295. /* Try to grab a DMA channel */
  296. dma_cap_zero(mask);
  297. dma_cap_set(DMA_SLAVE, mask);
  298. dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
  299. if (!dmadata->dma_chan) {
  300. dev_err(dev->soc_dev.dev,
  301. "DMA channel for %s is not available\n",
  302. dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  303. "playback" : "capture");
  304. return -EBUSY;
  305. }
  306. tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
  307. (unsigned long)dmadata);
  308. return 0;
  309. }
  310. static int txx9aclc_pcm_probe(struct platform_device *pdev)
  311. {
  312. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  313. struct txx9aclc_soc_device *dev =
  314. container_of(socdev, struct txx9aclc_soc_device, soc_dev);
  315. struct resource *r;
  316. int i;
  317. int ret;
  318. dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
  319. dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
  320. for (i = 0; i < 2; i++) {
  321. r = platform_get_resource(dev->aclc_pdev, IORESOURCE_DMA, i);
  322. if (!r) {
  323. ret = -EBUSY;
  324. goto exit;
  325. }
  326. dev->dmadata[i].dma_res = r;
  327. ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
  328. if (ret)
  329. goto exit;
  330. }
  331. return 0;
  332. exit:
  333. for (i = 0; i < 2; i++) {
  334. if (dev->dmadata[i].dma_chan)
  335. dma_release_channel(dev->dmadata[i].dma_chan);
  336. dev->dmadata[i].dma_chan = NULL;
  337. }
  338. return ret;
  339. }
  340. static int txx9aclc_pcm_remove(struct platform_device *pdev)
  341. {
  342. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  343. struct txx9aclc_soc_device *dev =
  344. container_of(socdev, struct txx9aclc_soc_device, soc_dev);
  345. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  346. void __iomem *base = drvdata->base;
  347. int i;
  348. /* disable all FIFO DMAs */
  349. __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
  350. /* dummy R/W to clear pending DMAREQ if any */
  351. __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
  352. for (i = 0; i < 2; i++) {
  353. struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
  354. struct dma_chan *chan = dmadata->dma_chan;
  355. if (chan) {
  356. dmadata->frag_count = -1;
  357. chan->device->device_terminate_all(chan);
  358. dma_release_channel(chan);
  359. }
  360. dev->dmadata[i].dma_chan = NULL;
  361. }
  362. return 0;
  363. }
  364. struct snd_soc_platform txx9aclc_soc_platform = {
  365. .name = "txx9aclc-audio",
  366. .probe = txx9aclc_pcm_probe,
  367. .remove = txx9aclc_pcm_remove,
  368. .pcm_ops = &txx9aclc_pcm_ops,
  369. .pcm_new = txx9aclc_pcm_new,
  370. .pcm_free = txx9aclc_pcm_free_dma_buffers,
  371. };
  372. EXPORT_SYMBOL_GPL(txx9aclc_soc_platform);
  373. static int __init txx9aclc_soc_platform_init(void)
  374. {
  375. return snd_soc_register_platform(&txx9aclc_soc_platform);
  376. }
  377. static void __exit txx9aclc_soc_platform_exit(void)
  378. {
  379. snd_soc_unregister_platform(&txx9aclc_soc_platform);
  380. }
  381. module_init(txx9aclc_soc_platform_init);
  382. module_exit(txx9aclc_soc_platform_exit);
  383. MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
  384. MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
  385. MODULE_LICENSE("GPL");