txx9aclc-ac97.c 7.0 KB

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  1. /*
  2. * TXx9 ACLC AC97 driver
  3. *
  4. * Copyright (C) 2009 Atsushi Nemoto
  5. *
  6. * Based on RBTX49xx patch from CELF patch archive.
  7. * (C) Copyright TOSHIBA CORPORATION 2004-2006
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/delay.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/soc.h>
  21. #include "txx9aclc.h"
  22. #define AC97_DIR \
  23. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  24. #define AC97_RATES \
  25. SNDRV_PCM_RATE_8000_48000
  26. #ifdef __BIG_ENDIAN
  27. #define AC97_FMTS SNDRV_PCM_FMTBIT_S16_BE
  28. #else
  29. #define AC97_FMTS SNDRV_PCM_FMTBIT_S16_LE
  30. #endif
  31. static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
  32. /* REVISIT: How to find txx9aclc_soc_device from snd_ac97? */
  33. static struct txx9aclc_soc_device *txx9aclc_soc_dev;
  34. static int txx9aclc_regready(struct txx9aclc_soc_device *dev)
  35. {
  36. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  37. return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
  38. }
  39. /* AC97 controller reads codec register */
  40. static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
  41. unsigned short reg)
  42. {
  43. struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
  44. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  45. void __iomem *base = drvdata->base;
  46. u32 dat;
  47. if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
  48. return 0xffff;
  49. reg |= ac97->num << 7;
  50. dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
  51. __raw_writel(dat, base + ACREGACC);
  52. __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  53. if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
  54. __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  55. dev_err(dev->soc_dev.dev, "ac97 read timeout (reg %#x)\n", reg);
  56. dat = 0xffff;
  57. goto done;
  58. }
  59. dat = __raw_readl(base + ACREGACC);
  60. if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
  61. dev_err(dev->soc_dev.dev, "reg mismatch %x with %x\n",
  62. dat, reg);
  63. dat = 0xffff;
  64. goto done;
  65. }
  66. dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
  67. done:
  68. __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  69. return dat;
  70. }
  71. /* AC97 controller writes to codec register */
  72. static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  73. unsigned short val)
  74. {
  75. struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
  76. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  77. void __iomem *base = drvdata->base;
  78. __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
  79. (val << ACREGACC_DAT_SHIFT),
  80. base + ACREGACC);
  81. __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
  82. if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
  83. dev_err(dev->soc_dev.dev,
  84. "ac97 write timeout (reg %#x)\n", reg);
  85. }
  86. __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
  87. }
  88. static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
  89. {
  90. struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
  91. struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
  92. void __iomem *base = drvdata->base;
  93. u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
  94. __raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
  95. mmiowb();
  96. udelay(1);
  97. __raw_writel(ACCTL_ENLINK, base + ACCTLEN);
  98. /* wait for primary codec ready status */
  99. __raw_writel(ready, base + ACINTEN);
  100. if (!wait_event_timeout(ac97_waitq,
  101. (__raw_readl(base + ACINTSTS) & ready) == ready,
  102. HZ)) {
  103. dev_err(&ac97->dev, "primary codec is not ready "
  104. "(status %#x)\n",
  105. __raw_readl(base + ACINTSTS));
  106. }
  107. __raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
  108. __raw_writel(ready, base + ACINTDIS);
  109. }
  110. /* AC97 controller operations */
  111. struct snd_ac97_bus_ops soc_ac97_ops = {
  112. .read = txx9aclc_ac97_read,
  113. .write = txx9aclc_ac97_write,
  114. .reset = txx9aclc_ac97_cold_reset,
  115. };
  116. EXPORT_SYMBOL_GPL(soc_ac97_ops);
  117. static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
  118. {
  119. struct txx9aclc_plat_drvdata *drvdata = dev_id;
  120. void __iomem *base = drvdata->base;
  121. __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
  122. wake_up(&ac97_waitq);
  123. return IRQ_HANDLED;
  124. }
  125. static int txx9aclc_ac97_probe(struct platform_device *pdev,
  126. struct snd_soc_dai *dai)
  127. {
  128. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  129. struct txx9aclc_soc_device *dev =
  130. container_of(socdev, struct txx9aclc_soc_device, soc_dev);
  131. dev->aclc_pdev = to_platform_device(dai->dev);
  132. txx9aclc_soc_dev = dev;
  133. return 0;
  134. }
  135. static void txx9aclc_ac97_remove(struct platform_device *pdev,
  136. struct snd_soc_dai *dai)
  137. {
  138. struct platform_device *aclc_pdev = to_platform_device(dai->dev);
  139. struct txx9aclc_plat_drvdata *drvdata = platform_get_drvdata(aclc_pdev);
  140. /* disable AC-link */
  141. __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
  142. txx9aclc_soc_dev = NULL;
  143. }
  144. struct snd_soc_dai txx9aclc_ac97_dai = {
  145. .name = "txx9aclc_ac97",
  146. .ac97_control = 1,
  147. .probe = txx9aclc_ac97_probe,
  148. .remove = txx9aclc_ac97_remove,
  149. .playback = {
  150. .rates = AC97_RATES,
  151. .formats = AC97_FMTS,
  152. .channels_min = 2,
  153. .channels_max = 2,
  154. },
  155. .capture = {
  156. .rates = AC97_RATES,
  157. .formats = AC97_FMTS,
  158. .channels_min = 2,
  159. .channels_max = 2,
  160. },
  161. };
  162. EXPORT_SYMBOL_GPL(txx9aclc_ac97_dai);
  163. static int __devinit txx9aclc_ac97_dev_probe(struct platform_device *pdev)
  164. {
  165. struct txx9aclc_plat_drvdata *drvdata;
  166. struct resource *r;
  167. int err;
  168. int irq;
  169. irq = platform_get_irq(pdev, 0);
  170. if (irq < 0)
  171. return irq;
  172. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  173. if (!r)
  174. return -EBUSY;
  175. if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
  176. dev_name(&pdev->dev)))
  177. return -EBUSY;
  178. drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
  179. if (!drvdata)
  180. return -ENOMEM;
  181. platform_set_drvdata(pdev, drvdata);
  182. drvdata->physbase = r->start;
  183. if (sizeof(drvdata->physbase) > sizeof(r->start) &&
  184. r->start >= TXX9_DIRECTMAP_BASE &&
  185. r->start < TXX9_DIRECTMAP_BASE + 0x400000)
  186. drvdata->physbase |= 0xf00000000ull;
  187. drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  188. if (!drvdata->base)
  189. return -EBUSY;
  190. err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
  191. IRQF_DISABLED, dev_name(&pdev->dev), drvdata);
  192. if (err < 0)
  193. return err;
  194. txx9aclc_ac97_dai.dev = &pdev->dev;
  195. return snd_soc_register_dai(&txx9aclc_ac97_dai);
  196. }
  197. static int __devexit txx9aclc_ac97_dev_remove(struct platform_device *pdev)
  198. {
  199. snd_soc_unregister_dai(&txx9aclc_ac97_dai);
  200. return 0;
  201. }
  202. static struct platform_driver txx9aclc_ac97_driver = {
  203. .probe = txx9aclc_ac97_dev_probe,
  204. .remove = __devexit_p(txx9aclc_ac97_dev_remove),
  205. .driver = {
  206. .name = "txx9aclc-ac97",
  207. .owner = THIS_MODULE,
  208. },
  209. };
  210. static int __init txx9aclc_ac97_init(void)
  211. {
  212. return platform_driver_register(&txx9aclc_ac97_driver);
  213. }
  214. static void __exit txx9aclc_ac97_exit(void)
  215. {
  216. platform_driver_unregister(&txx9aclc_ac97_driver);
  217. }
  218. module_init(txx9aclc_ac97_init);
  219. module_exit(txx9aclc_ac97_exit);
  220. MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
  221. MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
  222. MODULE_LICENSE("GPL");