soc-cache.c 5.1 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  17. unsigned int reg)
  18. {
  19. u16 *cache = codec->reg_cache;
  20. if (reg >= codec->reg_cache_size)
  21. return -1;
  22. return cache[reg];
  23. }
  24. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  25. unsigned int value)
  26. {
  27. u16 *cache = codec->reg_cache;
  28. u8 data[2];
  29. int ret;
  30. BUG_ON(codec->volatile_register);
  31. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  32. data[1] = value & 0x00ff;
  33. if (reg < codec->reg_cache_size)
  34. cache[reg] = value;
  35. ret = codec->hw_write(codec->control_data, data, 2);
  36. if (ret == 2)
  37. return 0;
  38. if (ret < 0)
  39. return ret;
  40. else
  41. return -EIO;
  42. }
  43. #if defined(CONFIG_SPI_MASTER)
  44. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  45. int len)
  46. {
  47. struct spi_device *spi = control_data;
  48. struct spi_transfer t;
  49. struct spi_message m;
  50. u8 msg[2];
  51. if (len <= 0)
  52. return 0;
  53. msg[0] = data[0];
  54. msg[1] = data[1];
  55. spi_message_init(&m);
  56. memset(&t, 0, (sizeof t));
  57. t.tx_buf = &msg[0];
  58. t.len = len;
  59. spi_message_add_tail(&t, &m);
  60. spi_sync(spi, &m);
  61. return len;
  62. }
  63. #else
  64. #define snd_soc_7_9_spi_write NULL
  65. #endif
  66. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  67. unsigned int value)
  68. {
  69. u16 *reg_cache = codec->reg_cache;
  70. u8 data[3];
  71. data[0] = reg;
  72. data[1] = (value >> 8) & 0xff;
  73. data[2] = value & 0xff;
  74. if (!snd_soc_codec_volatile_register(codec, reg))
  75. reg_cache[reg] = value;
  76. if (codec->hw_write(codec->control_data, data, 3) == 3)
  77. return 0;
  78. else
  79. return -EIO;
  80. }
  81. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  82. unsigned int reg)
  83. {
  84. u16 *cache = codec->reg_cache;
  85. if (reg >= codec->reg_cache_size ||
  86. snd_soc_codec_volatile_register(codec, reg))
  87. return codec->hw_read(codec, reg);
  88. else
  89. return cache[reg];
  90. }
  91. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  92. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  93. unsigned int r)
  94. {
  95. struct i2c_msg xfer[2];
  96. u8 reg = r;
  97. u16 data;
  98. int ret;
  99. struct i2c_client *client = codec->control_data;
  100. /* Write register */
  101. xfer[0].addr = client->addr;
  102. xfer[0].flags = 0;
  103. xfer[0].len = 1;
  104. xfer[0].buf = &reg;
  105. /* Read data */
  106. xfer[1].addr = client->addr;
  107. xfer[1].flags = I2C_M_RD;
  108. xfer[1].len = 2;
  109. xfer[1].buf = (u8 *)&data;
  110. ret = i2c_transfer(client->adapter, xfer, 2);
  111. if (ret != 2) {
  112. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  113. return 0;
  114. }
  115. return (data >> 8) | ((data & 0xff) << 8);
  116. }
  117. #else
  118. #define snd_soc_8_16_read_i2c NULL
  119. #endif
  120. static struct {
  121. int addr_bits;
  122. int data_bits;
  123. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  124. int (*spi_write)(void *, const char *, int);
  125. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  126. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  127. } io_types[] = {
  128. { 7, 9, snd_soc_7_9_write, snd_soc_7_9_spi_write, snd_soc_7_9_read },
  129. { 8, 16, snd_soc_8_16_write, NULL, snd_soc_8_16_read,
  130. snd_soc_8_16_read_i2c },
  131. };
  132. /**
  133. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  134. *
  135. * @codec: CODEC to configure.
  136. * @type: Type of cache.
  137. * @addr_bits: Number of bits of register address data.
  138. * @data_bits: Number of bits of data per register.
  139. * @control: Control bus used.
  140. *
  141. * Register formats are frequently shared between many I2C and SPI
  142. * devices. In order to promote code reuse the ASoC core provides
  143. * some standard implementations of CODEC read and write operations
  144. * which can be set up using this function.
  145. *
  146. * The caller is responsible for allocating and initialising the
  147. * actual cache.
  148. *
  149. * Note that at present this code cannot be used by CODECs with
  150. * volatile registers.
  151. */
  152. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  153. int addr_bits, int data_bits,
  154. enum snd_soc_control_type control)
  155. {
  156. int i;
  157. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  158. if (io_types[i].addr_bits == addr_bits &&
  159. io_types[i].data_bits == data_bits)
  160. break;
  161. if (i == ARRAY_SIZE(io_types)) {
  162. printk(KERN_ERR
  163. "No I/O functions for %d bit address %d bit data\n",
  164. addr_bits, data_bits);
  165. return -EINVAL;
  166. }
  167. codec->write = io_types[i].write;
  168. codec->read = io_types[i].read;
  169. switch (control) {
  170. case SND_SOC_CUSTOM:
  171. break;
  172. case SND_SOC_I2C:
  173. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  174. codec->hw_write = (hw_write_t)i2c_master_send;
  175. #endif
  176. if (io_types[i].i2c_read)
  177. codec->hw_read = io_types[i].i2c_read;
  178. break;
  179. case SND_SOC_SPI:
  180. if (io_types[i].spi_write)
  181. codec->hw_write = io_types[i].spi_write;
  182. break;
  183. }
  184. return 0;
  185. }
  186. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);