s6000-i2s.c 16 KB

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  1. /*
  2. * ALSA SoC I2S Audio Layer for the Stretch S6000 family
  3. *
  4. * Author: Daniel Gloeckner, <dg@emlix.com>
  5. * Copyright: (C) 2009 emlix GmbH <info@emlix.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/device.h>
  14. #include <linux/delay.h>
  15. #include <linux/clk.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/io.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/initval.h>
  22. #include <sound/soc.h>
  23. #include "s6000-i2s.h"
  24. #include "s6000-pcm.h"
  25. struct s6000_i2s_dev {
  26. dma_addr_t sifbase;
  27. u8 __iomem *scbbase;
  28. unsigned int wide;
  29. unsigned int channel_in;
  30. unsigned int channel_out;
  31. unsigned int lines_in;
  32. unsigned int lines_out;
  33. struct s6000_pcm_dma_params dma_params;
  34. };
  35. #define S6_I2S_INTERRUPT_STATUS 0x00
  36. #define S6_I2S_INT_OVERRUN 1
  37. #define S6_I2S_INT_UNDERRUN 2
  38. #define S6_I2S_INT_ALIGNMENT 4
  39. #define S6_I2S_INTERRUPT_ENABLE 0x04
  40. #define S6_I2S_INTERRUPT_RAW 0x08
  41. #define S6_I2S_INTERRUPT_CLEAR 0x0C
  42. #define S6_I2S_INTERRUPT_SET 0x10
  43. #define S6_I2S_MODE 0x20
  44. #define S6_I2S_DUAL 0
  45. #define S6_I2S_WIDE 1
  46. #define S6_I2S_TX_DEFAULT 0x24
  47. #define S6_I2S_DATA_CFG(c) (0x40 + 0x10 * (c))
  48. #define S6_I2S_IN 0
  49. #define S6_I2S_OUT 1
  50. #define S6_I2S_UNUSED 2
  51. #define S6_I2S_INTERFACE_CFG(c) (0x44 + 0x10 * (c))
  52. #define S6_I2S_DIV_MASK 0x001fff
  53. #define S6_I2S_16BIT 0x000000
  54. #define S6_I2S_20BIT 0x002000
  55. #define S6_I2S_24BIT 0x004000
  56. #define S6_I2S_32BIT 0x006000
  57. #define S6_I2S_BITS_MASK 0x006000
  58. #define S6_I2S_MEM_16BIT 0x000000
  59. #define S6_I2S_MEM_32BIT 0x008000
  60. #define S6_I2S_MEM_MASK 0x008000
  61. #define S6_I2S_CHANNELS_SHIFT 16
  62. #define S6_I2S_CHANNELS_MASK 0x030000
  63. #define S6_I2S_SCK_IN 0x000000
  64. #define S6_I2S_SCK_OUT 0x040000
  65. #define S6_I2S_SCK_DIR 0x040000
  66. #define S6_I2S_WS_IN 0x000000
  67. #define S6_I2S_WS_OUT 0x080000
  68. #define S6_I2S_WS_DIR 0x080000
  69. #define S6_I2S_LEFT_FIRST 0x000000
  70. #define S6_I2S_RIGHT_FIRST 0x100000
  71. #define S6_I2S_FIRST 0x100000
  72. #define S6_I2S_CUR_SCK 0x200000
  73. #define S6_I2S_CUR_WS 0x400000
  74. #define S6_I2S_ENABLE(c) (0x48 + 0x10 * (c))
  75. #define S6_I2S_DISABLE_IF 0x02
  76. #define S6_I2S_ENABLE_IF 0x03
  77. #define S6_I2S_IS_BUSY 0x04
  78. #define S6_I2S_DMA_ACTIVE 0x08
  79. #define S6_I2S_IS_ENABLED 0x10
  80. #define S6_I2S_NUM_LINES 4
  81. #define S6_I2S_SIF_PORT0 0x0000000
  82. #define S6_I2S_SIF_PORT1 0x0000080 /* docs say 0x0000010 */
  83. static inline void s6_i2s_write_reg(struct s6000_i2s_dev *dev, int reg, u32 val)
  84. {
  85. writel(val, dev->scbbase + reg);
  86. }
  87. static inline u32 s6_i2s_read_reg(struct s6000_i2s_dev *dev, int reg)
  88. {
  89. return readl(dev->scbbase + reg);
  90. }
  91. static inline void s6_i2s_mod_reg(struct s6000_i2s_dev *dev, int reg,
  92. u32 mask, u32 val)
  93. {
  94. val ^= s6_i2s_read_reg(dev, reg) & ~mask;
  95. s6_i2s_write_reg(dev, reg, val);
  96. }
  97. static void s6000_i2s_start_channel(struct s6000_i2s_dev *dev, int channel)
  98. {
  99. int i, j, cur, prev;
  100. /*
  101. * Wait for WCLK to toggle 5 times before enabling the channel
  102. * s6000 Family Datasheet 3.6.4:
  103. * "At least two cycles of WS must occur between commands
  104. * to disable or enable the interface"
  105. */
  106. j = 0;
  107. prev = ~S6_I2S_CUR_WS;
  108. for (i = 1000000; --i && j < 6; ) {
  109. cur = s6_i2s_read_reg(dev, S6_I2S_INTERFACE_CFG(channel))
  110. & S6_I2S_CUR_WS;
  111. if (prev != cur) {
  112. prev = cur;
  113. j++;
  114. }
  115. }
  116. if (j < 6)
  117. printk(KERN_WARNING "s6000-i2s: timeout waiting for WCLK\n");
  118. s6_i2s_write_reg(dev, S6_I2S_ENABLE(channel), S6_I2S_ENABLE_IF);
  119. }
  120. static void s6000_i2s_stop_channel(struct s6000_i2s_dev *dev, int channel)
  121. {
  122. s6_i2s_write_reg(dev, S6_I2S_ENABLE(channel), S6_I2S_DISABLE_IF);
  123. }
  124. static void s6000_i2s_start(struct snd_pcm_substream *substream)
  125. {
  126. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  127. struct s6000_i2s_dev *dev = rtd->dai->cpu_dai->private_data;
  128. int channel;
  129. channel = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  130. dev->channel_out : dev->channel_in;
  131. s6000_i2s_start_channel(dev, channel);
  132. }
  133. static void s6000_i2s_stop(struct snd_pcm_substream *substream)
  134. {
  135. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  136. struct s6000_i2s_dev *dev = rtd->dai->cpu_dai->private_data;
  137. int channel;
  138. channel = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  139. dev->channel_out : dev->channel_in;
  140. s6000_i2s_stop_channel(dev, channel);
  141. }
  142. static int s6000_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  143. int after)
  144. {
  145. switch (cmd) {
  146. case SNDRV_PCM_TRIGGER_START:
  147. case SNDRV_PCM_TRIGGER_RESUME:
  148. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  149. if ((substream->stream == SNDRV_PCM_STREAM_CAPTURE) ^ !after)
  150. s6000_i2s_start(substream);
  151. break;
  152. case SNDRV_PCM_TRIGGER_STOP:
  153. case SNDRV_PCM_TRIGGER_SUSPEND:
  154. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  155. if (!after)
  156. s6000_i2s_stop(substream);
  157. }
  158. return 0;
  159. }
  160. static unsigned int s6000_i2s_int_sources(struct s6000_i2s_dev *dev)
  161. {
  162. unsigned int pending;
  163. pending = s6_i2s_read_reg(dev, S6_I2S_INTERRUPT_RAW);
  164. pending &= S6_I2S_INT_ALIGNMENT |
  165. S6_I2S_INT_UNDERRUN |
  166. S6_I2S_INT_OVERRUN;
  167. s6_i2s_write_reg(dev, S6_I2S_INTERRUPT_CLEAR, pending);
  168. return pending;
  169. }
  170. static unsigned int s6000_i2s_check_xrun(struct snd_soc_dai *cpu_dai)
  171. {
  172. struct s6000_i2s_dev *dev = cpu_dai->private_data;
  173. unsigned int errors;
  174. unsigned int ret;
  175. errors = s6000_i2s_int_sources(dev);
  176. if (likely(!errors))
  177. return 0;
  178. ret = 0;
  179. if (errors & S6_I2S_INT_ALIGNMENT)
  180. printk(KERN_ERR "s6000-i2s: WCLK misaligned\n");
  181. if (errors & S6_I2S_INT_UNDERRUN)
  182. ret |= 1 << SNDRV_PCM_STREAM_PLAYBACK;
  183. if (errors & S6_I2S_INT_OVERRUN)
  184. ret |= 1 << SNDRV_PCM_STREAM_CAPTURE;
  185. return ret;
  186. }
  187. static void s6000_i2s_wait_disabled(struct s6000_i2s_dev *dev)
  188. {
  189. int channel;
  190. int n = 50;
  191. for (channel = 0; channel < 2; channel++) {
  192. while (--n >= 0) {
  193. int v = s6_i2s_read_reg(dev, S6_I2S_ENABLE(channel));
  194. if ((v & S6_I2S_IS_ENABLED)
  195. || !(v & (S6_I2S_DMA_ACTIVE | S6_I2S_IS_BUSY)))
  196. break;
  197. udelay(20);
  198. }
  199. }
  200. if (n < 0)
  201. printk(KERN_WARNING "s6000-i2s: timeout disabling interfaces");
  202. }
  203. static int s6000_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
  204. unsigned int fmt)
  205. {
  206. struct s6000_i2s_dev *dev = cpu_dai->private_data;
  207. u32 w;
  208. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  209. case SND_SOC_DAIFMT_CBM_CFM:
  210. w = S6_I2S_SCK_IN | S6_I2S_WS_IN;
  211. break;
  212. case SND_SOC_DAIFMT_CBS_CFM:
  213. w = S6_I2S_SCK_OUT | S6_I2S_WS_IN;
  214. break;
  215. case SND_SOC_DAIFMT_CBM_CFS:
  216. w = S6_I2S_SCK_IN | S6_I2S_WS_OUT;
  217. break;
  218. case SND_SOC_DAIFMT_CBS_CFS:
  219. w = S6_I2S_SCK_OUT | S6_I2S_WS_OUT;
  220. break;
  221. default:
  222. return -EINVAL;
  223. }
  224. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  225. case SND_SOC_DAIFMT_NB_NF:
  226. w |= S6_I2S_LEFT_FIRST;
  227. break;
  228. case SND_SOC_DAIFMT_NB_IF:
  229. w |= S6_I2S_RIGHT_FIRST;
  230. break;
  231. default:
  232. return -EINVAL;
  233. }
  234. s6_i2s_mod_reg(dev, S6_I2S_INTERFACE_CFG(0),
  235. S6_I2S_FIRST | S6_I2S_WS_DIR | S6_I2S_SCK_DIR, w);
  236. s6_i2s_mod_reg(dev, S6_I2S_INTERFACE_CFG(1),
  237. S6_I2S_FIRST | S6_I2S_WS_DIR | S6_I2S_SCK_DIR, w);
  238. return 0;
  239. }
  240. static int s6000_i2s_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div)
  241. {
  242. struct s6000_i2s_dev *dev = dai->private_data;
  243. if (!div || (div & 1) || div > (S6_I2S_DIV_MASK + 1) * 2)
  244. return -EINVAL;
  245. s6_i2s_mod_reg(dev, S6_I2S_INTERFACE_CFG(div_id),
  246. S6_I2S_DIV_MASK, div / 2 - 1);
  247. return 0;
  248. }
  249. static int s6000_i2s_hw_params(struct snd_pcm_substream *substream,
  250. struct snd_pcm_hw_params *params,
  251. struct snd_soc_dai *dai)
  252. {
  253. struct s6000_i2s_dev *dev = dai->private_data;
  254. int interf;
  255. u32 w = 0;
  256. if (dev->wide)
  257. interf = 0;
  258. else {
  259. w |= (((params_channels(params) - 2) / 2)
  260. << S6_I2S_CHANNELS_SHIFT) & S6_I2S_CHANNELS_MASK;
  261. interf = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  262. ? dev->channel_out : dev->channel_in;
  263. }
  264. switch (params_format(params)) {
  265. case SNDRV_PCM_FORMAT_S16_LE:
  266. w |= S6_I2S_16BIT | S6_I2S_MEM_16BIT;
  267. break;
  268. case SNDRV_PCM_FORMAT_S32_LE:
  269. w |= S6_I2S_32BIT | S6_I2S_MEM_32BIT;
  270. break;
  271. default:
  272. printk(KERN_WARNING "s6000-i2s: unsupported PCM format %x\n",
  273. params_format(params));
  274. return -EINVAL;
  275. }
  276. if (s6_i2s_read_reg(dev, S6_I2S_INTERFACE_CFG(interf))
  277. & S6_I2S_IS_ENABLED) {
  278. printk(KERN_ERR "s6000-i2s: interface already enabled\n");
  279. return -EBUSY;
  280. }
  281. s6_i2s_mod_reg(dev, S6_I2S_INTERFACE_CFG(interf),
  282. S6_I2S_CHANNELS_MASK|S6_I2S_MEM_MASK|S6_I2S_BITS_MASK,
  283. w);
  284. return 0;
  285. }
  286. static int s6000_i2s_dai_probe(struct platform_device *pdev,
  287. struct snd_soc_dai *dai)
  288. {
  289. struct s6000_i2s_dev *dev = dai->private_data;
  290. struct s6000_snd_platform_data *pdata = pdev->dev.platform_data;
  291. if (!pdata)
  292. return -EINVAL;
  293. dev->wide = pdata->wide;
  294. dev->channel_in = pdata->channel_in;
  295. dev->channel_out = pdata->channel_out;
  296. dev->lines_in = pdata->lines_in;
  297. dev->lines_out = pdata->lines_out;
  298. s6_i2s_write_reg(dev, S6_I2S_MODE,
  299. dev->wide ? S6_I2S_WIDE : S6_I2S_DUAL);
  300. if (dev->wide) {
  301. int i;
  302. if (dev->lines_in + dev->lines_out > S6_I2S_NUM_LINES)
  303. return -EINVAL;
  304. dev->channel_in = 0;
  305. dev->channel_out = 1;
  306. dai->capture.channels_min = 2 * dev->lines_in;
  307. dai->capture.channels_max = dai->capture.channels_min;
  308. dai->playback.channels_min = 2 * dev->lines_out;
  309. dai->playback.channels_max = dai->playback.channels_min;
  310. for (i = 0; i < dev->lines_out; i++)
  311. s6_i2s_write_reg(dev, S6_I2S_DATA_CFG(i), S6_I2S_OUT);
  312. for (; i < S6_I2S_NUM_LINES - dev->lines_in; i++)
  313. s6_i2s_write_reg(dev, S6_I2S_DATA_CFG(i),
  314. S6_I2S_UNUSED);
  315. for (; i < S6_I2S_NUM_LINES; i++)
  316. s6_i2s_write_reg(dev, S6_I2S_DATA_CFG(i), S6_I2S_IN);
  317. } else {
  318. unsigned int cfg[2] = {S6_I2S_UNUSED, S6_I2S_UNUSED};
  319. if (dev->lines_in > 1 || dev->lines_out > 1)
  320. return -EINVAL;
  321. dai->capture.channels_min = 2 * dev->lines_in;
  322. dai->capture.channels_max = 8 * dev->lines_in;
  323. dai->playback.channels_min = 2 * dev->lines_out;
  324. dai->playback.channels_max = 8 * dev->lines_out;
  325. if (dev->lines_in)
  326. cfg[dev->channel_in] = S6_I2S_IN;
  327. if (dev->lines_out)
  328. cfg[dev->channel_out] = S6_I2S_OUT;
  329. s6_i2s_write_reg(dev, S6_I2S_DATA_CFG(0), cfg[0]);
  330. s6_i2s_write_reg(dev, S6_I2S_DATA_CFG(1), cfg[1]);
  331. }
  332. if (dev->lines_out) {
  333. if (dev->lines_in) {
  334. if (!dev->dma_params.dma_out)
  335. return -ENODEV;
  336. } else {
  337. dev->dma_params.dma_out = dev->dma_params.dma_in;
  338. dev->dma_params.dma_in = 0;
  339. }
  340. }
  341. dev->dma_params.sif_in = dev->sifbase + (dev->channel_in ?
  342. S6_I2S_SIF_PORT1 : S6_I2S_SIF_PORT0);
  343. dev->dma_params.sif_out = dev->sifbase + (dev->channel_out ?
  344. S6_I2S_SIF_PORT1 : S6_I2S_SIF_PORT0);
  345. dev->dma_params.same_rate = pdata->same_rate | pdata->wide;
  346. return 0;
  347. }
  348. #define S6000_I2S_RATES (SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_5512 | \
  349. SNDRV_PCM_RATE_8000_192000)
  350. #define S6000_I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  351. static struct snd_soc_dai_ops s6000_i2s_dai_ops = {
  352. .set_fmt = s6000_i2s_set_dai_fmt,
  353. .set_clkdiv = s6000_i2s_set_clkdiv,
  354. .hw_params = s6000_i2s_hw_params,
  355. };
  356. struct snd_soc_dai s6000_i2s_dai = {
  357. .name = "s6000-i2s",
  358. .id = 0,
  359. .probe = s6000_i2s_dai_probe,
  360. .playback = {
  361. .channels_min = 2,
  362. .channels_max = 8,
  363. .formats = S6000_I2S_FORMATS,
  364. .rates = S6000_I2S_RATES,
  365. .rate_min = 0,
  366. .rate_max = 1562500,
  367. },
  368. .capture = {
  369. .channels_min = 2,
  370. .channels_max = 8,
  371. .formats = S6000_I2S_FORMATS,
  372. .rates = S6000_I2S_RATES,
  373. .rate_min = 0,
  374. .rate_max = 1562500,
  375. },
  376. .ops = &s6000_i2s_dai_ops,
  377. }
  378. EXPORT_SYMBOL_GPL(s6000_i2s_dai);
  379. static int __devinit s6000_i2s_probe(struct platform_device *pdev)
  380. {
  381. struct s6000_i2s_dev *dev;
  382. struct resource *scbmem, *sifmem, *region, *dma1, *dma2;
  383. u8 __iomem *mmio;
  384. int ret;
  385. scbmem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  386. if (!scbmem) {
  387. dev_err(&pdev->dev, "no mem resource?\n");
  388. ret = -ENODEV;
  389. goto err_release_none;
  390. }
  391. region = request_mem_region(scbmem->start,
  392. scbmem->end - scbmem->start + 1,
  393. pdev->name);
  394. if (!region) {
  395. dev_err(&pdev->dev, "I2S SCB region already claimed\n");
  396. ret = -EBUSY;
  397. goto err_release_none;
  398. }
  399. mmio = ioremap(scbmem->start, scbmem->end - scbmem->start + 1);
  400. if (!mmio) {
  401. dev_err(&pdev->dev, "can't ioremap SCB region\n");
  402. ret = -ENOMEM;
  403. goto err_release_scb;
  404. }
  405. sifmem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  406. if (!sifmem) {
  407. dev_err(&pdev->dev, "no second mem resource?\n");
  408. ret = -ENODEV;
  409. goto err_release_map;
  410. }
  411. region = request_mem_region(sifmem->start,
  412. sifmem->end - sifmem->start + 1,
  413. pdev->name);
  414. if (!region) {
  415. dev_err(&pdev->dev, "I2S SIF region already claimed\n");
  416. ret = -EBUSY;
  417. goto err_release_map;
  418. }
  419. dma1 = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  420. if (!dma1) {
  421. dev_err(&pdev->dev, "no dma resource?\n");
  422. ret = -ENODEV;
  423. goto err_release_sif;
  424. }
  425. region = request_mem_region(dma1->start, dma1->end - dma1->start + 1,
  426. pdev->name);
  427. if (!region) {
  428. dev_err(&pdev->dev, "I2S DMA region already claimed\n");
  429. ret = -EBUSY;
  430. goto err_release_sif;
  431. }
  432. dma2 = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  433. if (dma2) {
  434. region = request_mem_region(dma2->start,
  435. dma2->end - dma2->start + 1,
  436. pdev->name);
  437. if (!region) {
  438. dev_err(&pdev->dev,
  439. "I2S DMA region already claimed\n");
  440. ret = -EBUSY;
  441. goto err_release_dma1;
  442. }
  443. }
  444. dev = kzalloc(sizeof(struct s6000_i2s_dev), GFP_KERNEL);
  445. if (!dev) {
  446. ret = -ENOMEM;
  447. goto err_release_dma2;
  448. }
  449. s6000_i2s_dai.dev = &pdev->dev;
  450. s6000_i2s_dai.private_data = dev;
  451. s6000_i2s_dai.dma_data = &dev->dma_params;
  452. dev->sifbase = sifmem->start;
  453. dev->scbbase = mmio;
  454. s6_i2s_write_reg(dev, S6_I2S_INTERRUPT_ENABLE, 0);
  455. s6_i2s_write_reg(dev, S6_I2S_INTERRUPT_CLEAR,
  456. S6_I2S_INT_ALIGNMENT |
  457. S6_I2S_INT_UNDERRUN |
  458. S6_I2S_INT_OVERRUN);
  459. s6000_i2s_stop_channel(dev, 0);
  460. s6000_i2s_stop_channel(dev, 1);
  461. s6000_i2s_wait_disabled(dev);
  462. dev->dma_params.check_xrun = s6000_i2s_check_xrun;
  463. dev->dma_params.trigger = s6000_i2s_trigger;
  464. dev->dma_params.dma_in = dma1->start;
  465. dev->dma_params.dma_out = dma2 ? dma2->start : 0;
  466. dev->dma_params.irq = platform_get_irq(pdev, 0);
  467. if (dev->dma_params.irq < 0) {
  468. dev_err(&pdev->dev, "no irq resource?\n");
  469. ret = -ENODEV;
  470. goto err_release_dev;
  471. }
  472. s6_i2s_write_reg(dev, S6_I2S_INTERRUPT_ENABLE,
  473. S6_I2S_INT_ALIGNMENT |
  474. S6_I2S_INT_UNDERRUN |
  475. S6_I2S_INT_OVERRUN);
  476. ret = snd_soc_register_dai(&s6000_i2s_dai);
  477. if (ret)
  478. goto err_release_dev;
  479. return 0;
  480. err_release_dev:
  481. kfree(dev);
  482. err_release_dma2:
  483. if (dma2)
  484. release_mem_region(dma2->start, dma2->end - dma2->start + 1);
  485. err_release_dma1:
  486. release_mem_region(dma1->start, dma1->end - dma1->start + 1);
  487. err_release_sif:
  488. release_mem_region(sifmem->start, (sifmem->end - sifmem->start) + 1);
  489. err_release_map:
  490. iounmap(mmio);
  491. err_release_scb:
  492. release_mem_region(scbmem->start, (scbmem->end - scbmem->start) + 1);
  493. err_release_none:
  494. return ret;
  495. }
  496. static void __devexit s6000_i2s_remove(struct platform_device *pdev)
  497. {
  498. struct s6000_i2s_dev *dev = s6000_i2s_dai.private_data;
  499. struct resource *region;
  500. void __iomem *mmio = dev->scbbase;
  501. snd_soc_unregister_dai(&s6000_i2s_dai);
  502. s6000_i2s_stop_channel(dev, 0);
  503. s6000_i2s_stop_channel(dev, 1);
  504. s6_i2s_write_reg(dev, S6_I2S_INTERRUPT_ENABLE, 0);
  505. s6000_i2s_dai.private_data = 0;
  506. kfree(dev);
  507. region = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  508. release_mem_region(region->start, region->end - region->start + 1);
  509. region = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  510. if (region)
  511. release_mem_region(region->start,
  512. region->end - region->start + 1);
  513. region = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  514. release_mem_region(region->start, (region->end - region->start) + 1);
  515. iounmap(mmio);
  516. region = platform_get_resource(pdev, IORESOURCE_IO, 0);
  517. release_mem_region(region->start, (region->end - region->start) + 1);
  518. }
  519. static struct platform_driver s6000_i2s_driver = {
  520. .probe = s6000_i2s_probe,
  521. .remove = __devexit_p(s6000_i2s_remove),
  522. .driver = {
  523. .name = "s6000-i2s",
  524. .owner = THIS_MODULE,
  525. },
  526. };
  527. static int __init s6000_i2s_init(void)
  528. {
  529. return platform_driver_register(&s6000_i2s_driver);
  530. }
  531. module_init(s6000_i2s_init);
  532. static void __exit s6000_i2s_exit(void)
  533. {
  534. platform_driver_unregister(&s6000_i2s_driver);
  535. }
  536. module_exit(s6000_i2s_exit);
  537. MODULE_AUTHOR("Daniel Gloeckner");
  538. MODULE_DESCRIPTION("Stretch s6000 family I2S SoC Interface");
  539. MODULE_LICENSE("GPL");