wm8523.c 17 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include "wm8523.h"
  29. static struct snd_soc_codec *wm8523_codec;
  30. struct snd_soc_codec_device soc_codec_dev_wm8523;
  31. #define WM8523_NUM_SUPPLIES 2
  32. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  33. "AVDD",
  34. "LINEVDD",
  35. };
  36. #define WM8523_NUM_RATES 7
  37. /* codec private data */
  38. struct wm8523_priv {
  39. struct snd_soc_codec codec;
  40. u16 reg_cache[WM8523_REGISTER_COUNT];
  41. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  42. unsigned int sysclk;
  43. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  44. struct snd_pcm_hw_constraint_list rate_constraint;
  45. };
  46. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  47. 0x8523, /* R0 - DEVICE_ID */
  48. 0x0001, /* R1 - REVISION */
  49. 0x0000, /* R2 - PSCTRL1 */
  50. 0x1812, /* R3 - AIF_CTRL1 */
  51. 0x0000, /* R4 - AIF_CTRL2 */
  52. 0x0001, /* R5 - DAC_CTRL3 */
  53. 0x0190, /* R6 - DAC_GAINL */
  54. 0x0190, /* R7 - DAC_GAINR */
  55. 0x0000, /* R8 - ZERO_DETECT */
  56. };
  57. static int wm8523_volatile_register(unsigned int reg)
  58. {
  59. switch (reg) {
  60. case WM8523_DEVICE_ID:
  61. case WM8523_REVISION:
  62. return 1;
  63. default:
  64. return 0;
  65. }
  66. }
  67. static int wm8523_reset(struct snd_soc_codec *codec)
  68. {
  69. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  70. }
  71. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  72. static const char *wm8523_zd_count_text[] = {
  73. "1024",
  74. "2048",
  75. };
  76. static const struct soc_enum wm8523_zc_count =
  77. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  78. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  79. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  80. 0, 448, 0, dac_tlv),
  81. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  82. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  83. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  84. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  85. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  86. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  87. };
  88. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  89. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  90. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  91. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  92. };
  93. static const struct snd_soc_dapm_route intercon[] = {
  94. { "LINEVOUTL", NULL, "DAC" },
  95. { "LINEVOUTR", NULL, "DAC" },
  96. };
  97. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  98. {
  99. snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
  100. ARRAY_SIZE(wm8523_dapm_widgets));
  101. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  102. snd_soc_dapm_new_widgets(codec);
  103. return 0;
  104. }
  105. static struct {
  106. int value;
  107. int ratio;
  108. } lrclk_ratios[WM8523_NUM_RATES] = {
  109. { 1, 128 },
  110. { 2, 192 },
  111. { 3, 256 },
  112. { 4, 384 },
  113. { 5, 512 },
  114. { 6, 768 },
  115. { 7, 1152 },
  116. };
  117. static int wm8523_startup(struct snd_pcm_substream *substream,
  118. struct snd_soc_dai *dai)
  119. {
  120. struct snd_soc_codec *codec = dai->codec;
  121. struct wm8523_priv *wm8523 = codec->private_data;
  122. /* The set of sample rates that can be supported depends on the
  123. * MCLK supplied to the CODEC - enforce this.
  124. */
  125. if (!wm8523->sysclk) {
  126. dev_err(codec->dev,
  127. "No MCLK configured, call set_sysclk() on init\n");
  128. return -EINVAL;
  129. }
  130. return 0;
  131. snd_pcm_hw_constraint_list(substream->runtime, 0,
  132. SNDRV_PCM_HW_PARAM_RATE,
  133. &wm8523->rate_constraint);
  134. return 0;
  135. }
  136. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  137. struct snd_pcm_hw_params *params,
  138. struct snd_soc_dai *dai)
  139. {
  140. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  141. struct snd_soc_device *socdev = rtd->socdev;
  142. struct snd_soc_codec *codec = socdev->card->codec;
  143. struct wm8523_priv *wm8523 = codec->private_data;
  144. int i;
  145. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  146. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  147. /* Find a supported LRCLK ratio */
  148. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  149. if (wm8523->sysclk / params_rate(params) ==
  150. lrclk_ratios[i].ratio)
  151. break;
  152. }
  153. /* Should never happen, should be handled by constraints */
  154. if (i == ARRAY_SIZE(lrclk_ratios)) {
  155. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  156. wm8523->sysclk / params_rate(params));
  157. return -EINVAL;
  158. }
  159. aifctrl2 &= ~WM8523_SR_MASK;
  160. aifctrl2 |= lrclk_ratios[i].value;
  161. aifctrl1 &= ~WM8523_WL_MASK;
  162. switch (params_format(params)) {
  163. case SNDRV_PCM_FORMAT_S16_LE:
  164. break;
  165. case SNDRV_PCM_FORMAT_S20_3LE:
  166. aifctrl1 |= 0x8;
  167. break;
  168. case SNDRV_PCM_FORMAT_S24_LE:
  169. aifctrl1 |= 0x10;
  170. break;
  171. case SNDRV_PCM_FORMAT_S32_LE:
  172. aifctrl1 |= 0x18;
  173. break;
  174. }
  175. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  176. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  177. return 0;
  178. }
  179. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  180. int clk_id, unsigned int freq, int dir)
  181. {
  182. struct snd_soc_codec *codec = codec_dai->codec;
  183. struct wm8523_priv *wm8523 = codec->private_data;
  184. unsigned int val;
  185. int i;
  186. wm8523->sysclk = freq;
  187. wm8523->rate_constraint.count = 0;
  188. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  189. val = freq / lrclk_ratios[i].ratio;
  190. /* Check that it's a standard rate since core can't
  191. * cope with others and having the odd rates confuses
  192. * constraint matching.
  193. */
  194. switch (val) {
  195. case 8000:
  196. case 11025:
  197. case 16000:
  198. case 22050:
  199. case 32000:
  200. case 44100:
  201. case 48000:
  202. case 64000:
  203. case 88200:
  204. case 96000:
  205. case 176400:
  206. case 192000:
  207. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  208. val);
  209. wm8523->rate_constraint_list[i] = val;
  210. wm8523->rate_constraint.count++;
  211. break;
  212. default:
  213. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  214. val);
  215. }
  216. }
  217. /* Need at least one supported rate... */
  218. if (wm8523->rate_constraint.count == 0)
  219. return -EINVAL;
  220. return 0;
  221. }
  222. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  223. unsigned int fmt)
  224. {
  225. struct snd_soc_codec *codec = codec_dai->codec;
  226. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  227. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  228. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  229. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  230. case SND_SOC_DAIFMT_CBM_CFM:
  231. aifctrl1 |= WM8523_AIF_MSTR;
  232. break;
  233. case SND_SOC_DAIFMT_CBS_CFS:
  234. break;
  235. default:
  236. return -EINVAL;
  237. }
  238. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  239. case SND_SOC_DAIFMT_I2S:
  240. aifctrl1 |= 0x0002;
  241. break;
  242. case SND_SOC_DAIFMT_RIGHT_J:
  243. break;
  244. case SND_SOC_DAIFMT_LEFT_J:
  245. aifctrl1 |= 0x0001;
  246. break;
  247. case SND_SOC_DAIFMT_DSP_A:
  248. aifctrl1 |= 0x0003;
  249. break;
  250. case SND_SOC_DAIFMT_DSP_B:
  251. aifctrl1 |= 0x0023;
  252. break;
  253. default:
  254. return -EINVAL;
  255. }
  256. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  257. case SND_SOC_DAIFMT_NB_NF:
  258. break;
  259. case SND_SOC_DAIFMT_IB_IF:
  260. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  261. break;
  262. case SND_SOC_DAIFMT_IB_NF:
  263. aifctrl1 |= WM8523_BCLK_INV;
  264. break;
  265. case SND_SOC_DAIFMT_NB_IF:
  266. aifctrl1 |= WM8523_LRCLK_INV;
  267. break;
  268. default:
  269. return -EINVAL;
  270. }
  271. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  272. return 0;
  273. }
  274. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  275. enum snd_soc_bias_level level)
  276. {
  277. struct wm8523_priv *wm8523 = codec->private_data;
  278. int ret, i;
  279. switch (level) {
  280. case SND_SOC_BIAS_ON:
  281. break;
  282. case SND_SOC_BIAS_PREPARE:
  283. /* Full power on */
  284. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  285. WM8523_SYS_ENA_MASK, 3);
  286. break;
  287. case SND_SOC_BIAS_STANDBY:
  288. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  289. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  290. wm8523->supplies);
  291. if (ret != 0) {
  292. dev_err(codec->dev,
  293. "Failed to enable supplies: %d\n",
  294. ret);
  295. return ret;
  296. }
  297. /* Initial power up */
  298. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  299. WM8523_SYS_ENA_MASK, 1);
  300. /* Sync back default/cached values */
  301. for (i = WM8523_AIF_CTRL1;
  302. i < WM8523_MAX_REGISTER; i++)
  303. snd_soc_write(codec, i, wm8523->reg_cache[i]);
  304. msleep(100);
  305. }
  306. /* Power up to mute */
  307. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  308. WM8523_SYS_ENA_MASK, 2);
  309. break;
  310. case SND_SOC_BIAS_OFF:
  311. /* The chip runs through the power down sequence for us. */
  312. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  313. WM8523_SYS_ENA_MASK, 0);
  314. msleep(100);
  315. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  316. wm8523->supplies);
  317. break;
  318. }
  319. codec->bias_level = level;
  320. return 0;
  321. }
  322. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  323. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  324. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  325. static struct snd_soc_dai_ops wm8523_dai_ops = {
  326. .startup = wm8523_startup,
  327. .hw_params = wm8523_hw_params,
  328. .set_sysclk = wm8523_set_dai_sysclk,
  329. .set_fmt = wm8523_set_dai_fmt,
  330. };
  331. struct snd_soc_dai wm8523_dai = {
  332. .name = "WM8523",
  333. .playback = {
  334. .stream_name = "Playback",
  335. .channels_min = 2, /* Mono modes not yet supported */
  336. .channels_max = 2,
  337. .rates = WM8523_RATES,
  338. .formats = WM8523_FORMATS,
  339. },
  340. .ops = &wm8523_dai_ops,
  341. };
  342. EXPORT_SYMBOL_GPL(wm8523_dai);
  343. #ifdef CONFIG_PM
  344. static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
  345. {
  346. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  347. struct snd_soc_codec *codec = socdev->card->codec;
  348. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  349. return 0;
  350. }
  351. static int wm8523_resume(struct platform_device *pdev)
  352. {
  353. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  354. struct snd_soc_codec *codec = socdev->card->codec;
  355. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  356. return 0;
  357. }
  358. #else
  359. #define wm8523_suspend NULL
  360. #define wm8523_resume NULL
  361. #endif
  362. static int wm8523_probe(struct platform_device *pdev)
  363. {
  364. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  365. struct snd_soc_codec *codec;
  366. int ret = 0;
  367. if (wm8523_codec == NULL) {
  368. dev_err(&pdev->dev, "Codec device not registered\n");
  369. return -ENODEV;
  370. }
  371. socdev->card->codec = wm8523_codec;
  372. codec = wm8523_codec;
  373. /* register pcms */
  374. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  375. if (ret < 0) {
  376. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  377. goto pcm_err;
  378. }
  379. snd_soc_add_controls(codec, wm8523_snd_controls,
  380. ARRAY_SIZE(wm8523_snd_controls));
  381. wm8523_add_widgets(codec);
  382. ret = snd_soc_init_card(socdev);
  383. if (ret < 0) {
  384. dev_err(codec->dev, "failed to register card: %d\n", ret);
  385. goto card_err;
  386. }
  387. return ret;
  388. card_err:
  389. snd_soc_free_pcms(socdev);
  390. snd_soc_dapm_free(socdev);
  391. pcm_err:
  392. return ret;
  393. }
  394. static int wm8523_remove(struct platform_device *pdev)
  395. {
  396. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  397. snd_soc_free_pcms(socdev);
  398. snd_soc_dapm_free(socdev);
  399. return 0;
  400. }
  401. struct snd_soc_codec_device soc_codec_dev_wm8523 = {
  402. .probe = wm8523_probe,
  403. .remove = wm8523_remove,
  404. .suspend = wm8523_suspend,
  405. .resume = wm8523_resume,
  406. };
  407. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);
  408. static int wm8523_register(struct wm8523_priv *wm8523,
  409. enum snd_soc_control_type control)
  410. {
  411. int ret;
  412. struct snd_soc_codec *codec = &wm8523->codec;
  413. int i;
  414. if (wm8523_codec) {
  415. dev_err(codec->dev, "Another WM8523 is registered\n");
  416. return -EINVAL;
  417. }
  418. mutex_init(&codec->mutex);
  419. INIT_LIST_HEAD(&codec->dapm_widgets);
  420. INIT_LIST_HEAD(&codec->dapm_paths);
  421. codec->private_data = wm8523;
  422. codec->name = "WM8523";
  423. codec->owner = THIS_MODULE;
  424. codec->bias_level = SND_SOC_BIAS_OFF;
  425. codec->set_bias_level = wm8523_set_bias_level;
  426. codec->dai = &wm8523_dai;
  427. codec->num_dai = 1;
  428. codec->reg_cache_size = WM8523_REGISTER_COUNT;
  429. codec->reg_cache = &wm8523->reg_cache;
  430. codec->volatile_register = wm8523_volatile_register;
  431. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  432. wm8523->rate_constraint.count =
  433. ARRAY_SIZE(wm8523->rate_constraint_list);
  434. memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));
  435. ret = snd_soc_codec_set_cache_io(codec, 8, 16, control);
  436. if (ret != 0) {
  437. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  438. goto err;
  439. }
  440. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  441. wm8523->supplies[i].supply = wm8523_supply_names[i];
  442. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  443. wm8523->supplies);
  444. if (ret != 0) {
  445. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  446. goto err;
  447. }
  448. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  449. wm8523->supplies);
  450. if (ret != 0) {
  451. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  452. goto err_get;
  453. }
  454. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  455. if (ret < 0) {
  456. dev_err(codec->dev, "Failed to read ID register\n");
  457. goto err_enable;
  458. }
  459. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  460. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  461. ret = -EINVAL;
  462. goto err_enable;
  463. }
  464. ret = snd_soc_read(codec, WM8523_REVISION);
  465. if (ret < 0) {
  466. dev_err(codec->dev, "Failed to read revision register\n");
  467. goto err_enable;
  468. }
  469. dev_info(codec->dev, "revision %c\n",
  470. (ret & WM8523_CHIP_REV_MASK) + 'A');
  471. ret = wm8523_reset(codec);
  472. if (ret < 0) {
  473. dev_err(codec->dev, "Failed to issue reset\n");
  474. goto err_enable;
  475. }
  476. wm8523_dai.dev = codec->dev;
  477. /* Change some default settings - latch VU and enable ZC */
  478. wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
  479. wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
  480. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  481. /* Bias level configuration will have done an extra enable */
  482. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  483. wm8523_codec = codec;
  484. ret = snd_soc_register_codec(codec);
  485. if (ret != 0) {
  486. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  487. return ret;
  488. }
  489. ret = snd_soc_register_dai(&wm8523_dai);
  490. if (ret != 0) {
  491. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  492. snd_soc_unregister_codec(codec);
  493. return ret;
  494. }
  495. return 0;
  496. err_enable:
  497. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  498. err_get:
  499. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  500. err:
  501. kfree(wm8523);
  502. return ret;
  503. }
  504. static void wm8523_unregister(struct wm8523_priv *wm8523)
  505. {
  506. wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
  507. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  508. snd_soc_unregister_dai(&wm8523_dai);
  509. snd_soc_unregister_codec(&wm8523->codec);
  510. kfree(wm8523);
  511. wm8523_codec = NULL;
  512. }
  513. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  514. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  515. const struct i2c_device_id *id)
  516. {
  517. struct wm8523_priv *wm8523;
  518. struct snd_soc_codec *codec;
  519. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  520. if (wm8523 == NULL)
  521. return -ENOMEM;
  522. codec = &wm8523->codec;
  523. codec->hw_write = (hw_write_t)i2c_master_send;
  524. i2c_set_clientdata(i2c, wm8523);
  525. codec->control_data = i2c;
  526. codec->dev = &i2c->dev;
  527. return wm8523_register(wm8523, SND_SOC_I2C);
  528. }
  529. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  530. {
  531. struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
  532. wm8523_unregister(wm8523);
  533. return 0;
  534. }
  535. #ifdef CONFIG_PM
  536. static int wm8523_i2c_suspend(struct i2c_client *i2c, pm_message_t msg)
  537. {
  538. return snd_soc_suspend_device(&i2c->dev);
  539. }
  540. static int wm8523_i2c_resume(struct i2c_client *i2c)
  541. {
  542. return snd_soc_resume_device(&i2c->dev);
  543. }
  544. #else
  545. #define wm8523_i2c_suspend NULL
  546. #define wm8523_i2c_resume NULL
  547. #endif
  548. static const struct i2c_device_id wm8523_i2c_id[] = {
  549. { "wm8523", 0 },
  550. { }
  551. };
  552. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  553. static struct i2c_driver wm8523_i2c_driver = {
  554. .driver = {
  555. .name = "WM8523",
  556. .owner = THIS_MODULE,
  557. },
  558. .probe = wm8523_i2c_probe,
  559. .remove = __devexit_p(wm8523_i2c_remove),
  560. .suspend = wm8523_i2c_suspend,
  561. .resume = wm8523_i2c_resume,
  562. .id_table = wm8523_i2c_id,
  563. };
  564. #endif
  565. static int __init wm8523_modinit(void)
  566. {
  567. int ret;
  568. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  569. ret = i2c_add_driver(&wm8523_i2c_driver);
  570. if (ret != 0) {
  571. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  572. ret);
  573. }
  574. #endif
  575. return 0;
  576. }
  577. module_init(wm8523_modinit);
  578. static void __exit wm8523_exit(void)
  579. {
  580. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  581. i2c_del_driver(&wm8523_i2c_driver);
  582. #endif
  583. }
  584. module_exit(wm8523_exit);
  585. MODULE_DESCRIPTION("ASoC WM8523 driver");
  586. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  587. MODULE_LICENSE("GPL");