ice1724.c 75 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "maya44.h"
  49. #include "phase.h"
  50. #include "wtm.h"
  51. #include "se.h"
  52. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  53. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  54. MODULE_LICENSE("GPL");
  55. MODULE_SUPPORTED_DEVICE("{"
  56. REVO_DEVICE_DESC
  57. AMP_AUDIO2000_DEVICE_DESC
  58. AUREON_DEVICE_DESC
  59. VT1720_MOBO_DEVICE_DESC
  60. PONTIS_DEVICE_DESC
  61. PRODIGY192_DEVICE_DESC
  62. PRODIGY_HIFI_DEVICE_DESC
  63. JULI_DEVICE_DESC
  64. MAYA44_DEVICE_DESC
  65. PHASE_DEVICE_DESC
  66. WTM_DEVICE_DESC
  67. SE_DEVICE_DESC
  68. "{VIA,VT1720},"
  69. "{VIA,VT1724},"
  70. "{ICEnsemble,Generic ICE1724},"
  71. "{ICEnsemble,Generic Envy24HT}"
  72. "{ICEnsemble,Generic Envy24PT}}");
  73. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  74. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  75. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  76. static char *model[SNDRV_CARDS];
  77. module_param_array(index, int, NULL, 0444);
  78. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  79. module_param_array(id, charp, NULL, 0444);
  80. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  81. module_param_array(enable, bool, NULL, 0444);
  82. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  83. module_param_array(model, charp, NULL, 0444);
  84. MODULE_PARM_DESC(model, "Use the given board model.");
  85. /* Both VT1720 and VT1724 have the same PCI IDs */
  86. static const struct pci_device_id snd_vt1724_ids[] = {
  87. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
  88. { 0, }
  89. };
  90. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  91. static int PRO_RATE_LOCKED;
  92. static int PRO_RATE_RESET = 1;
  93. static unsigned int PRO_RATE_DEFAULT = 44100;
  94. /*
  95. * Basic I/O
  96. */
  97. /*
  98. * default rates, default clock routines
  99. */
  100. /* check whether the clock mode is spdif-in */
  101. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  102. {
  103. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  104. }
  105. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  106. {
  107. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  108. }
  109. /*
  110. * ac97 section
  111. */
  112. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  113. {
  114. unsigned char old_cmd;
  115. int tm;
  116. for (tm = 0; tm < 0x10000; tm++) {
  117. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  118. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  119. continue;
  120. if (!(old_cmd & VT1724_AC97_READY))
  121. continue;
  122. return old_cmd;
  123. }
  124. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  125. return old_cmd;
  126. }
  127. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  128. {
  129. int tm;
  130. for (tm = 0; tm < 0x10000; tm++)
  131. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  132. return 0;
  133. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  134. return -EIO;
  135. }
  136. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  137. unsigned short reg,
  138. unsigned short val)
  139. {
  140. struct snd_ice1712 *ice = ac97->private_data;
  141. unsigned char old_cmd;
  142. old_cmd = snd_vt1724_ac97_ready(ice);
  143. old_cmd &= ~VT1724_AC97_ID_MASK;
  144. old_cmd |= ac97->num;
  145. outb(reg, ICEMT1724(ice, AC97_INDEX));
  146. outw(val, ICEMT1724(ice, AC97_DATA));
  147. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  148. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  149. }
  150. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  151. {
  152. struct snd_ice1712 *ice = ac97->private_data;
  153. unsigned char old_cmd;
  154. old_cmd = snd_vt1724_ac97_ready(ice);
  155. old_cmd &= ~VT1724_AC97_ID_MASK;
  156. old_cmd |= ac97->num;
  157. outb(reg, ICEMT1724(ice, AC97_INDEX));
  158. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  159. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  160. return ~0;
  161. return inw(ICEMT1724(ice, AC97_DATA));
  162. }
  163. /*
  164. * GPIO operations
  165. */
  166. /* set gpio direction 0 = read, 1 = write */
  167. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  168. {
  169. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  170. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  171. }
  172. /* set the gpio mask (0 = writable) */
  173. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  174. {
  175. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  176. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  177. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  178. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  179. }
  180. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  181. {
  182. outw(data, ICEREG1724(ice, GPIO_DATA));
  183. if (!ice->vt1720)
  184. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  185. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  186. }
  187. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  188. {
  189. unsigned int data;
  190. if (!ice->vt1720)
  191. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  192. else
  193. data = 0;
  194. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  195. return data;
  196. }
  197. /*
  198. * MIDI
  199. */
  200. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  201. {
  202. unsigned int count;
  203. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  204. inb(ICEREG1724(ice, MPU_DATA));
  205. }
  206. static inline struct snd_rawmidi_substream *
  207. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  208. {
  209. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  210. struct snd_rawmidi_substream, list);
  211. }
  212. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  213. static void vt1724_midi_write(struct snd_ice1712 *ice)
  214. {
  215. struct snd_rawmidi_substream *s;
  216. int count, i;
  217. u8 buffer[32];
  218. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  219. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  220. if (count > 0) {
  221. count = snd_rawmidi_transmit(s, buffer, count);
  222. for (i = 0; i < count; ++i)
  223. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  224. }
  225. /* mask irq when all bytes have been transmitted.
  226. * enabled again in output_trigger when the new data comes in.
  227. */
  228. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  229. !snd_rawmidi_transmit_empty(s));
  230. }
  231. static void vt1724_midi_read(struct snd_ice1712 *ice)
  232. {
  233. struct snd_rawmidi_substream *s;
  234. int count, i;
  235. u8 buffer[32];
  236. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  237. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  238. if (count > 0) {
  239. count = min(count, 32);
  240. for (i = 0; i < count; ++i)
  241. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  242. snd_rawmidi_receive(s, buffer, count);
  243. }
  244. }
  245. /* call with ice->reg_lock */
  246. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  247. {
  248. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  249. if (enable)
  250. mask &= ~flag;
  251. else
  252. mask |= flag;
  253. outb(mask, ICEREG1724(ice, IRQMASK));
  254. }
  255. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  256. u8 flag, int enable)
  257. {
  258. struct snd_ice1712 *ice = substream->rmidi->private_data;
  259. spin_lock_irq(&ice->reg_lock);
  260. enable_midi_irq(ice, flag, enable);
  261. spin_unlock_irq(&ice->reg_lock);
  262. }
  263. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  264. {
  265. return 0;
  266. }
  267. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  268. {
  269. return 0;
  270. }
  271. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  272. {
  273. struct snd_ice1712 *ice = s->rmidi->private_data;
  274. unsigned long flags;
  275. spin_lock_irqsave(&ice->reg_lock, flags);
  276. if (up) {
  277. ice->midi_output = 1;
  278. vt1724_midi_write(ice);
  279. } else {
  280. ice->midi_output = 0;
  281. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  282. }
  283. spin_unlock_irqrestore(&ice->reg_lock, flags);
  284. }
  285. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  286. {
  287. struct snd_ice1712 *ice = s->rmidi->private_data;
  288. unsigned long timeout;
  289. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  290. /* 32 bytes should be transmitted in less than about 12 ms */
  291. timeout = jiffies + msecs_to_jiffies(15);
  292. do {
  293. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  294. break;
  295. schedule_timeout_uninterruptible(1);
  296. } while (time_after(timeout, jiffies));
  297. }
  298. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  299. .open = vt1724_midi_output_open,
  300. .close = vt1724_midi_output_close,
  301. .trigger = vt1724_midi_output_trigger,
  302. .drain = vt1724_midi_output_drain,
  303. };
  304. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  305. {
  306. vt1724_midi_clear_rx(s->rmidi->private_data);
  307. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  308. return 0;
  309. }
  310. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  311. {
  312. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  313. return 0;
  314. }
  315. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  316. {
  317. struct snd_ice1712 *ice = s->rmidi->private_data;
  318. unsigned long flags;
  319. spin_lock_irqsave(&ice->reg_lock, flags);
  320. if (up) {
  321. ice->midi_input = 1;
  322. vt1724_midi_read(ice);
  323. } else {
  324. ice->midi_input = 0;
  325. }
  326. spin_unlock_irqrestore(&ice->reg_lock, flags);
  327. }
  328. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  329. .open = vt1724_midi_input_open,
  330. .close = vt1724_midi_input_close,
  331. .trigger = vt1724_midi_input_trigger,
  332. };
  333. /*
  334. * Interrupt handler
  335. */
  336. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  337. {
  338. struct snd_ice1712 *ice = dev_id;
  339. unsigned char status;
  340. unsigned char status_mask =
  341. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  342. int handled = 0;
  343. int timeout = 0;
  344. while (1) {
  345. status = inb(ICEREG1724(ice, IRQSTAT));
  346. status &= status_mask;
  347. if (status == 0)
  348. break;
  349. spin_lock(&ice->reg_lock);
  350. if (++timeout > 10) {
  351. status = inb(ICEREG1724(ice, IRQSTAT));
  352. printk(KERN_ERR "ice1724: Too long irq loop, "
  353. "status = 0x%x\n", status);
  354. if (status & VT1724_IRQ_MPU_TX) {
  355. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  356. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  357. }
  358. spin_unlock(&ice->reg_lock);
  359. break;
  360. }
  361. handled = 1;
  362. if (status & VT1724_IRQ_MPU_TX) {
  363. if (ice->midi_output)
  364. vt1724_midi_write(ice);
  365. else
  366. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  367. /* Due to mysterical reasons, MPU_TX is always
  368. * generated (and can't be cleared) when a PCM
  369. * playback is going. So let's ignore at the
  370. * next loop.
  371. */
  372. status_mask &= ~VT1724_IRQ_MPU_TX;
  373. }
  374. if (status & VT1724_IRQ_MPU_RX) {
  375. if (ice->midi_input)
  376. vt1724_midi_read(ice);
  377. else
  378. vt1724_midi_clear_rx(ice);
  379. }
  380. /* ack MPU irq */
  381. outb(status, ICEREG1724(ice, IRQSTAT));
  382. spin_unlock(&ice->reg_lock);
  383. if (status & VT1724_IRQ_MTPCM) {
  384. /*
  385. * Multi-track PCM
  386. * PCM assignment are:
  387. * Playback DMA0 (M/C) = playback_pro_substream
  388. * Playback DMA1 = playback_con_substream_ds[0]
  389. * Playback DMA2 = playback_con_substream_ds[1]
  390. * Playback DMA3 = playback_con_substream_ds[2]
  391. * Playback DMA4 (SPDIF) = playback_con_substream
  392. * Record DMA0 = capture_pro_substream
  393. * Record DMA1 = capture_con_substream
  394. */
  395. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  396. if (mtstat & VT1724_MULTI_PDMA0) {
  397. if (ice->playback_pro_substream)
  398. snd_pcm_period_elapsed(ice->playback_pro_substream);
  399. }
  400. if (mtstat & VT1724_MULTI_RDMA0) {
  401. if (ice->capture_pro_substream)
  402. snd_pcm_period_elapsed(ice->capture_pro_substream);
  403. }
  404. if (mtstat & VT1724_MULTI_PDMA1) {
  405. if (ice->playback_con_substream_ds[0])
  406. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  407. }
  408. if (mtstat & VT1724_MULTI_PDMA2) {
  409. if (ice->playback_con_substream_ds[1])
  410. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  411. }
  412. if (mtstat & VT1724_MULTI_PDMA3) {
  413. if (ice->playback_con_substream_ds[2])
  414. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  415. }
  416. if (mtstat & VT1724_MULTI_PDMA4) {
  417. if (ice->playback_con_substream)
  418. snd_pcm_period_elapsed(ice->playback_con_substream);
  419. }
  420. if (mtstat & VT1724_MULTI_RDMA1) {
  421. if (ice->capture_con_substream)
  422. snd_pcm_period_elapsed(ice->capture_con_substream);
  423. }
  424. /* ack anyway to avoid freeze */
  425. outb(mtstat, ICEMT1724(ice, IRQ));
  426. /* ought to really handle this properly */
  427. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  428. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  429. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  430. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  431. /* If I don't do this, I get machine lockup due to continual interrupts */
  432. }
  433. }
  434. }
  435. return IRQ_RETVAL(handled);
  436. }
  437. /*
  438. * PCM code - professional part (multitrack)
  439. */
  440. static unsigned int rates[] = {
  441. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  442. 32000, 44100, 48000, 64000, 88200, 96000,
  443. 176400, 192000,
  444. };
  445. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  446. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  447. .list = rates,
  448. .mask = 0,
  449. };
  450. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  451. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  452. .list = rates,
  453. .mask = 0,
  454. };
  455. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  456. .count = ARRAY_SIZE(rates),
  457. .list = rates,
  458. .mask = 0,
  459. };
  460. struct vt1724_pcm_reg {
  461. unsigned int addr; /* ADDR register offset */
  462. unsigned int size; /* SIZE register offset */
  463. unsigned int count; /* COUNT register offset */
  464. unsigned int start; /* start & pause bit */
  465. };
  466. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  467. {
  468. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  469. unsigned char what;
  470. unsigned char old;
  471. struct snd_pcm_substream *s;
  472. what = 0;
  473. snd_pcm_group_for_each_entry(s, substream) {
  474. if (snd_pcm_substream_chip(s) == ice) {
  475. const struct vt1724_pcm_reg *reg;
  476. reg = s->runtime->private_data;
  477. what |= reg->start;
  478. snd_pcm_trigger_done(s, substream);
  479. }
  480. }
  481. switch (cmd) {
  482. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  483. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  484. spin_lock(&ice->reg_lock);
  485. old = inb(ICEMT1724(ice, DMA_PAUSE));
  486. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  487. old |= what;
  488. else
  489. old &= ~what;
  490. outb(old, ICEMT1724(ice, DMA_PAUSE));
  491. spin_unlock(&ice->reg_lock);
  492. break;
  493. case SNDRV_PCM_TRIGGER_START:
  494. case SNDRV_PCM_TRIGGER_STOP:
  495. case SNDRV_PCM_TRIGGER_SUSPEND:
  496. spin_lock(&ice->reg_lock);
  497. old = inb(ICEMT1724(ice, DMA_CONTROL));
  498. if (cmd == SNDRV_PCM_TRIGGER_START)
  499. old |= what;
  500. else
  501. old &= ~what;
  502. outb(old, ICEMT1724(ice, DMA_CONTROL));
  503. spin_unlock(&ice->reg_lock);
  504. break;
  505. case SNDRV_PCM_TRIGGER_RESUME:
  506. /* apps will have to restart stream */
  507. break;
  508. default:
  509. return -EINVAL;
  510. }
  511. return 0;
  512. }
  513. /*
  514. */
  515. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  516. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  517. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  518. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  519. static const unsigned int stdclock_rate_list[16] = {
  520. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  521. 22050, 11025, 88200, 176400, 0, 192000, 64000
  522. };
  523. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  524. {
  525. unsigned int rate;
  526. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  527. return rate;
  528. }
  529. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  530. {
  531. int i;
  532. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  533. if (stdclock_rate_list[i] == rate) {
  534. outb(i, ICEMT1724(ice, RATE));
  535. return;
  536. }
  537. }
  538. }
  539. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  540. unsigned int rate)
  541. {
  542. unsigned char val, old;
  543. /* check MT02 */
  544. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  545. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  546. if (rate > 96000)
  547. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  548. else
  549. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  550. if (val != old) {
  551. outb(val, ICEMT1724(ice, I2S_FORMAT));
  552. /* master clock changed */
  553. return 1;
  554. }
  555. }
  556. /* no change in master clock */
  557. return 0;
  558. }
  559. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  560. int force)
  561. {
  562. unsigned long flags;
  563. unsigned char mclk_change;
  564. unsigned int i, old_rate;
  565. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  566. return -EINVAL;
  567. spin_lock_irqsave(&ice->reg_lock, flags);
  568. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  569. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  570. /* running? we cannot change the rate now... */
  571. spin_unlock_irqrestore(&ice->reg_lock, flags);
  572. return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY;
  573. }
  574. if (!force && is_pro_rate_locked(ice)) {
  575. spin_unlock_irqrestore(&ice->reg_lock, flags);
  576. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  577. }
  578. old_rate = ice->get_rate(ice);
  579. if (force || (old_rate != rate))
  580. ice->set_rate(ice, rate);
  581. else if (rate == ice->cur_rate) {
  582. spin_unlock_irqrestore(&ice->reg_lock, flags);
  583. return 0;
  584. }
  585. ice->cur_rate = rate;
  586. /* setting master clock */
  587. mclk_change = ice->set_mclk(ice, rate);
  588. spin_unlock_irqrestore(&ice->reg_lock, flags);
  589. if (mclk_change && ice->gpio.i2s_mclk_changed)
  590. ice->gpio.i2s_mclk_changed(ice);
  591. if (ice->gpio.set_pro_rate)
  592. ice->gpio.set_pro_rate(ice, rate);
  593. /* set up codecs */
  594. for (i = 0; i < ice->akm_codecs; i++) {
  595. if (ice->akm[i].ops.set_rate_val)
  596. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  597. }
  598. if (ice->spdif.ops.setup_rate)
  599. ice->spdif.ops.setup_rate(ice, rate);
  600. return 0;
  601. }
  602. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  603. struct snd_pcm_hw_params *hw_params)
  604. {
  605. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  606. int i, chs, err;
  607. chs = params_channels(hw_params);
  608. mutex_lock(&ice->open_mutex);
  609. /* mark surround channels */
  610. if (substream == ice->playback_pro_substream) {
  611. /* PDMA0 can be multi-channel up to 8 */
  612. chs = chs / 2 - 1;
  613. for (i = 0; i < chs; i++) {
  614. if (ice->pcm_reserved[i] &&
  615. ice->pcm_reserved[i] != substream) {
  616. mutex_unlock(&ice->open_mutex);
  617. return -EBUSY;
  618. }
  619. ice->pcm_reserved[i] = substream;
  620. }
  621. for (; i < 3; i++) {
  622. if (ice->pcm_reserved[i] == substream)
  623. ice->pcm_reserved[i] = NULL;
  624. }
  625. } else {
  626. for (i = 0; i < 3; i++) {
  627. /* check individual playback stream */
  628. if (ice->playback_con_substream_ds[i] == substream) {
  629. if (ice->pcm_reserved[i] &&
  630. ice->pcm_reserved[i] != substream) {
  631. mutex_unlock(&ice->open_mutex);
  632. return -EBUSY;
  633. }
  634. ice->pcm_reserved[i] = substream;
  635. break;
  636. }
  637. }
  638. }
  639. mutex_unlock(&ice->open_mutex);
  640. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  641. if (err < 0)
  642. return err;
  643. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  644. }
  645. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  646. {
  647. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  648. int i;
  649. mutex_lock(&ice->open_mutex);
  650. /* unmark surround channels */
  651. for (i = 0; i < 3; i++)
  652. if (ice->pcm_reserved[i] == substream)
  653. ice->pcm_reserved[i] = NULL;
  654. mutex_unlock(&ice->open_mutex);
  655. return snd_pcm_lib_free_pages(substream);
  656. }
  657. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  658. {
  659. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  660. unsigned char val;
  661. unsigned int size;
  662. spin_lock_irq(&ice->reg_lock);
  663. val = (8 - substream->runtime->channels) >> 1;
  664. outb(val, ICEMT1724(ice, BURST));
  665. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  666. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  667. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  668. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  669. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  670. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  671. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  672. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  673. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  674. spin_unlock_irq(&ice->reg_lock);
  675. /*
  676. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  677. "buffer = 0x%x, period = 0x%x\n",
  678. substream->runtime->channels,
  679. (unsigned int)substream->runtime->dma_addr,
  680. snd_pcm_lib_buffer_bytes(substream),
  681. snd_pcm_lib_period_bytes(substream));
  682. */
  683. return 0;
  684. }
  685. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  686. {
  687. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  688. size_t ptr;
  689. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  690. return 0;
  691. #if 0 /* read PLAYBACK_ADDR */
  692. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  693. if (ptr < substream->runtime->dma_addr) {
  694. snd_printd("ice1724: invalid negative ptr\n");
  695. return 0;
  696. }
  697. ptr -= substream->runtime->dma_addr;
  698. ptr = bytes_to_frames(substream->runtime, ptr);
  699. if (ptr >= substream->runtime->buffer_size) {
  700. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  701. (int)ptr, (int)substream->runtime->period_size);
  702. return 0;
  703. }
  704. #else /* read PLAYBACK_SIZE */
  705. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  706. ptr = (ptr + 1) << 2;
  707. ptr = bytes_to_frames(substream->runtime, ptr);
  708. if (!ptr)
  709. ;
  710. else if (ptr <= substream->runtime->buffer_size)
  711. ptr = substream->runtime->buffer_size - ptr;
  712. else {
  713. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  714. (int)ptr, (int)substream->runtime->buffer_size);
  715. ptr = 0;
  716. }
  717. #endif
  718. return ptr;
  719. }
  720. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  721. {
  722. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  723. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  724. spin_lock_irq(&ice->reg_lock);
  725. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  726. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  727. ice->profi_port + reg->size);
  728. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  729. ice->profi_port + reg->count);
  730. spin_unlock_irq(&ice->reg_lock);
  731. return 0;
  732. }
  733. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  734. {
  735. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  736. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  737. size_t ptr;
  738. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  739. return 0;
  740. #if 0 /* use ADDR register */
  741. ptr = inl(ice->profi_port + reg->addr);
  742. ptr -= substream->runtime->dma_addr;
  743. return bytes_to_frames(substream->runtime, ptr);
  744. #else /* use SIZE register */
  745. ptr = inw(ice->profi_port + reg->size);
  746. ptr = (ptr + 1) << 2;
  747. ptr = bytes_to_frames(substream->runtime, ptr);
  748. if (!ptr)
  749. ;
  750. else if (ptr <= substream->runtime->buffer_size)
  751. ptr = substream->runtime->buffer_size - ptr;
  752. else {
  753. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  754. (int)ptr, (int)substream->runtime->buffer_size);
  755. ptr = 0;
  756. }
  757. return ptr;
  758. #endif
  759. }
  760. static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
  761. .addr = VT1724_MT_PLAYBACK_ADDR,
  762. .size = VT1724_MT_PLAYBACK_SIZE,
  763. .count = VT1724_MT_PLAYBACK_COUNT,
  764. .start = VT1724_PDMA0_START,
  765. };
  766. static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
  767. .addr = VT1724_MT_PDMA4_ADDR,
  768. .size = VT1724_MT_PDMA4_SIZE,
  769. .count = VT1724_MT_PDMA4_COUNT,
  770. .start = VT1724_PDMA4_START,
  771. };
  772. static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
  773. .addr = VT1724_MT_CAPTURE_ADDR,
  774. .size = VT1724_MT_CAPTURE_SIZE,
  775. .count = VT1724_MT_CAPTURE_COUNT,
  776. .start = VT1724_RDMA0_START,
  777. };
  778. static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
  779. .addr = VT1724_MT_RDMA1_ADDR,
  780. .size = VT1724_MT_RDMA1_SIZE,
  781. .count = VT1724_MT_RDMA1_COUNT,
  782. .start = VT1724_RDMA1_START,
  783. };
  784. #define vt1724_playback_pro_reg vt1724_pdma0_reg
  785. #define vt1724_playback_spdif_reg vt1724_pdma4_reg
  786. #define vt1724_capture_pro_reg vt1724_rdma0_reg
  787. #define vt1724_capture_spdif_reg vt1724_rdma1_reg
  788. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  789. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  790. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  791. SNDRV_PCM_INFO_MMAP_VALID |
  792. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  793. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  794. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  795. .rate_min = 8000,
  796. .rate_max = 192000,
  797. .channels_min = 2,
  798. .channels_max = 8,
  799. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  800. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  801. .period_bytes_max = (1UL << 21),
  802. .periods_min = 2,
  803. .periods_max = 1024,
  804. };
  805. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  806. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  807. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  808. SNDRV_PCM_INFO_MMAP_VALID |
  809. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  810. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  811. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  812. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  813. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  814. SNDRV_PCM_RATE_192000),
  815. .rate_min = 32000,
  816. .rate_max = 192000,
  817. .channels_min = 2,
  818. .channels_max = 2,
  819. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  820. .period_bytes_min = 2 * 4 * 2,
  821. .period_bytes_max = (1UL << 18),
  822. .periods_min = 2,
  823. .periods_max = 1024,
  824. };
  825. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  826. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  827. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  828. SNDRV_PCM_INFO_MMAP_VALID |
  829. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  830. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  831. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  832. .rate_min = 8000,
  833. .rate_max = 192000,
  834. .channels_min = 2,
  835. .channels_max = 2,
  836. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  837. .period_bytes_min = 2 * 4 * 2,
  838. .period_bytes_max = (1UL << 18),
  839. .periods_min = 2,
  840. .periods_max = 1024,
  841. };
  842. /*
  843. * set rate constraints
  844. */
  845. static void set_std_hw_rates(struct snd_ice1712 *ice)
  846. {
  847. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  848. /* I2S */
  849. /* VT1720 doesn't support more than 96kHz */
  850. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  851. ice->hw_rates = &hw_constraints_rates_192;
  852. else
  853. ice->hw_rates = &hw_constraints_rates_96;
  854. } else {
  855. /* ACLINK */
  856. ice->hw_rates = &hw_constraints_rates_48;
  857. }
  858. }
  859. static int set_rate_constraints(struct snd_ice1712 *ice,
  860. struct snd_pcm_substream *substream)
  861. {
  862. struct snd_pcm_runtime *runtime = substream->runtime;
  863. runtime->hw.rate_min = ice->hw_rates->list[0];
  864. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  865. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  866. return snd_pcm_hw_constraint_list(runtime, 0,
  867. SNDRV_PCM_HW_PARAM_RATE,
  868. ice->hw_rates);
  869. }
  870. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  871. * actually used
  872. */
  873. #define VT1724_BUFFER_ALIGN 0x20
  874. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  875. {
  876. struct snd_pcm_runtime *runtime = substream->runtime;
  877. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  878. int chs, num_indeps;
  879. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  880. ice->playback_pro_substream = substream;
  881. runtime->hw = snd_vt1724_playback_pro;
  882. snd_pcm_set_sync(substream);
  883. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  884. set_rate_constraints(ice, substream);
  885. mutex_lock(&ice->open_mutex);
  886. /* calculate the currently available channels */
  887. num_indeps = ice->num_total_dacs / 2 - 1;
  888. for (chs = 0; chs < num_indeps; chs++) {
  889. if (ice->pcm_reserved[chs])
  890. break;
  891. }
  892. chs = (chs + 1) * 2;
  893. runtime->hw.channels_max = chs;
  894. if (chs > 2) /* channels must be even */
  895. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  896. mutex_unlock(&ice->open_mutex);
  897. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  898. VT1724_BUFFER_ALIGN);
  899. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  900. VT1724_BUFFER_ALIGN);
  901. return 0;
  902. }
  903. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  904. {
  905. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  906. struct snd_pcm_runtime *runtime = substream->runtime;
  907. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  908. ice->capture_pro_substream = substream;
  909. runtime->hw = snd_vt1724_2ch_stereo;
  910. snd_pcm_set_sync(substream);
  911. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  912. set_rate_constraints(ice, substream);
  913. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  914. VT1724_BUFFER_ALIGN);
  915. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  916. VT1724_BUFFER_ALIGN);
  917. return 0;
  918. }
  919. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  920. {
  921. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  922. if (PRO_RATE_RESET)
  923. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  924. ice->playback_pro_substream = NULL;
  925. return 0;
  926. }
  927. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  928. {
  929. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  930. if (PRO_RATE_RESET)
  931. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  932. ice->capture_pro_substream = NULL;
  933. return 0;
  934. }
  935. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  936. .open = snd_vt1724_playback_pro_open,
  937. .close = snd_vt1724_playback_pro_close,
  938. .ioctl = snd_pcm_lib_ioctl,
  939. .hw_params = snd_vt1724_pcm_hw_params,
  940. .hw_free = snd_vt1724_pcm_hw_free,
  941. .prepare = snd_vt1724_playback_pro_prepare,
  942. .trigger = snd_vt1724_pcm_trigger,
  943. .pointer = snd_vt1724_playback_pro_pointer,
  944. };
  945. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  946. .open = snd_vt1724_capture_pro_open,
  947. .close = snd_vt1724_capture_pro_close,
  948. .ioctl = snd_pcm_lib_ioctl,
  949. .hw_params = snd_vt1724_pcm_hw_params,
  950. .hw_free = snd_vt1724_pcm_hw_free,
  951. .prepare = snd_vt1724_pcm_prepare,
  952. .trigger = snd_vt1724_pcm_trigger,
  953. .pointer = snd_vt1724_pcm_pointer,
  954. };
  955. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  956. {
  957. struct snd_pcm *pcm;
  958. int err;
  959. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  960. if (err < 0)
  961. return err;
  962. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  963. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  964. pcm->private_data = ice;
  965. pcm->info_flags = 0;
  966. strcpy(pcm->name, "ICE1724");
  967. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  968. snd_dma_pci_data(ice->pci),
  969. 256*1024, 256*1024);
  970. ice->pcm_pro = pcm;
  971. return 0;
  972. }
  973. /*
  974. * SPDIF PCM
  975. */
  976. /* update spdif control bits; call with reg_lock */
  977. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  978. {
  979. unsigned char cbit, disabled;
  980. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  981. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  982. if (cbit != disabled)
  983. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  984. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  985. if (cbit != disabled)
  986. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  987. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  988. }
  989. /* update SPDIF control bits according to the given rate */
  990. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  991. {
  992. unsigned int val, nval;
  993. unsigned long flags;
  994. spin_lock_irqsave(&ice->reg_lock, flags);
  995. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  996. nval &= ~(7 << 12);
  997. switch (rate) {
  998. case 44100: break;
  999. case 48000: nval |= 2 << 12; break;
  1000. case 32000: nval |= 3 << 12; break;
  1001. case 88200: nval |= 4 << 12; break;
  1002. case 96000: nval |= 5 << 12; break;
  1003. case 192000: nval |= 6 << 12; break;
  1004. case 176400: nval |= 7 << 12; break;
  1005. }
  1006. if (val != nval)
  1007. update_spdif_bits(ice, nval);
  1008. spin_unlock_irqrestore(&ice->reg_lock, flags);
  1009. }
  1010. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1011. {
  1012. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1013. if (!ice->force_pdma4)
  1014. update_spdif_rate(ice, substream->runtime->rate);
  1015. return snd_vt1724_pcm_prepare(substream);
  1016. }
  1017. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1018. {
  1019. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1020. struct snd_pcm_runtime *runtime = substream->runtime;
  1021. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1022. ice->playback_con_substream = substream;
  1023. if (ice->force_pdma4) {
  1024. runtime->hw = snd_vt1724_2ch_stereo;
  1025. set_rate_constraints(ice, substream);
  1026. } else
  1027. runtime->hw = snd_vt1724_spdif;
  1028. snd_pcm_set_sync(substream);
  1029. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1030. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1031. VT1724_BUFFER_ALIGN);
  1032. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1033. VT1724_BUFFER_ALIGN);
  1034. if (ice->spdif.ops.open)
  1035. ice->spdif.ops.open(ice, substream);
  1036. return 0;
  1037. }
  1038. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1039. {
  1040. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1041. if (PRO_RATE_RESET)
  1042. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1043. ice->playback_con_substream = NULL;
  1044. if (ice->spdif.ops.close)
  1045. ice->spdif.ops.close(ice, substream);
  1046. return 0;
  1047. }
  1048. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1049. {
  1050. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1051. struct snd_pcm_runtime *runtime = substream->runtime;
  1052. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1053. ice->capture_con_substream = substream;
  1054. if (ice->force_rdma1) {
  1055. runtime->hw = snd_vt1724_2ch_stereo;
  1056. set_rate_constraints(ice, substream);
  1057. } else
  1058. runtime->hw = snd_vt1724_spdif;
  1059. snd_pcm_set_sync(substream);
  1060. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1061. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1062. VT1724_BUFFER_ALIGN);
  1063. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1064. VT1724_BUFFER_ALIGN);
  1065. if (ice->spdif.ops.open)
  1066. ice->spdif.ops.open(ice, substream);
  1067. return 0;
  1068. }
  1069. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1070. {
  1071. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1072. if (PRO_RATE_RESET)
  1073. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1074. ice->capture_con_substream = NULL;
  1075. if (ice->spdif.ops.close)
  1076. ice->spdif.ops.close(ice, substream);
  1077. return 0;
  1078. }
  1079. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1080. .open = snd_vt1724_playback_spdif_open,
  1081. .close = snd_vt1724_playback_spdif_close,
  1082. .ioctl = snd_pcm_lib_ioctl,
  1083. .hw_params = snd_vt1724_pcm_hw_params,
  1084. .hw_free = snd_vt1724_pcm_hw_free,
  1085. .prepare = snd_vt1724_playback_spdif_prepare,
  1086. .trigger = snd_vt1724_pcm_trigger,
  1087. .pointer = snd_vt1724_pcm_pointer,
  1088. };
  1089. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1090. .open = snd_vt1724_capture_spdif_open,
  1091. .close = snd_vt1724_capture_spdif_close,
  1092. .ioctl = snd_pcm_lib_ioctl,
  1093. .hw_params = snd_vt1724_pcm_hw_params,
  1094. .hw_free = snd_vt1724_pcm_hw_free,
  1095. .prepare = snd_vt1724_pcm_prepare,
  1096. .trigger = snd_vt1724_pcm_trigger,
  1097. .pointer = snd_vt1724_pcm_pointer,
  1098. };
  1099. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1100. {
  1101. char *name;
  1102. struct snd_pcm *pcm;
  1103. int play, capt;
  1104. int err;
  1105. if (ice->force_pdma4 ||
  1106. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1107. play = 1;
  1108. ice->has_spdif = 1;
  1109. } else
  1110. play = 0;
  1111. if (ice->force_rdma1 ||
  1112. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1113. capt = 1;
  1114. ice->has_spdif = 1;
  1115. } else
  1116. capt = 0;
  1117. if (!play && !capt)
  1118. return 0; /* no spdif device */
  1119. if (ice->force_pdma4 || ice->force_rdma1)
  1120. name = "ICE1724 Secondary";
  1121. else
  1122. name = "ICE1724 IEC958";
  1123. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1124. if (err < 0)
  1125. return err;
  1126. if (play)
  1127. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1128. &snd_vt1724_playback_spdif_ops);
  1129. if (capt)
  1130. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1131. &snd_vt1724_capture_spdif_ops);
  1132. pcm->private_data = ice;
  1133. pcm->info_flags = 0;
  1134. strcpy(pcm->name, name);
  1135. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1136. snd_dma_pci_data(ice->pci),
  1137. 256*1024, 256*1024);
  1138. ice->pcm = pcm;
  1139. return 0;
  1140. }
  1141. /*
  1142. * independent surround PCMs
  1143. */
  1144. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1145. {
  1146. .addr = VT1724_MT_PDMA1_ADDR,
  1147. .size = VT1724_MT_PDMA1_SIZE,
  1148. .count = VT1724_MT_PDMA1_COUNT,
  1149. .start = VT1724_PDMA1_START,
  1150. },
  1151. {
  1152. .addr = VT1724_MT_PDMA2_ADDR,
  1153. .size = VT1724_MT_PDMA2_SIZE,
  1154. .count = VT1724_MT_PDMA2_COUNT,
  1155. .start = VT1724_PDMA2_START,
  1156. },
  1157. {
  1158. .addr = VT1724_MT_PDMA3_ADDR,
  1159. .size = VT1724_MT_PDMA3_SIZE,
  1160. .count = VT1724_MT_PDMA3_COUNT,
  1161. .start = VT1724_PDMA3_START,
  1162. },
  1163. };
  1164. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1165. {
  1166. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1167. unsigned char val;
  1168. spin_lock_irq(&ice->reg_lock);
  1169. val = 3 - substream->number;
  1170. if (inb(ICEMT1724(ice, BURST)) < val)
  1171. outb(val, ICEMT1724(ice, BURST));
  1172. spin_unlock_irq(&ice->reg_lock);
  1173. return snd_vt1724_pcm_prepare(substream);
  1174. }
  1175. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1176. {
  1177. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1178. struct snd_pcm_runtime *runtime = substream->runtime;
  1179. mutex_lock(&ice->open_mutex);
  1180. /* already used by PDMA0? */
  1181. if (ice->pcm_reserved[substream->number]) {
  1182. mutex_unlock(&ice->open_mutex);
  1183. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1184. }
  1185. mutex_unlock(&ice->open_mutex);
  1186. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1187. ice->playback_con_substream_ds[substream->number] = substream;
  1188. runtime->hw = snd_vt1724_2ch_stereo;
  1189. snd_pcm_set_sync(substream);
  1190. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1191. set_rate_constraints(ice, substream);
  1192. return 0;
  1193. }
  1194. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1195. {
  1196. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1197. if (PRO_RATE_RESET)
  1198. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1199. ice->playback_con_substream_ds[substream->number] = NULL;
  1200. ice->pcm_reserved[substream->number] = NULL;
  1201. return 0;
  1202. }
  1203. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1204. .open = snd_vt1724_playback_indep_open,
  1205. .close = snd_vt1724_playback_indep_close,
  1206. .ioctl = snd_pcm_lib_ioctl,
  1207. .hw_params = snd_vt1724_pcm_hw_params,
  1208. .hw_free = snd_vt1724_pcm_hw_free,
  1209. .prepare = snd_vt1724_playback_indep_prepare,
  1210. .trigger = snd_vt1724_pcm_trigger,
  1211. .pointer = snd_vt1724_pcm_pointer,
  1212. };
  1213. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1214. {
  1215. struct snd_pcm *pcm;
  1216. int play;
  1217. int err;
  1218. play = ice->num_total_dacs / 2 - 1;
  1219. if (play <= 0)
  1220. return 0;
  1221. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1222. if (err < 0)
  1223. return err;
  1224. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1225. &snd_vt1724_playback_indep_ops);
  1226. pcm->private_data = ice;
  1227. pcm->info_flags = 0;
  1228. strcpy(pcm->name, "ICE1724 Surround PCM");
  1229. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1230. snd_dma_pci_data(ice->pci),
  1231. 256*1024, 256*1024);
  1232. ice->pcm_ds = pcm;
  1233. return 0;
  1234. }
  1235. /*
  1236. * Mixer section
  1237. */
  1238. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1239. {
  1240. int err;
  1241. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1242. struct snd_ac97_bus *pbus;
  1243. struct snd_ac97_template ac97;
  1244. static struct snd_ac97_bus_ops ops = {
  1245. .write = snd_vt1724_ac97_write,
  1246. .read = snd_vt1724_ac97_read,
  1247. };
  1248. /* cold reset */
  1249. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1250. mdelay(5); /* FIXME */
  1251. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1252. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1253. if (err < 0)
  1254. return err;
  1255. memset(&ac97, 0, sizeof(ac97));
  1256. ac97.private_data = ice;
  1257. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1258. if (err < 0)
  1259. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1260. else
  1261. return 0;
  1262. }
  1263. /* I2S mixer only */
  1264. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1265. return 0;
  1266. }
  1267. /*
  1268. *
  1269. */
  1270. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1271. {
  1272. return (unsigned int)ice->eeprom.data[idx] | \
  1273. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1274. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1275. }
  1276. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1277. struct snd_info_buffer *buffer)
  1278. {
  1279. struct snd_ice1712 *ice = entry->private_data;
  1280. unsigned int idx;
  1281. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1282. snd_iprintf(buffer, "EEPROM:\n");
  1283. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1284. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1285. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1286. snd_iprintf(buffer, " System Config : 0x%x\n",
  1287. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1288. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1289. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1290. snd_iprintf(buffer, " I2S : 0x%x\n",
  1291. ice->eeprom.data[ICE_EEP2_I2S]);
  1292. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1293. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1294. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1295. ice->eeprom.gpiodir);
  1296. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1297. ice->eeprom.gpiomask);
  1298. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1299. ice->eeprom.gpiostate);
  1300. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1301. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1302. idx, ice->eeprom.data[idx]);
  1303. snd_iprintf(buffer, "\nRegisters:\n");
  1304. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1305. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1306. for (idx = 0x0; idx < 0x20 ; idx++)
  1307. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1308. idx, inb(ice->port+idx));
  1309. for (idx = 0x0; idx < 0x30 ; idx++)
  1310. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1311. idx, inb(ice->profi_port+idx));
  1312. }
  1313. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1314. {
  1315. struct snd_info_entry *entry;
  1316. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1317. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1318. }
  1319. /*
  1320. *
  1321. */
  1322. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1323. struct snd_ctl_elem_info *uinfo)
  1324. {
  1325. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1326. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1327. return 0;
  1328. }
  1329. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1330. struct snd_ctl_elem_value *ucontrol)
  1331. {
  1332. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1333. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1334. return 0;
  1335. }
  1336. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1337. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1338. .name = "ICE1724 EEPROM",
  1339. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1340. .info = snd_vt1724_eeprom_info,
  1341. .get = snd_vt1724_eeprom_get
  1342. };
  1343. /*
  1344. */
  1345. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1346. struct snd_ctl_elem_info *uinfo)
  1347. {
  1348. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1349. uinfo->count = 1;
  1350. return 0;
  1351. }
  1352. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1353. {
  1354. unsigned int val, rbits;
  1355. val = diga->status[0] & 0x03; /* professional, non-audio */
  1356. if (val & 0x01) {
  1357. /* professional */
  1358. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1359. IEC958_AES0_PRO_EMPHASIS_5015)
  1360. val |= 1U << 3;
  1361. rbits = (diga->status[4] >> 3) & 0x0f;
  1362. if (rbits) {
  1363. switch (rbits) {
  1364. case 2: val |= 5 << 12; break; /* 96k */
  1365. case 3: val |= 6 << 12; break; /* 192k */
  1366. case 10: val |= 4 << 12; break; /* 88.2k */
  1367. case 11: val |= 7 << 12; break; /* 176.4k */
  1368. }
  1369. } else {
  1370. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1371. case IEC958_AES0_PRO_FS_44100:
  1372. break;
  1373. case IEC958_AES0_PRO_FS_32000:
  1374. val |= 3U << 12;
  1375. break;
  1376. default:
  1377. val |= 2U << 12;
  1378. break;
  1379. }
  1380. }
  1381. } else {
  1382. /* consumer */
  1383. val |= diga->status[1] & 0x04; /* copyright */
  1384. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1385. IEC958_AES0_CON_EMPHASIS_5015)
  1386. val |= 1U << 3;
  1387. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1388. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1389. }
  1390. return val;
  1391. }
  1392. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1393. {
  1394. memset(diga->status, 0, sizeof(diga->status));
  1395. diga->status[0] = val & 0x03; /* professional, non-audio */
  1396. if (val & 0x01) {
  1397. /* professional */
  1398. if (val & (1U << 3))
  1399. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1400. switch ((val >> 12) & 0x7) {
  1401. case 0:
  1402. break;
  1403. case 2:
  1404. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1405. break;
  1406. default:
  1407. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1408. break;
  1409. }
  1410. } else {
  1411. /* consumer */
  1412. diga->status[0] |= val & (1U << 2); /* copyright */
  1413. if (val & (1U << 3))
  1414. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1415. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1416. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1417. }
  1418. }
  1419. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1420. struct snd_ctl_elem_value *ucontrol)
  1421. {
  1422. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1423. unsigned int val;
  1424. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1425. decode_spdif_bits(&ucontrol->value.iec958, val);
  1426. return 0;
  1427. }
  1428. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1429. struct snd_ctl_elem_value *ucontrol)
  1430. {
  1431. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1432. unsigned int val, old;
  1433. val = encode_spdif_bits(&ucontrol->value.iec958);
  1434. spin_lock_irq(&ice->reg_lock);
  1435. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1436. if (val != old)
  1437. update_spdif_bits(ice, val);
  1438. spin_unlock_irq(&ice->reg_lock);
  1439. return val != old;
  1440. }
  1441. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1442. {
  1443. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1444. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1445. .info = snd_vt1724_spdif_info,
  1446. .get = snd_vt1724_spdif_default_get,
  1447. .put = snd_vt1724_spdif_default_put
  1448. };
  1449. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1450. struct snd_ctl_elem_value *ucontrol)
  1451. {
  1452. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1453. IEC958_AES0_PROFESSIONAL |
  1454. IEC958_AES0_CON_NOT_COPYRIGHT |
  1455. IEC958_AES0_CON_EMPHASIS;
  1456. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1457. IEC958_AES1_CON_CATEGORY;
  1458. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1459. return 0;
  1460. }
  1461. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1462. struct snd_ctl_elem_value *ucontrol)
  1463. {
  1464. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1465. IEC958_AES0_PROFESSIONAL |
  1466. IEC958_AES0_PRO_FS |
  1467. IEC958_AES0_PRO_EMPHASIS;
  1468. return 0;
  1469. }
  1470. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1471. {
  1472. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1473. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1474. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1475. .info = snd_vt1724_spdif_info,
  1476. .get = snd_vt1724_spdif_maskc_get,
  1477. };
  1478. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1479. {
  1480. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1481. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1482. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1483. .info = snd_vt1724_spdif_info,
  1484. .get = snd_vt1724_spdif_maskp_get,
  1485. };
  1486. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1487. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1488. struct snd_ctl_elem_value *ucontrol)
  1489. {
  1490. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1491. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1492. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1493. return 0;
  1494. }
  1495. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1496. struct snd_ctl_elem_value *ucontrol)
  1497. {
  1498. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1499. unsigned char old, val;
  1500. spin_lock_irq(&ice->reg_lock);
  1501. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1502. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1503. if (ucontrol->value.integer.value[0])
  1504. val |= VT1724_CFG_SPDIF_OUT_EN;
  1505. if (old != val)
  1506. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1507. spin_unlock_irq(&ice->reg_lock);
  1508. return old != val;
  1509. }
  1510. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1511. {
  1512. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1513. /* FIXME: the following conflict with IEC958 Playback Route */
  1514. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1515. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1516. .info = snd_vt1724_spdif_sw_info,
  1517. .get = snd_vt1724_spdif_sw_get,
  1518. .put = snd_vt1724_spdif_sw_put
  1519. };
  1520. #if 0 /* NOT USED YET */
  1521. /*
  1522. * GPIO access from extern
  1523. */
  1524. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1525. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1526. struct snd_ctl_elem_value *ucontrol)
  1527. {
  1528. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1529. int shift = kcontrol->private_value & 0xff;
  1530. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1531. snd_ice1712_save_gpio_status(ice);
  1532. ucontrol->value.integer.value[0] =
  1533. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1534. snd_ice1712_restore_gpio_status(ice);
  1535. return 0;
  1536. }
  1537. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_value *ucontrol)
  1539. {
  1540. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1541. int shift = kcontrol->private_value & 0xff;
  1542. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1543. unsigned int val, nval;
  1544. if (kcontrol->private_value & (1 << 31))
  1545. return -EPERM;
  1546. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1547. snd_ice1712_save_gpio_status(ice);
  1548. val = snd_ice1712_gpio_read(ice);
  1549. nval |= val & ~(1 << shift);
  1550. if (val != nval)
  1551. snd_ice1712_gpio_write(ice, nval);
  1552. snd_ice1712_restore_gpio_status(ice);
  1553. return val != nval;
  1554. }
  1555. #endif /* NOT USED YET */
  1556. /*
  1557. * rate
  1558. */
  1559. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1560. struct snd_ctl_elem_info *uinfo)
  1561. {
  1562. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1563. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1564. uinfo->count = 1;
  1565. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1566. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1567. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1568. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1569. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1570. else
  1571. sprintf(uinfo->value.enumerated.name, "%d",
  1572. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1573. return 0;
  1574. }
  1575. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1576. struct snd_ctl_elem_value *ucontrol)
  1577. {
  1578. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1579. unsigned int i, rate;
  1580. spin_lock_irq(&ice->reg_lock);
  1581. if (ice->is_spdif_master(ice)) {
  1582. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1583. } else {
  1584. rate = ice->get_rate(ice);
  1585. ucontrol->value.enumerated.item[0] = 0;
  1586. for (i = 0; i < ice->hw_rates->count; i++) {
  1587. if (ice->hw_rates->list[i] == rate) {
  1588. ucontrol->value.enumerated.item[0] = i;
  1589. break;
  1590. }
  1591. }
  1592. }
  1593. spin_unlock_irq(&ice->reg_lock);
  1594. return 0;
  1595. }
  1596. /* setting clock to external - SPDIF */
  1597. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1598. {
  1599. unsigned char oval;
  1600. unsigned char i2s_oval;
  1601. oval = inb(ICEMT1724(ice, RATE));
  1602. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1603. /* setting 256fs */
  1604. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1605. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1606. }
  1607. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1608. struct snd_ctl_elem_value *ucontrol)
  1609. {
  1610. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1611. unsigned int old_rate, new_rate;
  1612. unsigned int item = ucontrol->value.enumerated.item[0];
  1613. unsigned int spdif = ice->hw_rates->count;
  1614. if (item > spdif)
  1615. return -EINVAL;
  1616. spin_lock_irq(&ice->reg_lock);
  1617. if (ice->is_spdif_master(ice))
  1618. old_rate = 0;
  1619. else
  1620. old_rate = ice->get_rate(ice);
  1621. if (item == spdif) {
  1622. /* switching to external clock via SPDIF */
  1623. ice->set_spdif_clock(ice);
  1624. new_rate = 0;
  1625. } else {
  1626. /* internal on-card clock */
  1627. new_rate = ice->hw_rates->list[item];
  1628. ice->pro_rate_default = new_rate;
  1629. spin_unlock_irq(&ice->reg_lock);
  1630. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1631. spin_lock_irq(&ice->reg_lock);
  1632. }
  1633. spin_unlock_irq(&ice->reg_lock);
  1634. /* the first reset to the SPDIF master mode? */
  1635. if (old_rate != new_rate && !new_rate) {
  1636. /* notify akm chips as well */
  1637. unsigned int i;
  1638. if (ice->gpio.set_pro_rate)
  1639. ice->gpio.set_pro_rate(ice, 0);
  1640. for (i = 0; i < ice->akm_codecs; i++) {
  1641. if (ice->akm[i].ops.set_rate_val)
  1642. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1643. }
  1644. }
  1645. return old_rate != new_rate;
  1646. }
  1647. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1648. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1649. .name = "Multi Track Internal Clock",
  1650. .info = snd_vt1724_pro_internal_clock_info,
  1651. .get = snd_vt1724_pro_internal_clock_get,
  1652. .put = snd_vt1724_pro_internal_clock_put
  1653. };
  1654. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1655. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1656. struct snd_ctl_elem_value *ucontrol)
  1657. {
  1658. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1659. return 0;
  1660. }
  1661. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1662. struct snd_ctl_elem_value *ucontrol)
  1663. {
  1664. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1665. int change = 0, nval;
  1666. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1667. spin_lock_irq(&ice->reg_lock);
  1668. change = PRO_RATE_LOCKED != nval;
  1669. PRO_RATE_LOCKED = nval;
  1670. spin_unlock_irq(&ice->reg_lock);
  1671. return change;
  1672. }
  1673. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1674. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1675. .name = "Multi Track Rate Locking",
  1676. .info = snd_vt1724_pro_rate_locking_info,
  1677. .get = snd_vt1724_pro_rate_locking_get,
  1678. .put = snd_vt1724_pro_rate_locking_put
  1679. };
  1680. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1681. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1682. struct snd_ctl_elem_value *ucontrol)
  1683. {
  1684. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1685. return 0;
  1686. }
  1687. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1688. struct snd_ctl_elem_value *ucontrol)
  1689. {
  1690. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1691. int change = 0, nval;
  1692. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1693. spin_lock_irq(&ice->reg_lock);
  1694. change = PRO_RATE_RESET != nval;
  1695. PRO_RATE_RESET = nval;
  1696. spin_unlock_irq(&ice->reg_lock);
  1697. return change;
  1698. }
  1699. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1700. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1701. .name = "Multi Track Rate Reset",
  1702. .info = snd_vt1724_pro_rate_reset_info,
  1703. .get = snd_vt1724_pro_rate_reset_get,
  1704. .put = snd_vt1724_pro_rate_reset_put
  1705. };
  1706. /*
  1707. * routing
  1708. */
  1709. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1710. struct snd_ctl_elem_info *uinfo)
  1711. {
  1712. static char *texts[] = {
  1713. "PCM Out", /* 0 */
  1714. "H/W In 0", "H/W In 1", /* 1-2 */
  1715. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1716. };
  1717. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1718. uinfo->count = 1;
  1719. uinfo->value.enumerated.items = 5;
  1720. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1721. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1722. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1723. return 0;
  1724. }
  1725. static inline int analog_route_shift(int idx)
  1726. {
  1727. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1728. }
  1729. static inline int digital_route_shift(int idx)
  1730. {
  1731. return idx * 3;
  1732. }
  1733. int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
  1734. {
  1735. unsigned long val;
  1736. unsigned char eitem;
  1737. static const unsigned char xlate[8] = {
  1738. 0, 255, 1, 2, 255, 255, 3, 4,
  1739. };
  1740. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1741. val >>= shift;
  1742. val &= 7; /* we now have 3 bits per output */
  1743. eitem = xlate[val];
  1744. if (eitem == 255) {
  1745. snd_BUG();
  1746. return 0;
  1747. }
  1748. return eitem;
  1749. }
  1750. int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
  1751. int shift)
  1752. {
  1753. unsigned int old_val, nval;
  1754. int change;
  1755. static const unsigned char xroute[8] = {
  1756. 0, /* PCM */
  1757. 2, /* PSDIN0 Left */
  1758. 3, /* PSDIN0 Right */
  1759. 6, /* SPDIN Left */
  1760. 7, /* SPDIN Right */
  1761. };
  1762. nval = xroute[val % 5];
  1763. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1764. val &= ~(0x07 << shift);
  1765. val |= nval << shift;
  1766. change = val != old_val;
  1767. if (change)
  1768. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1769. return change;
  1770. }
  1771. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1772. struct snd_ctl_elem_value *ucontrol)
  1773. {
  1774. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1775. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1776. ucontrol->value.enumerated.item[0] =
  1777. snd_ice1724_get_route_val(ice, analog_route_shift(idx));
  1778. return 0;
  1779. }
  1780. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1781. struct snd_ctl_elem_value *ucontrol)
  1782. {
  1783. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1784. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1785. return snd_ice1724_put_route_val(ice,
  1786. ucontrol->value.enumerated.item[0],
  1787. analog_route_shift(idx));
  1788. }
  1789. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1793. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1794. ucontrol->value.enumerated.item[0] =
  1795. snd_ice1724_get_route_val(ice, digital_route_shift(idx));
  1796. return 0;
  1797. }
  1798. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1799. struct snd_ctl_elem_value *ucontrol)
  1800. {
  1801. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1802. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1803. return snd_ice1724_put_route_val(ice,
  1804. ucontrol->value.enumerated.item[0],
  1805. digital_route_shift(idx));
  1806. }
  1807. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
  1808. {
  1809. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1810. .name = "H/W Playback Route",
  1811. .info = snd_vt1724_pro_route_info,
  1812. .get = snd_vt1724_pro_route_analog_get,
  1813. .put = snd_vt1724_pro_route_analog_put,
  1814. };
  1815. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1816. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1817. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1818. .info = snd_vt1724_pro_route_info,
  1819. .get = snd_vt1724_pro_route_spdif_get,
  1820. .put = snd_vt1724_pro_route_spdif_put,
  1821. .count = 2,
  1822. };
  1823. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1824. struct snd_ctl_elem_info *uinfo)
  1825. {
  1826. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1827. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1828. uinfo->value.integer.min = 0;
  1829. uinfo->value.integer.max = 255;
  1830. return 0;
  1831. }
  1832. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1833. struct snd_ctl_elem_value *ucontrol)
  1834. {
  1835. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1836. int idx;
  1837. spin_lock_irq(&ice->reg_lock);
  1838. for (idx = 0; idx < 22; idx++) {
  1839. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1840. ucontrol->value.integer.value[idx] =
  1841. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1842. }
  1843. spin_unlock_irq(&ice->reg_lock);
  1844. return 0;
  1845. }
  1846. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1847. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1848. .name = "Multi Track Peak",
  1849. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1850. .info = snd_vt1724_pro_peak_info,
  1851. .get = snd_vt1724_pro_peak_get
  1852. };
  1853. /*
  1854. *
  1855. */
  1856. static struct snd_ice1712_card_info no_matched __devinitdata;
  1857. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1858. snd_vt1724_revo_cards,
  1859. snd_vt1724_amp_cards,
  1860. snd_vt1724_aureon_cards,
  1861. snd_vt1720_mobo_cards,
  1862. snd_vt1720_pontis_cards,
  1863. snd_vt1724_prodigy_hifi_cards,
  1864. snd_vt1724_prodigy192_cards,
  1865. snd_vt1724_juli_cards,
  1866. snd_vt1724_maya44_cards,
  1867. snd_vt1724_phase_cards,
  1868. snd_vt1724_wtm_cards,
  1869. snd_vt1724_se_cards,
  1870. NULL,
  1871. };
  1872. /*
  1873. */
  1874. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1875. {
  1876. int t = 0x10000;
  1877. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1878. ;
  1879. if (t == -1)
  1880. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1881. }
  1882. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1883. unsigned char dev, unsigned char addr)
  1884. {
  1885. unsigned char val;
  1886. mutex_lock(&ice->i2c_mutex);
  1887. wait_i2c_busy(ice);
  1888. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1889. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1890. wait_i2c_busy(ice);
  1891. val = inb(ICEREG1724(ice, I2C_DATA));
  1892. mutex_unlock(&ice->i2c_mutex);
  1893. /*
  1894. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1895. */
  1896. return val;
  1897. }
  1898. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1899. unsigned char dev, unsigned char addr, unsigned char data)
  1900. {
  1901. mutex_lock(&ice->i2c_mutex);
  1902. wait_i2c_busy(ice);
  1903. /*
  1904. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1905. */
  1906. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1907. outb(data, ICEREG1724(ice, I2C_DATA));
  1908. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1909. wait_i2c_busy(ice);
  1910. mutex_unlock(&ice->i2c_mutex);
  1911. }
  1912. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1913. const char *modelname)
  1914. {
  1915. const int dev = 0xa0; /* EEPROM device address */
  1916. unsigned int i, size;
  1917. struct snd_ice1712_card_info * const *tbl, *c;
  1918. if (!modelname || !*modelname) {
  1919. ice->eeprom.subvendor = 0;
  1920. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1921. ice->eeprom.subvendor =
  1922. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1923. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1924. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1925. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1926. if (ice->eeprom.subvendor == 0 ||
  1927. ice->eeprom.subvendor == (unsigned int)-1) {
  1928. /* invalid subvendor from EEPROM, try the PCI
  1929. * subststem ID instead
  1930. */
  1931. u16 vendor, device;
  1932. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1933. &vendor);
  1934. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1935. ice->eeprom.subvendor =
  1936. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1937. if (ice->eeprom.subvendor == 0 ||
  1938. ice->eeprom.subvendor == (unsigned int)-1) {
  1939. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1940. return -ENXIO;
  1941. }
  1942. }
  1943. }
  1944. for (tbl = card_tables; *tbl; tbl++) {
  1945. for (c = *tbl; c->subvendor; c++) {
  1946. if (modelname && c->model &&
  1947. !strcmp(modelname, c->model)) {
  1948. printk(KERN_INFO "ice1724: Using board model %s\n",
  1949. c->name);
  1950. ice->eeprom.subvendor = c->subvendor;
  1951. } else if (c->subvendor != ice->eeprom.subvendor)
  1952. continue;
  1953. if (!c->eeprom_size || !c->eeprom_data)
  1954. goto found;
  1955. /* if the EEPROM is given by the driver, use it */
  1956. snd_printdd("using the defined eeprom..\n");
  1957. ice->eeprom.version = 2;
  1958. ice->eeprom.size = c->eeprom_size + 6;
  1959. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1960. goto read_skipped;
  1961. }
  1962. }
  1963. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1964. ice->eeprom.subvendor);
  1965. found:
  1966. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1967. if (ice->eeprom.size < 6)
  1968. ice->eeprom.size = 32;
  1969. else if (ice->eeprom.size > 32) {
  1970. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1971. ice->eeprom.size);
  1972. return -EIO;
  1973. }
  1974. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1975. if (ice->eeprom.version != 2)
  1976. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1977. ice->eeprom.version);
  1978. size = ice->eeprom.size - 6;
  1979. for (i = 0; i < size; i++)
  1980. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1981. read_skipped:
  1982. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1983. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1984. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1985. return 0;
  1986. }
  1987. static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1988. {
  1989. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1990. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  1991. msleep(10);
  1992. outb(0, ICEREG1724(ice, CONTROL));
  1993. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  1994. msleep(10);
  1995. }
  1996. static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1997. {
  1998. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1999. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  2000. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  2001. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  2002. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2003. ice->gpio.direction = ice->eeprom.gpiodir;
  2004. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  2005. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  2006. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  2007. outb(0, ICEREG1724(ice, POWERDOWN));
  2008. /* MPU_RX and TX irq masks are cleared later dynamically */
  2009. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2010. /* don't handle FIFO overrun/underruns (just yet),
  2011. * since they cause machine lockups
  2012. */
  2013. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2014. return 0;
  2015. }
  2016. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  2017. {
  2018. int err;
  2019. struct snd_kcontrol *kctl;
  2020. if (snd_BUG_ON(!ice->pcm))
  2021. return -EIO;
  2022. if (!ice->own_routing) {
  2023. err = snd_ctl_add(ice->card,
  2024. snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2025. if (err < 0)
  2026. return err;
  2027. }
  2028. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2029. if (err < 0)
  2030. return err;
  2031. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2032. if (err < 0)
  2033. return err;
  2034. kctl->id.device = ice->pcm->device;
  2035. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2036. if (err < 0)
  2037. return err;
  2038. kctl->id.device = ice->pcm->device;
  2039. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2040. if (err < 0)
  2041. return err;
  2042. kctl->id.device = ice->pcm->device;
  2043. #if 0 /* use default only */
  2044. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2045. if (err < 0)
  2046. return err;
  2047. kctl->id.device = ice->pcm->device;
  2048. ice->spdif.stream_ctl = kctl;
  2049. #endif
  2050. return 0;
  2051. }
  2052. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2053. {
  2054. int err;
  2055. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2056. if (err < 0)
  2057. return err;
  2058. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2059. if (err < 0)
  2060. return err;
  2061. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2062. if (err < 0)
  2063. return err;
  2064. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2065. if (err < 0)
  2066. return err;
  2067. if (!ice->own_routing && ice->num_total_dacs > 0) {
  2068. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2069. tmp.count = ice->num_total_dacs;
  2070. if (ice->vt1720 && tmp.count > 2)
  2071. tmp.count = 2;
  2072. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2073. if (err < 0)
  2074. return err;
  2075. }
  2076. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2077. if (err < 0)
  2078. return err;
  2079. return 0;
  2080. }
  2081. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2082. {
  2083. if (!ice->port)
  2084. goto __hw_end;
  2085. /* mask all interrupts */
  2086. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2087. outb(0xff, ICEREG1724(ice, IRQMASK));
  2088. /* --- */
  2089. __hw_end:
  2090. if (ice->irq >= 0)
  2091. free_irq(ice->irq, ice);
  2092. pci_release_regions(ice->pci);
  2093. snd_ice1712_akm4xxx_free(ice);
  2094. pci_disable_device(ice->pci);
  2095. kfree(ice->spec);
  2096. kfree(ice);
  2097. return 0;
  2098. }
  2099. static int snd_vt1724_dev_free(struct snd_device *device)
  2100. {
  2101. struct snd_ice1712 *ice = device->device_data;
  2102. return snd_vt1724_free(ice);
  2103. }
  2104. static int __devinit snd_vt1724_create(struct snd_card *card,
  2105. struct pci_dev *pci,
  2106. const char *modelname,
  2107. struct snd_ice1712 **r_ice1712)
  2108. {
  2109. struct snd_ice1712 *ice;
  2110. int err;
  2111. static struct snd_device_ops ops = {
  2112. .dev_free = snd_vt1724_dev_free,
  2113. };
  2114. *r_ice1712 = NULL;
  2115. /* enable PCI device */
  2116. err = pci_enable_device(pci);
  2117. if (err < 0)
  2118. return err;
  2119. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2120. if (ice == NULL) {
  2121. pci_disable_device(pci);
  2122. return -ENOMEM;
  2123. }
  2124. ice->vt1724 = 1;
  2125. spin_lock_init(&ice->reg_lock);
  2126. mutex_init(&ice->gpio_mutex);
  2127. mutex_init(&ice->open_mutex);
  2128. mutex_init(&ice->i2c_mutex);
  2129. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2130. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2131. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2132. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2133. ice->card = card;
  2134. ice->pci = pci;
  2135. ice->irq = -1;
  2136. pci_set_master(pci);
  2137. snd_vt1724_proc_init(ice);
  2138. synchronize_irq(pci->irq);
  2139. card->private_data = ice;
  2140. err = pci_request_regions(pci, "ICE1724");
  2141. if (err < 0) {
  2142. kfree(ice);
  2143. pci_disable_device(pci);
  2144. return err;
  2145. }
  2146. ice->port = pci_resource_start(pci, 0);
  2147. ice->profi_port = pci_resource_start(pci, 1);
  2148. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2149. IRQF_SHARED, "ICE1724", ice)) {
  2150. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2151. snd_vt1724_free(ice);
  2152. return -EIO;
  2153. }
  2154. ice->irq = pci->irq;
  2155. snd_vt1724_chip_reset(ice);
  2156. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2157. snd_vt1724_free(ice);
  2158. return -EIO;
  2159. }
  2160. if (snd_vt1724_chip_init(ice) < 0) {
  2161. snd_vt1724_free(ice);
  2162. return -EIO;
  2163. }
  2164. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2165. if (err < 0) {
  2166. snd_vt1724_free(ice);
  2167. return err;
  2168. }
  2169. snd_card_set_dev(card, &pci->dev);
  2170. *r_ice1712 = ice;
  2171. return 0;
  2172. }
  2173. /*
  2174. *
  2175. * Registration
  2176. *
  2177. */
  2178. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2179. const struct pci_device_id *pci_id)
  2180. {
  2181. static int dev;
  2182. struct snd_card *card;
  2183. struct snd_ice1712 *ice;
  2184. int pcm_dev = 0, err;
  2185. struct snd_ice1712_card_info * const *tbl, *c;
  2186. if (dev >= SNDRV_CARDS)
  2187. return -ENODEV;
  2188. if (!enable[dev]) {
  2189. dev++;
  2190. return -ENOENT;
  2191. }
  2192. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2193. if (err < 0)
  2194. return err;
  2195. strcpy(card->driver, "ICE1724");
  2196. strcpy(card->shortname, "ICEnsemble ICE1724");
  2197. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2198. if (err < 0) {
  2199. snd_card_free(card);
  2200. return err;
  2201. }
  2202. for (tbl = card_tables; *tbl; tbl++) {
  2203. for (c = *tbl; c->subvendor; c++) {
  2204. if (c->subvendor == ice->eeprom.subvendor) {
  2205. strcpy(card->shortname, c->name);
  2206. if (c->driver) /* specific driver? */
  2207. strcpy(card->driver, c->driver);
  2208. if (c->chip_init) {
  2209. err = c->chip_init(ice);
  2210. if (err < 0) {
  2211. snd_card_free(card);
  2212. return err;
  2213. }
  2214. }
  2215. goto __found;
  2216. }
  2217. }
  2218. }
  2219. c = &no_matched;
  2220. __found:
  2221. /*
  2222. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2223. * ICE1712 has only one for both (mixed up).
  2224. *
  2225. * Confusingly the analog PCM is named "professional" here because it
  2226. * was called so in ice1712 driver, and vt1724 driver is derived from
  2227. * ice1712 driver.
  2228. */
  2229. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2230. if (!ice->is_spdif_master)
  2231. ice->is_spdif_master = stdclock_is_spdif_master;
  2232. if (!ice->get_rate)
  2233. ice->get_rate = stdclock_get_rate;
  2234. if (!ice->set_rate)
  2235. ice->set_rate = stdclock_set_rate;
  2236. if (!ice->set_mclk)
  2237. ice->set_mclk = stdclock_set_mclk;
  2238. if (!ice->set_spdif_clock)
  2239. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2240. if (!ice->hw_rates)
  2241. set_std_hw_rates(ice);
  2242. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2243. if (err < 0) {
  2244. snd_card_free(card);
  2245. return err;
  2246. }
  2247. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2248. if (err < 0) {
  2249. snd_card_free(card);
  2250. return err;
  2251. }
  2252. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2253. if (err < 0) {
  2254. snd_card_free(card);
  2255. return err;
  2256. }
  2257. err = snd_vt1724_ac97_mixer(ice);
  2258. if (err < 0) {
  2259. snd_card_free(card);
  2260. return err;
  2261. }
  2262. err = snd_vt1724_build_controls(ice);
  2263. if (err < 0) {
  2264. snd_card_free(card);
  2265. return err;
  2266. }
  2267. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2268. err = snd_vt1724_spdif_build_controls(ice);
  2269. if (err < 0) {
  2270. snd_card_free(card);
  2271. return err;
  2272. }
  2273. }
  2274. if (c->build_controls) {
  2275. err = c->build_controls(ice);
  2276. if (err < 0) {
  2277. snd_card_free(card);
  2278. return err;
  2279. }
  2280. }
  2281. if (!c->no_mpu401) {
  2282. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2283. struct snd_rawmidi *rmidi;
  2284. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2285. if (err < 0) {
  2286. snd_card_free(card);
  2287. return err;
  2288. }
  2289. ice->rmidi[0] = rmidi;
  2290. rmidi->private_data = ice;
  2291. strcpy(rmidi->name, "ICE1724 MIDI");
  2292. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2293. SNDRV_RAWMIDI_INFO_INPUT |
  2294. SNDRV_RAWMIDI_INFO_DUPLEX;
  2295. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2296. &vt1724_midi_output_ops);
  2297. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2298. &vt1724_midi_input_ops);
  2299. /* set watermarks */
  2300. outb(VT1724_MPU_RX_FIFO | 0x1,
  2301. ICEREG1724(ice, MPU_FIFO_WM));
  2302. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2303. /* set UART mode */
  2304. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2305. }
  2306. }
  2307. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2308. card->shortname, ice->port, ice->irq);
  2309. err = snd_card_register(card);
  2310. if (err < 0) {
  2311. snd_card_free(card);
  2312. return err;
  2313. }
  2314. pci_set_drvdata(pci, card);
  2315. dev++;
  2316. return 0;
  2317. }
  2318. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2319. {
  2320. snd_card_free(pci_get_drvdata(pci));
  2321. pci_set_drvdata(pci, NULL);
  2322. }
  2323. #ifdef CONFIG_PM
  2324. static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state)
  2325. {
  2326. struct snd_card *card = pci_get_drvdata(pci);
  2327. struct snd_ice1712 *ice = card->private_data;
  2328. if (!ice->pm_suspend_enabled)
  2329. return 0;
  2330. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2331. snd_pcm_suspend_all(ice->pcm);
  2332. snd_pcm_suspend_all(ice->pcm_pro);
  2333. snd_pcm_suspend_all(ice->pcm_ds);
  2334. snd_ac97_suspend(ice->ac97);
  2335. spin_lock_irq(&ice->reg_lock);
  2336. ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
  2337. ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
  2338. ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
  2339. ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  2340. spin_unlock_irq(&ice->reg_lock);
  2341. if (ice->pm_suspend)
  2342. ice->pm_suspend(ice);
  2343. pci_disable_device(pci);
  2344. pci_save_state(pci);
  2345. pci_set_power_state(pci, pci_choose_state(pci, state));
  2346. return 0;
  2347. }
  2348. static int snd_vt1724_resume(struct pci_dev *pci)
  2349. {
  2350. struct snd_card *card = pci_get_drvdata(pci);
  2351. struct snd_ice1712 *ice = card->private_data;
  2352. if (!ice->pm_suspend_enabled)
  2353. return 0;
  2354. pci_set_power_state(pci, PCI_D0);
  2355. pci_restore_state(pci);
  2356. if (pci_enable_device(pci) < 0) {
  2357. snd_card_disconnect(card);
  2358. return -EIO;
  2359. }
  2360. pci_set_master(pci);
  2361. snd_vt1724_chip_reset(ice);
  2362. if (snd_vt1724_chip_init(ice) < 0) {
  2363. snd_card_disconnect(card);
  2364. return -EIO;
  2365. }
  2366. if (ice->pm_resume)
  2367. ice->pm_resume(ice);
  2368. if (ice->pm_saved_is_spdif_master) {
  2369. /* switching to external clock via SPDIF */
  2370. ice->set_spdif_clock(ice);
  2371. } else {
  2372. /* internal on-card clock */
  2373. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  2374. }
  2375. update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
  2376. outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
  2377. outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
  2378. if (ice->ac97)
  2379. snd_ac97_resume(ice->ac97);
  2380. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2381. return 0;
  2382. }
  2383. #endif
  2384. static struct pci_driver driver = {
  2385. .name = "ICE1724",
  2386. .id_table = snd_vt1724_ids,
  2387. .probe = snd_vt1724_probe,
  2388. .remove = __devexit_p(snd_vt1724_remove),
  2389. #ifdef CONFIG_PM
  2390. .suspend = snd_vt1724_suspend,
  2391. .resume = snd_vt1724_resume,
  2392. #endif
  2393. };
  2394. static int __init alsa_card_ice1724_init(void)
  2395. {
  2396. return pci_register_driver(&driver);
  2397. }
  2398. static void __exit alsa_card_ice1724_exit(void)
  2399. {
  2400. pci_unregister_driver(&driver);
  2401. }
  2402. module_init(alsa_card_ice1724_init)
  2403. module_exit(alsa_card_ice1724_exit)