ice1712.c 82 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. /*
  22. NOTES:
  23. - spdif nonaudio consumer mode does not work (at least with my
  24. Sony STR-DB830)
  25. */
  26. /*
  27. * Changes:
  28. *
  29. * 2002.09.09 Takashi Iwai <tiwai@suse.de>
  30. * split the code to several files. each low-level routine
  31. * is stored in the local file and called from registration
  32. * function from card_info struct.
  33. *
  34. * 2002.11.26 James Stafford <jstafford@ampltd.com>
  35. * Added support for VT1724 (Envy24HT)
  36. * I have left out support for 176.4 and 192 KHz for the moment.
  37. * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
  38. *
  39. * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
  40. * Split vt1724 part to an independent driver.
  41. * The GPIO is accessed through the callback functions now.
  42. *
  43. * 2004.03.31 Doug McLain <nostar@comcast.net>
  44. * Added support for Event Electronics EZ8 card to hoontech.c.
  45. */
  46. #include <linux/io.h>
  47. #include <linux/delay.h>
  48. #include <linux/interrupt.h>
  49. #include <linux/init.h>
  50. #include <linux/pci.h>
  51. #include <linux/dma-mapping.h>
  52. #include <linux/slab.h>
  53. #include <linux/moduleparam.h>
  54. #include <linux/mutex.h>
  55. #include <sound/core.h>
  56. #include <sound/cs8427.h>
  57. #include <sound/info.h>
  58. #include <sound/initval.h>
  59. #include <sound/tlv.h>
  60. #include <sound/asoundef.h>
  61. #include "ice1712.h"
  62. /* lowlevel routines */
  63. #include "delta.h"
  64. #include "ews.h"
  65. #include "hoontech.h"
  66. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  67. MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
  68. MODULE_LICENSE("GPL");
  69. MODULE_SUPPORTED_DEVICE("{"
  70. HOONTECH_DEVICE_DESC
  71. DELTA_DEVICE_DESC
  72. EWS_DEVICE_DESC
  73. "{ICEnsemble,Generic ICE1712},"
  74. "{ICEnsemble,Generic Envy24}}");
  75. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  76. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  77. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
  78. static char *model[SNDRV_CARDS];
  79. static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
  80. static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
  81. static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
  82. module_param_array(index, int, NULL, 0444);
  83. MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
  84. module_param_array(id, charp, NULL, 0444);
  85. MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
  86. module_param_array(enable, bool, NULL, 0444);
  87. MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
  88. module_param_array(omni, bool, NULL, 0444);
  89. MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
  90. module_param_array(cs8427_timeout, int, NULL, 0444);
  91. MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
  92. module_param_array(model, charp, NULL, 0444);
  93. MODULE_PARM_DESC(model, "Use the given board model.");
  94. module_param_array(dxr_enable, int, NULL, 0444);
  95. MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
  96. static const struct pci_device_id snd_ice1712_ids[] = {
  97. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
  98. { 0, }
  99. };
  100. MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
  101. static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
  102. static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
  103. static int PRO_RATE_LOCKED;
  104. static int PRO_RATE_RESET = 1;
  105. static unsigned int PRO_RATE_DEFAULT = 44100;
  106. /*
  107. * Basic I/O
  108. */
  109. /* check whether the clock mode is spdif-in */
  110. static inline int is_spdif_master(struct snd_ice1712 *ice)
  111. {
  112. return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
  113. }
  114. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  115. {
  116. return is_spdif_master(ice) || PRO_RATE_LOCKED;
  117. }
  118. static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
  119. {
  120. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  121. outl(data, ICEDS(ice, DATA));
  122. }
  123. static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
  124. {
  125. outb((channel << 4) | addr, ICEDS(ice, INDEX));
  126. return inl(ICEDS(ice, DATA));
  127. }
  128. static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
  129. unsigned short reg,
  130. unsigned short val)
  131. {
  132. struct snd_ice1712 *ice = ac97->private_data;
  133. int tm;
  134. unsigned char old_cmd = 0;
  135. for (tm = 0; tm < 0x10000; tm++) {
  136. old_cmd = inb(ICEREG(ice, AC97_CMD));
  137. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  138. continue;
  139. if (!(old_cmd & ICE1712_AC97_READY))
  140. continue;
  141. break;
  142. }
  143. outb(reg, ICEREG(ice, AC97_INDEX));
  144. outw(val, ICEREG(ice, AC97_DATA));
  145. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  146. outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
  147. for (tm = 0; tm < 0x10000; tm++)
  148. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  149. break;
  150. }
  151. static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
  152. unsigned short reg)
  153. {
  154. struct snd_ice1712 *ice = ac97->private_data;
  155. int tm;
  156. unsigned char old_cmd = 0;
  157. for (tm = 0; tm < 0x10000; tm++) {
  158. old_cmd = inb(ICEREG(ice, AC97_CMD));
  159. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  160. continue;
  161. if (!(old_cmd & ICE1712_AC97_READY))
  162. continue;
  163. break;
  164. }
  165. outb(reg, ICEREG(ice, AC97_INDEX));
  166. outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
  167. for (tm = 0; tm < 0x10000; tm++)
  168. if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  169. break;
  170. if (tm >= 0x10000) /* timeout */
  171. return ~0;
  172. return inw(ICEREG(ice, AC97_DATA));
  173. }
  174. /*
  175. * pro ac97 section
  176. */
  177. static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
  178. unsigned short reg,
  179. unsigned short val)
  180. {
  181. struct snd_ice1712 *ice = ac97->private_data;
  182. int tm;
  183. unsigned char old_cmd = 0;
  184. for (tm = 0; tm < 0x10000; tm++) {
  185. old_cmd = inb(ICEMT(ice, AC97_CMD));
  186. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  187. continue;
  188. if (!(old_cmd & ICE1712_AC97_READY))
  189. continue;
  190. break;
  191. }
  192. outb(reg, ICEMT(ice, AC97_INDEX));
  193. outw(val, ICEMT(ice, AC97_DATA));
  194. old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
  195. outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
  196. for (tm = 0; tm < 0x10000; tm++)
  197. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
  198. break;
  199. }
  200. static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
  201. unsigned short reg)
  202. {
  203. struct snd_ice1712 *ice = ac97->private_data;
  204. int tm;
  205. unsigned char old_cmd = 0;
  206. for (tm = 0; tm < 0x10000; tm++) {
  207. old_cmd = inb(ICEMT(ice, AC97_CMD));
  208. if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
  209. continue;
  210. if (!(old_cmd & ICE1712_AC97_READY))
  211. continue;
  212. break;
  213. }
  214. outb(reg, ICEMT(ice, AC97_INDEX));
  215. outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
  216. for (tm = 0; tm < 0x10000; tm++)
  217. if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
  218. break;
  219. if (tm >= 0x10000) /* timeout */
  220. return ~0;
  221. return inw(ICEMT(ice, AC97_DATA));
  222. }
  223. /*
  224. * consumer ac97 digital mix
  225. */
  226. #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
  227. static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  228. {
  229. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  230. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
  231. return 0;
  232. }
  233. static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  234. {
  235. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  236. unsigned char val, nval;
  237. spin_lock_irq(&ice->reg_lock);
  238. val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
  239. nval = val & ~ICE1712_ROUTE_AC97;
  240. if (ucontrol->value.integer.value[0])
  241. nval |= ICE1712_ROUTE_AC97;
  242. outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
  243. spin_unlock_irq(&ice->reg_lock);
  244. return val != nval;
  245. }
  246. static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
  247. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  248. .name = "Digital Mixer To AC97",
  249. .info = snd_ice1712_digmix_route_ac97_info,
  250. .get = snd_ice1712_digmix_route_ac97_get,
  251. .put = snd_ice1712_digmix_route_ac97_put,
  252. };
  253. /*
  254. * gpio operations
  255. */
  256. static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  257. {
  258. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
  259. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  260. }
  261. static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  262. {
  263. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
  264. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  265. }
  266. static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
  267. {
  268. return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  269. }
  270. static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
  271. {
  272. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
  273. inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
  274. }
  275. /*
  276. *
  277. * CS8427 interface
  278. *
  279. */
  280. /*
  281. * change the input clock selection
  282. * spdif_clock = 1 - IEC958 input, 0 - Envy24
  283. */
  284. static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
  285. {
  286. unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
  287. unsigned char val, nval;
  288. int res = 0;
  289. snd_i2c_lock(ice->i2c);
  290. if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
  291. snd_i2c_unlock(ice->i2c);
  292. return -EIO;
  293. }
  294. if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
  295. snd_i2c_unlock(ice->i2c);
  296. return -EIO;
  297. }
  298. nval = val & 0xf0;
  299. if (spdif_clock)
  300. nval |= 0x01;
  301. else
  302. nval |= 0x04;
  303. if (val != nval) {
  304. reg[1] = nval;
  305. if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
  306. res = -EIO;
  307. } else {
  308. res++;
  309. }
  310. }
  311. snd_i2c_unlock(ice->i2c);
  312. return res;
  313. }
  314. /*
  315. * spdif callbacks
  316. */
  317. static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  318. {
  319. snd_cs8427_iec958_active(ice->cs8427, 1);
  320. }
  321. static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  322. {
  323. snd_cs8427_iec958_active(ice->cs8427, 0);
  324. }
  325. static void setup_cs8427(struct snd_ice1712 *ice, int rate)
  326. {
  327. snd_cs8427_iec958_pcm(ice->cs8427, rate);
  328. }
  329. /*
  330. * create and initialize callbacks for cs8427 interface
  331. */
  332. int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
  333. {
  334. int err;
  335. err = snd_cs8427_create(ice->i2c, addr,
  336. (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
  337. if (err < 0) {
  338. snd_printk(KERN_ERR "CS8427 initialization failed\n");
  339. return err;
  340. }
  341. ice->spdif.ops.open = open_cs8427;
  342. ice->spdif.ops.close = close_cs8427;
  343. ice->spdif.ops.setup_rate = setup_cs8427;
  344. return 0;
  345. }
  346. static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
  347. {
  348. /* change CS8427 clock source too */
  349. if (ice->cs8427)
  350. snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
  351. /* notify ak4524 chip as well */
  352. if (spdif_is_master) {
  353. unsigned int i;
  354. for (i = 0; i < ice->akm_codecs; i++) {
  355. if (ice->akm[i].ops.set_rate_val)
  356. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  357. }
  358. }
  359. }
  360. /*
  361. * Interrupt handler
  362. */
  363. static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
  364. {
  365. struct snd_ice1712 *ice = dev_id;
  366. unsigned char status;
  367. int handled = 0;
  368. while (1) {
  369. status = inb(ICEREG(ice, IRQSTAT));
  370. if (status == 0)
  371. break;
  372. handled = 1;
  373. if (status & ICE1712_IRQ_MPU1) {
  374. if (ice->rmidi[0])
  375. snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
  376. outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
  377. status &= ~ICE1712_IRQ_MPU1;
  378. }
  379. if (status & ICE1712_IRQ_TIMER)
  380. outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
  381. if (status & ICE1712_IRQ_MPU2) {
  382. if (ice->rmidi[1])
  383. snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
  384. outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
  385. status &= ~ICE1712_IRQ_MPU2;
  386. }
  387. if (status & ICE1712_IRQ_PROPCM) {
  388. unsigned char mtstat = inb(ICEMT(ice, IRQ));
  389. if (mtstat & ICE1712_MULTI_PBKSTATUS) {
  390. if (ice->playback_pro_substream)
  391. snd_pcm_period_elapsed(ice->playback_pro_substream);
  392. outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
  393. }
  394. if (mtstat & ICE1712_MULTI_CAPSTATUS) {
  395. if (ice->capture_pro_substream)
  396. snd_pcm_period_elapsed(ice->capture_pro_substream);
  397. outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
  398. }
  399. }
  400. if (status & ICE1712_IRQ_FM)
  401. outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
  402. if (status & ICE1712_IRQ_PBKDS) {
  403. u32 idx;
  404. u16 pbkstatus;
  405. struct snd_pcm_substream *substream;
  406. pbkstatus = inw(ICEDS(ice, INTSTAT));
  407. /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
  408. for (idx = 0; idx < 6; idx++) {
  409. if ((pbkstatus & (3 << (idx * 2))) == 0)
  410. continue;
  411. substream = ice->playback_con_substream_ds[idx];
  412. if (substream != NULL)
  413. snd_pcm_period_elapsed(substream);
  414. outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
  415. }
  416. outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
  417. }
  418. if (status & ICE1712_IRQ_CONCAP) {
  419. if (ice->capture_con_substream)
  420. snd_pcm_period_elapsed(ice->capture_con_substream);
  421. outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
  422. }
  423. if (status & ICE1712_IRQ_CONPBK) {
  424. if (ice->playback_con_substream)
  425. snd_pcm_period_elapsed(ice->playback_con_substream);
  426. outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
  427. }
  428. }
  429. return IRQ_RETVAL(handled);
  430. }
  431. /*
  432. * PCM part - misc
  433. */
  434. static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
  435. struct snd_pcm_hw_params *hw_params)
  436. {
  437. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  438. }
  439. static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
  440. {
  441. return snd_pcm_lib_free_pages(substream);
  442. }
  443. /*
  444. * PCM part - consumer I/O
  445. */
  446. static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
  447. int cmd)
  448. {
  449. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  450. int result = 0;
  451. u32 tmp;
  452. spin_lock(&ice->reg_lock);
  453. tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
  454. if (cmd == SNDRV_PCM_TRIGGER_START) {
  455. tmp |= 1;
  456. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  457. tmp &= ~1;
  458. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  459. tmp |= 2;
  460. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  461. tmp &= ~2;
  462. } else {
  463. result = -EINVAL;
  464. }
  465. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  466. spin_unlock(&ice->reg_lock);
  467. return result;
  468. }
  469. static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
  470. int cmd)
  471. {
  472. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  473. int result = 0;
  474. u32 tmp;
  475. spin_lock(&ice->reg_lock);
  476. tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
  477. if (cmd == SNDRV_PCM_TRIGGER_START) {
  478. tmp |= 1;
  479. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  480. tmp &= ~1;
  481. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
  482. tmp |= 2;
  483. } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
  484. tmp &= ~2;
  485. } else {
  486. result = -EINVAL;
  487. }
  488. snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
  489. spin_unlock(&ice->reg_lock);
  490. return result;
  491. }
  492. static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
  493. int cmd)
  494. {
  495. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  496. int result = 0;
  497. u8 tmp;
  498. spin_lock(&ice->reg_lock);
  499. tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
  500. if (cmd == SNDRV_PCM_TRIGGER_START) {
  501. tmp |= 1;
  502. } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
  503. tmp &= ~1;
  504. } else {
  505. result = -EINVAL;
  506. }
  507. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  508. spin_unlock(&ice->reg_lock);
  509. return result;
  510. }
  511. static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
  512. {
  513. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  514. struct snd_pcm_runtime *runtime = substream->runtime;
  515. u32 period_size, buf_size, rate, tmp;
  516. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  517. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  518. tmp = 0x0000;
  519. if (snd_pcm_format_width(runtime->format) == 16)
  520. tmp |= 0x10;
  521. if (runtime->channels == 2)
  522. tmp |= 0x08;
  523. rate = (runtime->rate * 8192) / 375;
  524. if (rate > 0x000fffff)
  525. rate = 0x000fffff;
  526. spin_lock_irq(&ice->reg_lock);
  527. outb(0, ice->ddma_port + 15);
  528. outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
  529. outl(runtime->dma_addr, ice->ddma_port + 0);
  530. outw(buf_size, ice->ddma_port + 4);
  531. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
  532. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
  533. snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
  534. snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
  535. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
  536. snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
  537. snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
  538. snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
  539. spin_unlock_irq(&ice->reg_lock);
  540. return 0;
  541. }
  542. static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
  543. {
  544. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  545. struct snd_pcm_runtime *runtime = substream->runtime;
  546. u32 period_size, buf_size, rate, tmp, chn;
  547. period_size = snd_pcm_lib_period_bytes(substream) - 1;
  548. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  549. tmp = 0x0064;
  550. if (snd_pcm_format_width(runtime->format) == 16)
  551. tmp &= ~0x04;
  552. if (runtime->channels == 2)
  553. tmp |= 0x08;
  554. rate = (runtime->rate * 8192) / 375;
  555. if (rate > 0x000fffff)
  556. rate = 0x000fffff;
  557. ice->playback_con_active_buf[substream->number] = 0;
  558. ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
  559. chn = substream->number * 2;
  560. spin_lock_irq(&ice->reg_lock);
  561. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
  562. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
  563. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
  564. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
  565. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
  566. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
  567. snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
  568. if (runtime->channels == 2) {
  569. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
  570. snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
  571. }
  572. spin_unlock_irq(&ice->reg_lock);
  573. return 0;
  574. }
  575. static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
  576. {
  577. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  578. struct snd_pcm_runtime *runtime = substream->runtime;
  579. u32 period_size, buf_size;
  580. u8 tmp;
  581. period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  582. buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
  583. tmp = 0x06;
  584. if (snd_pcm_format_width(runtime->format) == 16)
  585. tmp &= ~0x04;
  586. if (runtime->channels == 2)
  587. tmp &= ~0x02;
  588. spin_lock_irq(&ice->reg_lock);
  589. outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
  590. outw(buf_size, ICEREG(ice, CONCAP_COUNT));
  591. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
  592. snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
  593. snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
  594. spin_unlock_irq(&ice->reg_lock);
  595. snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
  596. return 0;
  597. }
  598. static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
  599. {
  600. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  601. struct snd_pcm_runtime *runtime = substream->runtime;
  602. size_t ptr;
  603. if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
  604. return 0;
  605. ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
  606. if (ptr == runtime->buffer_size)
  607. ptr = 0;
  608. return bytes_to_frames(substream->runtime, ptr);
  609. }
  610. static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
  611. {
  612. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  613. u8 addr;
  614. size_t ptr;
  615. if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
  616. return 0;
  617. if (ice->playback_con_active_buf[substream->number])
  618. addr = ICE1712_DSC_ADDR1;
  619. else
  620. addr = ICE1712_DSC_ADDR0;
  621. ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
  622. ice->playback_con_virt_addr[substream->number];
  623. if (ptr == substream->runtime->buffer_size)
  624. ptr = 0;
  625. return bytes_to_frames(substream->runtime, ptr);
  626. }
  627. static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
  628. {
  629. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  630. size_t ptr;
  631. if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
  632. return 0;
  633. ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
  634. if (ptr == substream->runtime->buffer_size)
  635. ptr = 0;
  636. return bytes_to_frames(substream->runtime, ptr);
  637. }
  638. static const struct snd_pcm_hardware snd_ice1712_playback = {
  639. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  640. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  641. SNDRV_PCM_INFO_MMAP_VALID |
  642. SNDRV_PCM_INFO_PAUSE),
  643. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  644. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  645. .rate_min = 4000,
  646. .rate_max = 48000,
  647. .channels_min = 1,
  648. .channels_max = 2,
  649. .buffer_bytes_max = (64*1024),
  650. .period_bytes_min = 64,
  651. .period_bytes_max = (64*1024),
  652. .periods_min = 1,
  653. .periods_max = 1024,
  654. .fifo_size = 0,
  655. };
  656. static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
  657. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  658. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  659. SNDRV_PCM_INFO_MMAP_VALID |
  660. SNDRV_PCM_INFO_PAUSE),
  661. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  662. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  663. .rate_min = 4000,
  664. .rate_max = 48000,
  665. .channels_min = 1,
  666. .channels_max = 2,
  667. .buffer_bytes_max = (128*1024),
  668. .period_bytes_min = 64,
  669. .period_bytes_max = (128*1024),
  670. .periods_min = 2,
  671. .periods_max = 2,
  672. .fifo_size = 0,
  673. };
  674. static const struct snd_pcm_hardware snd_ice1712_capture = {
  675. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  676. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  677. SNDRV_PCM_INFO_MMAP_VALID),
  678. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  679. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  680. .rate_min = 4000,
  681. .rate_max = 48000,
  682. .channels_min = 1,
  683. .channels_max = 2,
  684. .buffer_bytes_max = (64*1024),
  685. .period_bytes_min = 64,
  686. .period_bytes_max = (64*1024),
  687. .periods_min = 1,
  688. .periods_max = 1024,
  689. .fifo_size = 0,
  690. };
  691. static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
  692. {
  693. struct snd_pcm_runtime *runtime = substream->runtime;
  694. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  695. ice->playback_con_substream = substream;
  696. runtime->hw = snd_ice1712_playback;
  697. return 0;
  698. }
  699. static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
  700. {
  701. struct snd_pcm_runtime *runtime = substream->runtime;
  702. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  703. u32 tmp;
  704. ice->playback_con_substream_ds[substream->number] = substream;
  705. runtime->hw = snd_ice1712_playback_ds;
  706. spin_lock_irq(&ice->reg_lock);
  707. tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
  708. outw(tmp, ICEDS(ice, INTMASK));
  709. spin_unlock_irq(&ice->reg_lock);
  710. return 0;
  711. }
  712. static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
  713. {
  714. struct snd_pcm_runtime *runtime = substream->runtime;
  715. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  716. ice->capture_con_substream = substream;
  717. runtime->hw = snd_ice1712_capture;
  718. runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
  719. if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
  720. runtime->hw.rate_min = 48000;
  721. return 0;
  722. }
  723. static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
  724. {
  725. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  726. ice->playback_con_substream = NULL;
  727. return 0;
  728. }
  729. static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
  730. {
  731. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  732. u32 tmp;
  733. spin_lock_irq(&ice->reg_lock);
  734. tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
  735. outw(tmp, ICEDS(ice, INTMASK));
  736. spin_unlock_irq(&ice->reg_lock);
  737. ice->playback_con_substream_ds[substream->number] = NULL;
  738. return 0;
  739. }
  740. static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
  741. {
  742. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  743. ice->capture_con_substream = NULL;
  744. return 0;
  745. }
  746. static struct snd_pcm_ops snd_ice1712_playback_ops = {
  747. .open = snd_ice1712_playback_open,
  748. .close = snd_ice1712_playback_close,
  749. .ioctl = snd_pcm_lib_ioctl,
  750. .hw_params = snd_ice1712_hw_params,
  751. .hw_free = snd_ice1712_hw_free,
  752. .prepare = snd_ice1712_playback_prepare,
  753. .trigger = snd_ice1712_playback_trigger,
  754. .pointer = snd_ice1712_playback_pointer,
  755. };
  756. static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
  757. .open = snd_ice1712_playback_ds_open,
  758. .close = snd_ice1712_playback_ds_close,
  759. .ioctl = snd_pcm_lib_ioctl,
  760. .hw_params = snd_ice1712_hw_params,
  761. .hw_free = snd_ice1712_hw_free,
  762. .prepare = snd_ice1712_playback_ds_prepare,
  763. .trigger = snd_ice1712_playback_ds_trigger,
  764. .pointer = snd_ice1712_playback_ds_pointer,
  765. };
  766. static struct snd_pcm_ops snd_ice1712_capture_ops = {
  767. .open = snd_ice1712_capture_open,
  768. .close = snd_ice1712_capture_close,
  769. .ioctl = snd_pcm_lib_ioctl,
  770. .hw_params = snd_ice1712_hw_params,
  771. .hw_free = snd_ice1712_hw_free,
  772. .prepare = snd_ice1712_capture_prepare,
  773. .trigger = snd_ice1712_capture_trigger,
  774. .pointer = snd_ice1712_capture_pointer,
  775. };
  776. static int __devinit snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  777. {
  778. struct snd_pcm *pcm;
  779. int err;
  780. if (rpcm)
  781. *rpcm = NULL;
  782. err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
  783. if (err < 0)
  784. return err;
  785. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
  786. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
  787. pcm->private_data = ice;
  788. pcm->info_flags = 0;
  789. strcpy(pcm->name, "ICE1712 consumer");
  790. ice->pcm = pcm;
  791. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  792. snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
  793. if (rpcm)
  794. *rpcm = pcm;
  795. printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
  796. return 0;
  797. }
  798. static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  799. {
  800. struct snd_pcm *pcm;
  801. int err;
  802. if (rpcm)
  803. *rpcm = NULL;
  804. err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
  805. if (err < 0)
  806. return err;
  807. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
  808. pcm->private_data = ice;
  809. pcm->info_flags = 0;
  810. strcpy(pcm->name, "ICE1712 consumer (DS)");
  811. ice->pcm_ds = pcm;
  812. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  813. snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
  814. if (rpcm)
  815. *rpcm = pcm;
  816. return 0;
  817. }
  818. /*
  819. * PCM code - professional part (multitrack)
  820. */
  821. static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  822. 32000, 44100, 48000, 64000, 88200, 96000 };
  823. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  824. .count = ARRAY_SIZE(rates),
  825. .list = rates,
  826. .mask = 0,
  827. };
  828. static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
  829. int cmd)
  830. {
  831. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  832. switch (cmd) {
  833. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  834. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  835. {
  836. unsigned int what;
  837. unsigned int old;
  838. if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
  839. return -EINVAL;
  840. what = ICE1712_PLAYBACK_PAUSE;
  841. snd_pcm_trigger_done(substream, substream);
  842. spin_lock(&ice->reg_lock);
  843. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  844. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  845. old |= what;
  846. else
  847. old &= ~what;
  848. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  849. spin_unlock(&ice->reg_lock);
  850. break;
  851. }
  852. case SNDRV_PCM_TRIGGER_START:
  853. case SNDRV_PCM_TRIGGER_STOP:
  854. {
  855. unsigned int what = 0;
  856. unsigned int old;
  857. struct snd_pcm_substream *s;
  858. snd_pcm_group_for_each_entry(s, substream) {
  859. if (s == ice->playback_pro_substream) {
  860. what |= ICE1712_PLAYBACK_START;
  861. snd_pcm_trigger_done(s, substream);
  862. } else if (s == ice->capture_pro_substream) {
  863. what |= ICE1712_CAPTURE_START_SHADOW;
  864. snd_pcm_trigger_done(s, substream);
  865. }
  866. }
  867. spin_lock(&ice->reg_lock);
  868. old = inl(ICEMT(ice, PLAYBACK_CONTROL));
  869. if (cmd == SNDRV_PCM_TRIGGER_START)
  870. old |= what;
  871. else
  872. old &= ~what;
  873. outl(old, ICEMT(ice, PLAYBACK_CONTROL));
  874. spin_unlock(&ice->reg_lock);
  875. break;
  876. }
  877. default:
  878. return -EINVAL;
  879. }
  880. return 0;
  881. }
  882. /*
  883. */
  884. static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
  885. {
  886. unsigned long flags;
  887. unsigned char val, old;
  888. unsigned int i;
  889. switch (rate) {
  890. case 8000: val = 6; break;
  891. case 9600: val = 3; break;
  892. case 11025: val = 10; break;
  893. case 12000: val = 2; break;
  894. case 16000: val = 5; break;
  895. case 22050: val = 9; break;
  896. case 24000: val = 1; break;
  897. case 32000: val = 4; break;
  898. case 44100: val = 8; break;
  899. case 48000: val = 0; break;
  900. case 64000: val = 15; break;
  901. case 88200: val = 11; break;
  902. case 96000: val = 7; break;
  903. default:
  904. snd_BUG();
  905. val = 0;
  906. rate = 48000;
  907. break;
  908. }
  909. spin_lock_irqsave(&ice->reg_lock, flags);
  910. if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
  911. ICE1712_PLAYBACK_PAUSE|
  912. ICE1712_PLAYBACK_START)) {
  913. __out:
  914. spin_unlock_irqrestore(&ice->reg_lock, flags);
  915. return;
  916. }
  917. if (!force && is_pro_rate_locked(ice))
  918. goto __out;
  919. old = inb(ICEMT(ice, RATE));
  920. if (!force && old == val)
  921. goto __out;
  922. outb(val, ICEMT(ice, RATE));
  923. spin_unlock_irqrestore(&ice->reg_lock, flags);
  924. if (ice->gpio.set_pro_rate)
  925. ice->gpio.set_pro_rate(ice, rate);
  926. for (i = 0; i < ice->akm_codecs; i++) {
  927. if (ice->akm[i].ops.set_rate_val)
  928. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  929. }
  930. if (ice->spdif.ops.setup_rate)
  931. ice->spdif.ops.setup_rate(ice, rate);
  932. }
  933. static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
  934. {
  935. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  936. ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
  937. spin_lock_irq(&ice->reg_lock);
  938. outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
  939. outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
  940. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
  941. spin_unlock_irq(&ice->reg_lock);
  942. return 0;
  943. }
  944. static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
  945. struct snd_pcm_hw_params *hw_params)
  946. {
  947. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  948. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  949. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  950. }
  951. static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
  952. {
  953. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  954. ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
  955. spin_lock_irq(&ice->reg_lock);
  956. outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
  957. outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
  958. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
  959. spin_unlock_irq(&ice->reg_lock);
  960. return 0;
  961. }
  962. static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
  963. struct snd_pcm_hw_params *hw_params)
  964. {
  965. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  966. snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
  967. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  968. }
  969. static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
  970. {
  971. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  972. size_t ptr;
  973. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
  974. return 0;
  975. ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
  976. if (ptr == substream->runtime->buffer_size)
  977. ptr = 0;
  978. return bytes_to_frames(substream->runtime, ptr);
  979. }
  980. static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
  981. {
  982. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  983. size_t ptr;
  984. if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
  985. return 0;
  986. ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
  987. if (ptr == substream->runtime->buffer_size)
  988. ptr = 0;
  989. return bytes_to_frames(substream->runtime, ptr);
  990. }
  991. static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
  992. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  993. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  994. SNDRV_PCM_INFO_MMAP_VALID |
  995. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  996. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  997. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  998. .rate_min = 4000,
  999. .rate_max = 96000,
  1000. .channels_min = 10,
  1001. .channels_max = 10,
  1002. .buffer_bytes_max = (256*1024),
  1003. .period_bytes_min = 10 * 4 * 2,
  1004. .period_bytes_max = 131040,
  1005. .periods_min = 1,
  1006. .periods_max = 1024,
  1007. .fifo_size = 0,
  1008. };
  1009. static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
  1010. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  1011. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  1012. SNDRV_PCM_INFO_MMAP_VALID |
  1013. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  1014. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  1015. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
  1016. .rate_min = 4000,
  1017. .rate_max = 96000,
  1018. .channels_min = 12,
  1019. .channels_max = 12,
  1020. .buffer_bytes_max = (256*1024),
  1021. .period_bytes_min = 12 * 4 * 2,
  1022. .period_bytes_max = 131040,
  1023. .periods_min = 1,
  1024. .periods_max = 1024,
  1025. .fifo_size = 0,
  1026. };
  1027. static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
  1028. {
  1029. struct snd_pcm_runtime *runtime = substream->runtime;
  1030. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1031. ice->playback_pro_substream = substream;
  1032. runtime->hw = snd_ice1712_playback_pro;
  1033. snd_pcm_set_sync(substream);
  1034. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1035. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1036. if (ice->spdif.ops.open)
  1037. ice->spdif.ops.open(ice, substream);
  1038. return 0;
  1039. }
  1040. static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
  1041. {
  1042. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1043. struct snd_pcm_runtime *runtime = substream->runtime;
  1044. ice->capture_pro_substream = substream;
  1045. runtime->hw = snd_ice1712_capture_pro;
  1046. snd_pcm_set_sync(substream);
  1047. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1048. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
  1049. return 0;
  1050. }
  1051. static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
  1052. {
  1053. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1054. if (PRO_RATE_RESET)
  1055. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1056. ice->playback_pro_substream = NULL;
  1057. if (ice->spdif.ops.close)
  1058. ice->spdif.ops.close(ice, substream);
  1059. return 0;
  1060. }
  1061. static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
  1062. {
  1063. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1064. if (PRO_RATE_RESET)
  1065. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
  1066. ice->capture_pro_substream = NULL;
  1067. return 0;
  1068. }
  1069. static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
  1070. .open = snd_ice1712_playback_pro_open,
  1071. .close = snd_ice1712_playback_pro_close,
  1072. .ioctl = snd_pcm_lib_ioctl,
  1073. .hw_params = snd_ice1712_playback_pro_hw_params,
  1074. .hw_free = snd_ice1712_hw_free,
  1075. .prepare = snd_ice1712_playback_pro_prepare,
  1076. .trigger = snd_ice1712_pro_trigger,
  1077. .pointer = snd_ice1712_playback_pro_pointer,
  1078. };
  1079. static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
  1080. .open = snd_ice1712_capture_pro_open,
  1081. .close = snd_ice1712_capture_pro_close,
  1082. .ioctl = snd_pcm_lib_ioctl,
  1083. .hw_params = snd_ice1712_capture_pro_hw_params,
  1084. .hw_free = snd_ice1712_hw_free,
  1085. .prepare = snd_ice1712_capture_pro_prepare,
  1086. .trigger = snd_ice1712_pro_trigger,
  1087. .pointer = snd_ice1712_capture_pro_pointer,
  1088. };
  1089. static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
  1090. {
  1091. struct snd_pcm *pcm;
  1092. int err;
  1093. if (rpcm)
  1094. *rpcm = NULL;
  1095. err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
  1096. if (err < 0)
  1097. return err;
  1098. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
  1099. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
  1100. pcm->private_data = ice;
  1101. pcm->info_flags = 0;
  1102. strcpy(pcm->name, "ICE1712 multi");
  1103. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1104. snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
  1105. ice->pcm_pro = pcm;
  1106. if (rpcm)
  1107. *rpcm = pcm;
  1108. if (ice->cs8427) {
  1109. /* assign channels to iec958 */
  1110. err = snd_cs8427_iec958_build(ice->cs8427,
  1111. pcm->streams[0].substream,
  1112. pcm->streams[1].substream);
  1113. if (err < 0)
  1114. return err;
  1115. }
  1116. err = snd_ice1712_build_pro_mixer(ice);
  1117. if (err < 0)
  1118. return err;
  1119. return 0;
  1120. }
  1121. /*
  1122. * Mixer section
  1123. */
  1124. static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
  1125. {
  1126. unsigned int vol = ice->pro_volumes[index];
  1127. unsigned short val = 0;
  1128. val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
  1129. val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
  1130. outb(index, ICEMT(ice, MONITOR_INDEX));
  1131. outw(val, ICEMT(ice, MONITOR_VOLUME));
  1132. }
  1133. #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
  1134. static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1137. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1138. kcontrol->private_value;
  1139. spin_lock_irq(&ice->reg_lock);
  1140. ucontrol->value.integer.value[0] =
  1141. !((ice->pro_volumes[priv_idx] >> 15) & 1);
  1142. ucontrol->value.integer.value[1] =
  1143. !((ice->pro_volumes[priv_idx] >> 31) & 1);
  1144. spin_unlock_irq(&ice->reg_lock);
  1145. return 0;
  1146. }
  1147. static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1148. {
  1149. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1150. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1151. kcontrol->private_value;
  1152. unsigned int nval, change;
  1153. nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
  1154. (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
  1155. spin_lock_irq(&ice->reg_lock);
  1156. nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
  1157. change = nval != ice->pro_volumes[priv_idx];
  1158. ice->pro_volumes[priv_idx] = nval;
  1159. snd_ice1712_update_volume(ice, priv_idx);
  1160. spin_unlock_irq(&ice->reg_lock);
  1161. return change;
  1162. }
  1163. static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1164. {
  1165. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1166. uinfo->count = 2;
  1167. uinfo->value.integer.min = 0;
  1168. uinfo->value.integer.max = 96;
  1169. return 0;
  1170. }
  1171. static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1172. {
  1173. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1174. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1175. kcontrol->private_value;
  1176. spin_lock_irq(&ice->reg_lock);
  1177. ucontrol->value.integer.value[0] =
  1178. (ice->pro_volumes[priv_idx] >> 0) & 127;
  1179. ucontrol->value.integer.value[1] =
  1180. (ice->pro_volumes[priv_idx] >> 16) & 127;
  1181. spin_unlock_irq(&ice->reg_lock);
  1182. return 0;
  1183. }
  1184. static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1185. {
  1186. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1187. int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
  1188. kcontrol->private_value;
  1189. unsigned int nval, change;
  1190. nval = (ucontrol->value.integer.value[0] & 127) |
  1191. ((ucontrol->value.integer.value[1] & 127) << 16);
  1192. spin_lock_irq(&ice->reg_lock);
  1193. nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
  1194. change = nval != ice->pro_volumes[priv_idx];
  1195. ice->pro_volumes[priv_idx] = nval;
  1196. snd_ice1712_update_volume(ice, priv_idx);
  1197. spin_unlock_irq(&ice->reg_lock);
  1198. return change;
  1199. }
  1200. static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
  1201. static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
  1202. {
  1203. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1204. .name = "Multi Playback Switch",
  1205. .info = snd_ice1712_pro_mixer_switch_info,
  1206. .get = snd_ice1712_pro_mixer_switch_get,
  1207. .put = snd_ice1712_pro_mixer_switch_put,
  1208. .private_value = 0,
  1209. .count = 10,
  1210. },
  1211. {
  1212. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1213. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1214. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1215. .name = "Multi Playback Volume",
  1216. .info = snd_ice1712_pro_mixer_volume_info,
  1217. .get = snd_ice1712_pro_mixer_volume_get,
  1218. .put = snd_ice1712_pro_mixer_volume_put,
  1219. .private_value = 0,
  1220. .count = 10,
  1221. .tlv = { .p = db_scale_playback }
  1222. },
  1223. };
  1224. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
  1225. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1226. .name = "H/W Multi Capture Switch",
  1227. .info = snd_ice1712_pro_mixer_switch_info,
  1228. .get = snd_ice1712_pro_mixer_switch_get,
  1229. .put = snd_ice1712_pro_mixer_switch_put,
  1230. .private_value = 10,
  1231. };
  1232. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
  1233. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1234. .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
  1235. .info = snd_ice1712_pro_mixer_switch_info,
  1236. .get = snd_ice1712_pro_mixer_switch_get,
  1237. .put = snd_ice1712_pro_mixer_switch_put,
  1238. .private_value = 18,
  1239. .count = 2,
  1240. };
  1241. static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
  1242. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1243. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1244. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1245. .name = "H/W Multi Capture Volume",
  1246. .info = snd_ice1712_pro_mixer_volume_info,
  1247. .get = snd_ice1712_pro_mixer_volume_get,
  1248. .put = snd_ice1712_pro_mixer_volume_put,
  1249. .private_value = 10,
  1250. .tlv = { .p = db_scale_playback }
  1251. };
  1252. static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
  1253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1254. .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
  1255. .info = snd_ice1712_pro_mixer_volume_info,
  1256. .get = snd_ice1712_pro_mixer_volume_get,
  1257. .put = snd_ice1712_pro_mixer_volume_put,
  1258. .private_value = 18,
  1259. .count = 2,
  1260. };
  1261. static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
  1262. {
  1263. struct snd_card *card = ice->card;
  1264. unsigned int idx;
  1265. int err;
  1266. /* multi-channel mixer */
  1267. for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
  1268. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
  1269. if (err < 0)
  1270. return err;
  1271. }
  1272. if (ice->num_total_adcs > 0) {
  1273. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
  1274. tmp.count = ice->num_total_adcs;
  1275. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1276. if (err < 0)
  1277. return err;
  1278. }
  1279. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
  1280. if (err < 0)
  1281. return err;
  1282. if (ice->num_total_adcs > 0) {
  1283. struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
  1284. tmp.count = ice->num_total_adcs;
  1285. err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
  1286. if (err < 0)
  1287. return err;
  1288. }
  1289. err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
  1290. if (err < 0)
  1291. return err;
  1292. /* initialize volumes */
  1293. for (idx = 0; idx < 10; idx++) {
  1294. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1295. snd_ice1712_update_volume(ice, idx);
  1296. }
  1297. for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
  1298. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1299. snd_ice1712_update_volume(ice, idx);
  1300. }
  1301. for (idx = 18; idx < 20; idx++) {
  1302. ice->pro_volumes[idx] = 0x80008000; /* mute */
  1303. snd_ice1712_update_volume(ice, idx);
  1304. }
  1305. return 0;
  1306. }
  1307. static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
  1308. {
  1309. struct snd_ice1712 *ice = ac97->private_data;
  1310. ice->ac97 = NULL;
  1311. }
  1312. static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
  1313. {
  1314. int err, bus_num = 0;
  1315. struct snd_ac97_template ac97;
  1316. struct snd_ac97_bus *pbus;
  1317. static struct snd_ac97_bus_ops con_ops = {
  1318. .write = snd_ice1712_ac97_write,
  1319. .read = snd_ice1712_ac97_read,
  1320. };
  1321. static struct snd_ac97_bus_ops pro_ops = {
  1322. .write = snd_ice1712_pro_ac97_write,
  1323. .read = snd_ice1712_pro_ac97_read,
  1324. };
  1325. if (ice_has_con_ac97(ice)) {
  1326. err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
  1327. if (err < 0)
  1328. return err;
  1329. memset(&ac97, 0, sizeof(ac97));
  1330. ac97.private_data = ice;
  1331. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1332. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1333. if (err < 0)
  1334. printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
  1335. else {
  1336. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
  1337. if (err < 0)
  1338. return err;
  1339. return 0;
  1340. }
  1341. }
  1342. if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
  1343. err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
  1344. if (err < 0)
  1345. return err;
  1346. memset(&ac97, 0, sizeof(ac97));
  1347. ac97.private_data = ice;
  1348. ac97.private_free = snd_ice1712_mixer_free_ac97;
  1349. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1350. if (err < 0)
  1351. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1352. else
  1353. return 0;
  1354. }
  1355. /* I2S mixer only */
  1356. strcat(ice->card->mixername, "ICE1712 - multitrack");
  1357. return 0;
  1358. }
  1359. /*
  1360. *
  1361. */
  1362. static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
  1363. {
  1364. return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
  1365. }
  1366. static void snd_ice1712_proc_read(struct snd_info_entry *entry,
  1367. struct snd_info_buffer *buffer)
  1368. {
  1369. struct snd_ice1712 *ice = entry->private_data;
  1370. unsigned int idx;
  1371. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1372. snd_iprintf(buffer, "EEPROM:\n");
  1373. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1374. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1375. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1376. snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
  1377. snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
  1378. snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
  1379. snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
  1380. snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
  1381. snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
  1382. snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
  1383. snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
  1384. snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
  1385. snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
  1386. snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
  1387. for (idx = 0; idx < 4; idx++)
  1388. snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
  1389. for (idx = 0; idx < 4; idx++)
  1390. snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
  1391. for (idx = 0x1c; idx < ice->eeprom.size; idx++)
  1392. snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
  1393. snd_iprintf(buffer, "\nRegisters:\n");
  1394. snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
  1395. snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
  1396. snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
  1397. snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
  1398. snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
  1399. snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
  1400. snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
  1401. }
  1402. static void __devinit snd_ice1712_proc_init(struct snd_ice1712 *ice)
  1403. {
  1404. struct snd_info_entry *entry;
  1405. if (!snd_card_proc_new(ice->card, "ice1712", &entry))
  1406. snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
  1407. }
  1408. /*
  1409. *
  1410. */
  1411. static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
  1412. struct snd_ctl_elem_info *uinfo)
  1413. {
  1414. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1415. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1416. return 0;
  1417. }
  1418. static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1422. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1423. return 0;
  1424. }
  1425. static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
  1426. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1427. .name = "ICE1712 EEPROM",
  1428. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1429. .info = snd_ice1712_eeprom_info,
  1430. .get = snd_ice1712_eeprom_get
  1431. };
  1432. /*
  1433. */
  1434. static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_info *uinfo)
  1436. {
  1437. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1438. uinfo->count = 1;
  1439. return 0;
  1440. }
  1441. static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
  1442. struct snd_ctl_elem_value *ucontrol)
  1443. {
  1444. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1445. if (ice->spdif.ops.default_get)
  1446. ice->spdif.ops.default_get(ice, ucontrol);
  1447. return 0;
  1448. }
  1449. static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
  1450. struct snd_ctl_elem_value *ucontrol)
  1451. {
  1452. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1453. if (ice->spdif.ops.default_put)
  1454. return ice->spdif.ops.default_put(ice, ucontrol);
  1455. return 0;
  1456. }
  1457. static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
  1458. {
  1459. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1460. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1461. .info = snd_ice1712_spdif_info,
  1462. .get = snd_ice1712_spdif_default_get,
  1463. .put = snd_ice1712_spdif_default_put
  1464. };
  1465. static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1466. struct snd_ctl_elem_value *ucontrol)
  1467. {
  1468. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1469. if (ice->spdif.ops.default_get) {
  1470. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1471. IEC958_AES0_PROFESSIONAL |
  1472. IEC958_AES0_CON_NOT_COPYRIGHT |
  1473. IEC958_AES0_CON_EMPHASIS;
  1474. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1475. IEC958_AES1_CON_CATEGORY;
  1476. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1477. } else {
  1478. ucontrol->value.iec958.status[0] = 0xff;
  1479. ucontrol->value.iec958.status[1] = 0xff;
  1480. ucontrol->value.iec958.status[2] = 0xff;
  1481. ucontrol->value.iec958.status[3] = 0xff;
  1482. ucontrol->value.iec958.status[4] = 0xff;
  1483. }
  1484. return 0;
  1485. }
  1486. static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1487. struct snd_ctl_elem_value *ucontrol)
  1488. {
  1489. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1490. if (ice->spdif.ops.default_get) {
  1491. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1492. IEC958_AES0_PROFESSIONAL |
  1493. IEC958_AES0_PRO_FS |
  1494. IEC958_AES0_PRO_EMPHASIS;
  1495. ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
  1496. } else {
  1497. ucontrol->value.iec958.status[0] = 0xff;
  1498. ucontrol->value.iec958.status[1] = 0xff;
  1499. ucontrol->value.iec958.status[2] = 0xff;
  1500. ucontrol->value.iec958.status[3] = 0xff;
  1501. ucontrol->value.iec958.status[4] = 0xff;
  1502. }
  1503. return 0;
  1504. }
  1505. static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
  1506. {
  1507. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1508. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1509. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1510. .info = snd_ice1712_spdif_info,
  1511. .get = snd_ice1712_spdif_maskc_get,
  1512. };
  1513. static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
  1514. {
  1515. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1516. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1517. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1518. .info = snd_ice1712_spdif_info,
  1519. .get = snd_ice1712_spdif_maskp_get,
  1520. };
  1521. static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1522. struct snd_ctl_elem_value *ucontrol)
  1523. {
  1524. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1525. if (ice->spdif.ops.stream_get)
  1526. ice->spdif.ops.stream_get(ice, ucontrol);
  1527. return 0;
  1528. }
  1529. static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1533. if (ice->spdif.ops.stream_put)
  1534. return ice->spdif.ops.stream_put(ice, ucontrol);
  1535. return 0;
  1536. }
  1537. static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
  1538. {
  1539. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1540. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  1541. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1542. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
  1543. .info = snd_ice1712_spdif_info,
  1544. .get = snd_ice1712_spdif_stream_get,
  1545. .put = snd_ice1712_spdif_stream_put
  1546. };
  1547. int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
  1548. struct snd_ctl_elem_value *ucontrol)
  1549. {
  1550. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1551. unsigned char mask = kcontrol->private_value & 0xff;
  1552. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1553. snd_ice1712_save_gpio_status(ice);
  1554. ucontrol->value.integer.value[0] =
  1555. (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
  1556. snd_ice1712_restore_gpio_status(ice);
  1557. return 0;
  1558. }
  1559. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1560. struct snd_ctl_elem_value *ucontrol)
  1561. {
  1562. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1563. unsigned char mask = kcontrol->private_value & 0xff;
  1564. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1565. unsigned int val, nval;
  1566. if (kcontrol->private_value & (1 << 31))
  1567. return -EPERM;
  1568. nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
  1569. snd_ice1712_save_gpio_status(ice);
  1570. val = snd_ice1712_gpio_read(ice);
  1571. nval |= val & ~mask;
  1572. if (val != nval)
  1573. snd_ice1712_gpio_write(ice, nval);
  1574. snd_ice1712_restore_gpio_status(ice);
  1575. return val != nval;
  1576. }
  1577. /*
  1578. * rate
  1579. */
  1580. static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1581. struct snd_ctl_elem_info *uinfo)
  1582. {
  1583. static const char * const texts[] = {
  1584. "8000", /* 0: 6 */
  1585. "9600", /* 1: 3 */
  1586. "11025", /* 2: 10 */
  1587. "12000", /* 3: 2 */
  1588. "16000", /* 4: 5 */
  1589. "22050", /* 5: 9 */
  1590. "24000", /* 6: 1 */
  1591. "32000", /* 7: 4 */
  1592. "44100", /* 8: 8 */
  1593. "48000", /* 9: 0 */
  1594. "64000", /* 10: 15 */
  1595. "88200", /* 11: 11 */
  1596. "96000", /* 12: 7 */
  1597. "IEC958 Input", /* 13: -- */
  1598. };
  1599. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1600. uinfo->count = 1;
  1601. uinfo->value.enumerated.items = 14;
  1602. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1603. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1604. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1605. return 0;
  1606. }
  1607. static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1608. struct snd_ctl_elem_value *ucontrol)
  1609. {
  1610. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1611. static const unsigned char xlate[16] = {
  1612. 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
  1613. };
  1614. unsigned char val;
  1615. spin_lock_irq(&ice->reg_lock);
  1616. if (is_spdif_master(ice)) {
  1617. ucontrol->value.enumerated.item[0] = 13;
  1618. } else {
  1619. val = xlate[inb(ICEMT(ice, RATE)) & 15];
  1620. if (val == 255) {
  1621. snd_BUG();
  1622. val = 0;
  1623. }
  1624. ucontrol->value.enumerated.item[0] = val;
  1625. }
  1626. spin_unlock_irq(&ice->reg_lock);
  1627. return 0;
  1628. }
  1629. static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1630. struct snd_ctl_elem_value *ucontrol)
  1631. {
  1632. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1633. static const unsigned int xrate[13] = {
  1634. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1635. 32000, 44100, 48000, 64000, 88200, 96000
  1636. };
  1637. unsigned char oval;
  1638. int change = 0;
  1639. spin_lock_irq(&ice->reg_lock);
  1640. oval = inb(ICEMT(ice, RATE));
  1641. if (ucontrol->value.enumerated.item[0] == 13) {
  1642. outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
  1643. } else {
  1644. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1645. spin_unlock_irq(&ice->reg_lock);
  1646. snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
  1647. spin_lock_irq(&ice->reg_lock);
  1648. }
  1649. change = inb(ICEMT(ice, RATE)) != oval;
  1650. spin_unlock_irq(&ice->reg_lock);
  1651. if ((oval & ICE1712_SPDIF_MASTER) !=
  1652. (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
  1653. snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
  1654. return change;
  1655. }
  1656. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
  1657. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1658. .name = "Multi Track Internal Clock",
  1659. .info = snd_ice1712_pro_internal_clock_info,
  1660. .get = snd_ice1712_pro_internal_clock_get,
  1661. .put = snd_ice1712_pro_internal_clock_put
  1662. };
  1663. static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_info *uinfo)
  1665. {
  1666. static const char * const texts[] = {
  1667. "8000", /* 0: 6 */
  1668. "9600", /* 1: 3 */
  1669. "11025", /* 2: 10 */
  1670. "12000", /* 3: 2 */
  1671. "16000", /* 4: 5 */
  1672. "22050", /* 5: 9 */
  1673. "24000", /* 6: 1 */
  1674. "32000", /* 7: 4 */
  1675. "44100", /* 8: 8 */
  1676. "48000", /* 9: 0 */
  1677. "64000", /* 10: 15 */
  1678. "88200", /* 11: 11 */
  1679. "96000", /* 12: 7 */
  1680. /* "IEC958 Input", 13: -- */
  1681. };
  1682. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1683. uinfo->count = 1;
  1684. uinfo->value.enumerated.items = 13;
  1685. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1686. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1687. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1688. return 0;
  1689. }
  1690. static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
  1691. struct snd_ctl_elem_value *ucontrol)
  1692. {
  1693. int val;
  1694. static const unsigned int xrate[13] = {
  1695. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1696. 32000, 44100, 48000, 64000, 88200, 96000
  1697. };
  1698. for (val = 0; val < 13; val++) {
  1699. if (xrate[val] == PRO_RATE_DEFAULT)
  1700. break;
  1701. }
  1702. ucontrol->value.enumerated.item[0] = val;
  1703. return 0;
  1704. }
  1705. static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
  1706. struct snd_ctl_elem_value *ucontrol)
  1707. {
  1708. static const unsigned int xrate[13] = {
  1709. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  1710. 32000, 44100, 48000, 64000, 88200, 96000
  1711. };
  1712. unsigned char oval;
  1713. int change = 0;
  1714. oval = PRO_RATE_DEFAULT;
  1715. PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
  1716. change = PRO_RATE_DEFAULT != oval;
  1717. return change;
  1718. }
  1719. static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
  1720. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1721. .name = "Multi Track Internal Clock Default",
  1722. .info = snd_ice1712_pro_internal_clock_default_info,
  1723. .get = snd_ice1712_pro_internal_clock_default_get,
  1724. .put = snd_ice1712_pro_internal_clock_default_put
  1725. };
  1726. #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
  1727. static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1728. struct snd_ctl_elem_value *ucontrol)
  1729. {
  1730. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1731. return 0;
  1732. }
  1733. static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1734. struct snd_ctl_elem_value *ucontrol)
  1735. {
  1736. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1737. int change = 0, nval;
  1738. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1739. spin_lock_irq(&ice->reg_lock);
  1740. change = PRO_RATE_LOCKED != nval;
  1741. PRO_RATE_LOCKED = nval;
  1742. spin_unlock_irq(&ice->reg_lock);
  1743. return change;
  1744. }
  1745. static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
  1746. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1747. .name = "Multi Track Rate Locking",
  1748. .info = snd_ice1712_pro_rate_locking_info,
  1749. .get = snd_ice1712_pro_rate_locking_get,
  1750. .put = snd_ice1712_pro_rate_locking_put
  1751. };
  1752. #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
  1753. static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1754. struct snd_ctl_elem_value *ucontrol)
  1755. {
  1756. ucontrol->value.integer.value[0] = PRO_RATE_RESET;
  1757. return 0;
  1758. }
  1759. static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1760. struct snd_ctl_elem_value *ucontrol)
  1761. {
  1762. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1763. int change = 0, nval;
  1764. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1765. spin_lock_irq(&ice->reg_lock);
  1766. change = PRO_RATE_RESET != nval;
  1767. PRO_RATE_RESET = nval;
  1768. spin_unlock_irq(&ice->reg_lock);
  1769. return change;
  1770. }
  1771. static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
  1772. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1773. .name = "Multi Track Rate Reset",
  1774. .info = snd_ice1712_pro_rate_reset_info,
  1775. .get = snd_ice1712_pro_rate_reset_get,
  1776. .put = snd_ice1712_pro_rate_reset_put
  1777. };
  1778. /*
  1779. * routing
  1780. */
  1781. static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
  1782. struct snd_ctl_elem_info *uinfo)
  1783. {
  1784. static const char * const texts[] = {
  1785. "PCM Out", /* 0 */
  1786. "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
  1787. "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
  1788. "IEC958 In L", "IEC958 In R", /* 9-10 */
  1789. "Digital Mixer", /* 11 - optional */
  1790. };
  1791. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1792. uinfo->count = 1;
  1793. uinfo->value.enumerated.items =
  1794. snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
  1795. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1796. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1797. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1798. return 0;
  1799. }
  1800. static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1801. struct snd_ctl_elem_value *ucontrol)
  1802. {
  1803. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1804. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1805. unsigned int val, cval;
  1806. spin_lock_irq(&ice->reg_lock);
  1807. val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1808. cval = inl(ICEMT(ice, ROUTE_CAPTURE));
  1809. spin_unlock_irq(&ice->reg_lock);
  1810. val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
  1811. val &= 3;
  1812. cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
  1813. if (val == 1 && idx < 2)
  1814. ucontrol->value.enumerated.item[0] = 11;
  1815. else if (val == 2)
  1816. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1817. else if (val == 3)
  1818. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1819. else
  1820. ucontrol->value.enumerated.item[0] = 0;
  1821. return 0;
  1822. }
  1823. static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1824. struct snd_ctl_elem_value *ucontrol)
  1825. {
  1826. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1827. int change, shift;
  1828. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1829. unsigned int val, old_val, nval;
  1830. /* update PSDOUT */
  1831. if (ucontrol->value.enumerated.item[0] >= 11)
  1832. nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
  1833. else if (ucontrol->value.enumerated.item[0] >= 9)
  1834. nval = 3; /* spdif in */
  1835. else if (ucontrol->value.enumerated.item[0] >= 1)
  1836. nval = 2; /* analog in */
  1837. else
  1838. nval = 0; /* pcm */
  1839. shift = ((idx % 2) * 8) + ((idx / 2) * 2);
  1840. spin_lock_irq(&ice->reg_lock);
  1841. val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
  1842. val &= ~(0x03 << shift);
  1843. val |= nval << shift;
  1844. change = val != old_val;
  1845. if (change)
  1846. outw(val, ICEMT(ice, ROUTE_PSDOUT03));
  1847. spin_unlock_irq(&ice->reg_lock);
  1848. if (nval < 2) /* dig mixer of pcm */
  1849. return change;
  1850. /* update CAPTURE */
  1851. spin_lock_irq(&ice->reg_lock);
  1852. val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
  1853. shift = ((idx / 2) * 8) + ((idx % 2) * 4);
  1854. if (nval == 2) { /* analog in */
  1855. nval = ucontrol->value.enumerated.item[0] - 1;
  1856. val &= ~(0x07 << shift);
  1857. val |= nval << shift;
  1858. } else { /* spdif in */
  1859. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1860. val &= ~(0x08 << shift);
  1861. val |= nval << shift;
  1862. }
  1863. if (val != old_val) {
  1864. change = 1;
  1865. outl(val, ICEMT(ice, ROUTE_CAPTURE));
  1866. }
  1867. spin_unlock_irq(&ice->reg_lock);
  1868. return change;
  1869. }
  1870. static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1871. struct snd_ctl_elem_value *ucontrol)
  1872. {
  1873. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1874. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1875. unsigned int val, cval;
  1876. val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1877. cval = (val >> (idx * 4 + 8)) & 0x0f;
  1878. val = (val >> (idx * 2)) & 0x03;
  1879. if (val == 1)
  1880. ucontrol->value.enumerated.item[0] = 11;
  1881. else if (val == 2)
  1882. ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
  1883. else if (val == 3)
  1884. ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
  1885. else
  1886. ucontrol->value.enumerated.item[0] = 0;
  1887. return 0;
  1888. }
  1889. static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1890. struct snd_ctl_elem_value *ucontrol)
  1891. {
  1892. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1893. int change, shift;
  1894. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1895. unsigned int val, old_val, nval;
  1896. /* update SPDOUT */
  1897. spin_lock_irq(&ice->reg_lock);
  1898. val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
  1899. if (ucontrol->value.enumerated.item[0] >= 11)
  1900. nval = 1;
  1901. else if (ucontrol->value.enumerated.item[0] >= 9)
  1902. nval = 3;
  1903. else if (ucontrol->value.enumerated.item[0] >= 1)
  1904. nval = 2;
  1905. else
  1906. nval = 0;
  1907. shift = idx * 2;
  1908. val &= ~(0x03 << shift);
  1909. val |= nval << shift;
  1910. shift = idx * 4 + 8;
  1911. if (nval == 2) {
  1912. nval = ucontrol->value.enumerated.item[0] - 1;
  1913. val &= ~(0x07 << shift);
  1914. val |= nval << shift;
  1915. } else if (nval == 3) {
  1916. nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
  1917. val &= ~(0x08 << shift);
  1918. val |= nval << shift;
  1919. }
  1920. change = val != old_val;
  1921. if (change)
  1922. outw(val, ICEMT(ice, ROUTE_SPDOUT));
  1923. spin_unlock_irq(&ice->reg_lock);
  1924. return change;
  1925. }
  1926. static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
  1927. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1928. .name = "H/W Playback Route",
  1929. .info = snd_ice1712_pro_route_info,
  1930. .get = snd_ice1712_pro_route_analog_get,
  1931. .put = snd_ice1712_pro_route_analog_put,
  1932. };
  1933. static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
  1934. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1935. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1936. .info = snd_ice1712_pro_route_info,
  1937. .get = snd_ice1712_pro_route_spdif_get,
  1938. .put = snd_ice1712_pro_route_spdif_put,
  1939. .count = 2,
  1940. };
  1941. static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
  1942. struct snd_ctl_elem_info *uinfo)
  1943. {
  1944. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1945. uinfo->count = 1;
  1946. uinfo->value.integer.min = 0;
  1947. uinfo->value.integer.max = 255;
  1948. return 0;
  1949. }
  1950. static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
  1951. struct snd_ctl_elem_value *ucontrol)
  1952. {
  1953. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1954. ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
  1955. return 0;
  1956. }
  1957. static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
  1958. struct snd_ctl_elem_value *ucontrol)
  1959. {
  1960. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1961. int change;
  1962. spin_lock_irq(&ice->reg_lock);
  1963. change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
  1964. outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
  1965. spin_unlock_irq(&ice->reg_lock);
  1966. return change;
  1967. }
  1968. static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
  1969. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1970. .name = "Multi Track Volume Rate",
  1971. .info = snd_ice1712_pro_volume_rate_info,
  1972. .get = snd_ice1712_pro_volume_rate_get,
  1973. .put = snd_ice1712_pro_volume_rate_put
  1974. };
  1975. static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
  1976. struct snd_ctl_elem_info *uinfo)
  1977. {
  1978. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1979. uinfo->count = 22;
  1980. uinfo->value.integer.min = 0;
  1981. uinfo->value.integer.max = 255;
  1982. return 0;
  1983. }
  1984. static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
  1985. struct snd_ctl_elem_value *ucontrol)
  1986. {
  1987. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1988. int idx;
  1989. spin_lock_irq(&ice->reg_lock);
  1990. for (idx = 0; idx < 22; idx++) {
  1991. outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
  1992. ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
  1993. }
  1994. spin_unlock_irq(&ice->reg_lock);
  1995. return 0;
  1996. }
  1997. static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
  1998. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1999. .name = "Multi Track Peak",
  2000. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  2001. .info = snd_ice1712_pro_peak_info,
  2002. .get = snd_ice1712_pro_peak_get
  2003. };
  2004. /*
  2005. *
  2006. */
  2007. /*
  2008. * list of available boards
  2009. */
  2010. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  2011. snd_ice1712_hoontech_cards,
  2012. snd_ice1712_delta_cards,
  2013. snd_ice1712_ews_cards,
  2014. NULL,
  2015. };
  2016. static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
  2017. unsigned char dev,
  2018. unsigned char addr)
  2019. {
  2020. long t = 0x10000;
  2021. outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
  2022. outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
  2023. while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
  2024. return inb(ICEREG(ice, I2C_DATA));
  2025. }
  2026. static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
  2027. const char *modelname)
  2028. {
  2029. int dev = 0xa0; /* EEPROM device address */
  2030. unsigned int i, size;
  2031. struct snd_ice1712_card_info * const *tbl, *c;
  2032. if (!modelname || !*modelname) {
  2033. ice->eeprom.subvendor = 0;
  2034. if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
  2035. ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
  2036. (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
  2037. (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
  2038. (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
  2039. if (ice->eeprom.subvendor == 0 ||
  2040. ice->eeprom.subvendor == (unsigned int)-1) {
  2041. /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
  2042. u16 vendor, device;
  2043. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
  2044. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  2045. ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
  2046. if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
  2047. printk(KERN_ERR "ice1712: No valid ID is found\n");
  2048. return -ENXIO;
  2049. }
  2050. }
  2051. }
  2052. for (tbl = card_tables; *tbl; tbl++) {
  2053. for (c = *tbl; c->subvendor; c++) {
  2054. if (modelname && c->model && !strcmp(modelname, c->model)) {
  2055. printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
  2056. ice->eeprom.subvendor = c->subvendor;
  2057. } else if (c->subvendor != ice->eeprom.subvendor)
  2058. continue;
  2059. if (!c->eeprom_size || !c->eeprom_data)
  2060. goto found;
  2061. /* if the EEPROM is given by the driver, use it */
  2062. snd_printdd("using the defined eeprom..\n");
  2063. ice->eeprom.version = 1;
  2064. ice->eeprom.size = c->eeprom_size + 6;
  2065. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  2066. goto read_skipped;
  2067. }
  2068. }
  2069. printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
  2070. ice->eeprom.subvendor);
  2071. found:
  2072. ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
  2073. if (ice->eeprom.size < 6)
  2074. ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
  2075. else if (ice->eeprom.size > 32) {
  2076. snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
  2077. return -EIO;
  2078. }
  2079. ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
  2080. if (ice->eeprom.version != 1) {
  2081. snd_printk(KERN_ERR "invalid EEPROM version %i\n",
  2082. ice->eeprom.version);
  2083. /* return -EIO; */
  2084. }
  2085. size = ice->eeprom.size - 6;
  2086. for (i = 0; i < size; i++)
  2087. ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
  2088. read_skipped:
  2089. ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
  2090. ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
  2091. ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
  2092. return 0;
  2093. }
  2094. static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
  2095. {
  2096. outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2097. udelay(200);
  2098. outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
  2099. udelay(200);
  2100. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
  2101. !ice->dxr_enable)
  2102. /* Set eeprom value to limit active ADCs and DACs to 6;
  2103. * Also disable AC97 as no hardware in standard 6fire card/box
  2104. * Note: DXR extensions are not currently supported
  2105. */
  2106. ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
  2107. pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
  2108. pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
  2109. pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
  2110. pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
  2111. if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
  2112. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2113. ice->gpio.direction = ice->eeprom.gpiodir;
  2114. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
  2115. ice->eeprom.gpiomask);
  2116. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  2117. ice->eeprom.gpiodir);
  2118. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2119. ice->eeprom.gpiostate);
  2120. } else {
  2121. ice->gpio.write_mask = 0xc0;
  2122. ice->gpio.direction = 0xff;
  2123. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
  2124. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
  2125. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
  2126. ICE1712_STDSP24_CLOCK_BIT);
  2127. }
  2128. snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
  2129. if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
  2130. outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
  2131. udelay(100);
  2132. outb(0, ICEREG(ice, AC97_CMD));
  2133. udelay(200);
  2134. snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
  2135. }
  2136. snd_ice1712_set_pro_rate(ice, 48000, 1);
  2137. return 0;
  2138. }
  2139. int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
  2140. {
  2141. int err;
  2142. struct snd_kcontrol *kctl;
  2143. if (snd_BUG_ON(!ice->pcm_pro))
  2144. return -EIO;
  2145. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
  2146. if (err < 0)
  2147. return err;
  2148. kctl->id.device = ice->pcm_pro->device;
  2149. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
  2150. if (err < 0)
  2151. return err;
  2152. kctl->id.device = ice->pcm_pro->device;
  2153. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
  2154. if (err < 0)
  2155. return err;
  2156. kctl->id.device = ice->pcm_pro->device;
  2157. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
  2158. if (err < 0)
  2159. return err;
  2160. kctl->id.device = ice->pcm_pro->device;
  2161. ice->spdif.stream_ctl = kctl;
  2162. return 0;
  2163. }
  2164. static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
  2165. {
  2166. int err;
  2167. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
  2168. if (err < 0)
  2169. return err;
  2170. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
  2171. if (err < 0)
  2172. return err;
  2173. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
  2174. if (err < 0)
  2175. return err;
  2176. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
  2177. if (err < 0)
  2178. return err;
  2179. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
  2180. if (err < 0)
  2181. return err;
  2182. if (ice->num_total_dacs > 0) {
  2183. struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
  2184. tmp.count = ice->num_total_dacs;
  2185. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2186. if (err < 0)
  2187. return err;
  2188. }
  2189. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
  2190. if (err < 0)
  2191. return err;
  2192. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
  2193. if (err < 0)
  2194. return err;
  2195. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
  2196. if (err < 0)
  2197. return err;
  2198. return 0;
  2199. }
  2200. static int snd_ice1712_free(struct snd_ice1712 *ice)
  2201. {
  2202. if (!ice->port)
  2203. goto __hw_end;
  2204. /* mask all interrupts */
  2205. outb(0xc0, ICEMT(ice, IRQ));
  2206. outb(0xff, ICEREG(ice, IRQMASK));
  2207. /* --- */
  2208. __hw_end:
  2209. if (ice->irq >= 0)
  2210. free_irq(ice->irq, ice);
  2211. if (ice->port)
  2212. pci_release_regions(ice->pci);
  2213. snd_ice1712_akm4xxx_free(ice);
  2214. pci_disable_device(ice->pci);
  2215. kfree(ice->spec);
  2216. kfree(ice);
  2217. return 0;
  2218. }
  2219. static int snd_ice1712_dev_free(struct snd_device *device)
  2220. {
  2221. struct snd_ice1712 *ice = device->device_data;
  2222. return snd_ice1712_free(ice);
  2223. }
  2224. static int __devinit snd_ice1712_create(struct snd_card *card,
  2225. struct pci_dev *pci,
  2226. const char *modelname,
  2227. int omni,
  2228. int cs8427_timeout,
  2229. int dxr_enable,
  2230. struct snd_ice1712 **r_ice1712)
  2231. {
  2232. struct snd_ice1712 *ice;
  2233. int err;
  2234. static struct snd_device_ops ops = {
  2235. .dev_free = snd_ice1712_dev_free,
  2236. };
  2237. *r_ice1712 = NULL;
  2238. /* enable PCI device */
  2239. err = pci_enable_device(pci);
  2240. if (err < 0)
  2241. return err;
  2242. /* check, if we can restrict PCI DMA transfers to 28 bits */
  2243. if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
  2244. pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
  2245. snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
  2246. pci_disable_device(pci);
  2247. return -ENXIO;
  2248. }
  2249. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2250. if (ice == NULL) {
  2251. pci_disable_device(pci);
  2252. return -ENOMEM;
  2253. }
  2254. ice->omni = omni ? 1 : 0;
  2255. if (cs8427_timeout < 1)
  2256. cs8427_timeout = 1;
  2257. else if (cs8427_timeout > 1000)
  2258. cs8427_timeout = 1000;
  2259. ice->cs8427_timeout = cs8427_timeout;
  2260. ice->dxr_enable = dxr_enable;
  2261. spin_lock_init(&ice->reg_lock);
  2262. mutex_init(&ice->gpio_mutex);
  2263. mutex_init(&ice->i2c_mutex);
  2264. mutex_init(&ice->open_mutex);
  2265. ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
  2266. ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
  2267. ice->gpio.set_data = snd_ice1712_set_gpio_data;
  2268. ice->gpio.get_data = snd_ice1712_get_gpio_data;
  2269. ice->spdif.cs8403_bits =
  2270. ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
  2271. 0x10 | /* no emphasis */
  2272. 0x20); /* PCM encoder/decoder */
  2273. ice->card = card;
  2274. ice->pci = pci;
  2275. ice->irq = -1;
  2276. pci_set_master(pci);
  2277. pci_write_config_word(ice->pci, 0x40, 0x807f);
  2278. pci_write_config_word(ice->pci, 0x42, 0x0006);
  2279. snd_ice1712_proc_init(ice);
  2280. synchronize_irq(pci->irq);
  2281. err = pci_request_regions(pci, "ICE1712");
  2282. if (err < 0) {
  2283. kfree(ice);
  2284. pci_disable_device(pci);
  2285. return err;
  2286. }
  2287. ice->port = pci_resource_start(pci, 0);
  2288. ice->ddma_port = pci_resource_start(pci, 1);
  2289. ice->dmapath_port = pci_resource_start(pci, 2);
  2290. ice->profi_port = pci_resource_start(pci, 3);
  2291. if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
  2292. "ICE1712", ice)) {
  2293. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2294. snd_ice1712_free(ice);
  2295. return -EIO;
  2296. }
  2297. ice->irq = pci->irq;
  2298. if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
  2299. snd_ice1712_free(ice);
  2300. return -EIO;
  2301. }
  2302. if (snd_ice1712_chip_init(ice) < 0) {
  2303. snd_ice1712_free(ice);
  2304. return -EIO;
  2305. }
  2306. /* unmask used interrupts */
  2307. outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
  2308. ICE1712_IRQ_MPU2 : 0) |
  2309. ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
  2310. ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
  2311. ICEREG(ice, IRQMASK));
  2312. outb(0x00, ICEMT(ice, IRQ));
  2313. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2314. if (err < 0) {
  2315. snd_ice1712_free(ice);
  2316. return err;
  2317. }
  2318. snd_card_set_dev(card, &pci->dev);
  2319. *r_ice1712 = ice;
  2320. return 0;
  2321. }
  2322. /*
  2323. *
  2324. * Registration
  2325. *
  2326. */
  2327. static struct snd_ice1712_card_info no_matched __devinitdata;
  2328. static int __devinit snd_ice1712_probe(struct pci_dev *pci,
  2329. const struct pci_device_id *pci_id)
  2330. {
  2331. static int dev;
  2332. struct snd_card *card;
  2333. struct snd_ice1712 *ice;
  2334. int pcm_dev = 0, err;
  2335. struct snd_ice1712_card_info * const *tbl, *c;
  2336. if (dev >= SNDRV_CARDS)
  2337. return -ENODEV;
  2338. if (!enable[dev]) {
  2339. dev++;
  2340. return -ENOENT;
  2341. }
  2342. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2343. if (err < 0)
  2344. return err;
  2345. strcpy(card->driver, "ICE1712");
  2346. strcpy(card->shortname, "ICEnsemble ICE1712");
  2347. err = snd_ice1712_create(card, pci, model[dev], omni[dev],
  2348. cs8427_timeout[dev], dxr_enable[dev], &ice);
  2349. if (err < 0) {
  2350. snd_card_free(card);
  2351. return err;
  2352. }
  2353. for (tbl = card_tables; *tbl; tbl++) {
  2354. for (c = *tbl; c->subvendor; c++) {
  2355. if (c->subvendor == ice->eeprom.subvendor) {
  2356. strcpy(card->shortname, c->name);
  2357. if (c->driver) /* specific driver? */
  2358. strcpy(card->driver, c->driver);
  2359. if (c->chip_init) {
  2360. err = c->chip_init(ice);
  2361. if (err < 0) {
  2362. snd_card_free(card);
  2363. return err;
  2364. }
  2365. }
  2366. goto __found;
  2367. }
  2368. }
  2369. }
  2370. c = &no_matched;
  2371. __found:
  2372. err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
  2373. if (err < 0) {
  2374. snd_card_free(card);
  2375. return err;
  2376. }
  2377. if (ice_has_con_ac97(ice)) {
  2378. err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
  2379. if (err < 0) {
  2380. snd_card_free(card);
  2381. return err;
  2382. }
  2383. }
  2384. err = snd_ice1712_ac97_mixer(ice);
  2385. if (err < 0) {
  2386. snd_card_free(card);
  2387. return err;
  2388. }
  2389. err = snd_ice1712_build_controls(ice);
  2390. if (err < 0) {
  2391. snd_card_free(card);
  2392. return err;
  2393. }
  2394. if (c->build_controls) {
  2395. err = c->build_controls(ice);
  2396. if (err < 0) {
  2397. snd_card_free(card);
  2398. return err;
  2399. }
  2400. }
  2401. if (ice_has_con_ac97(ice)) {
  2402. err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
  2403. if (err < 0) {
  2404. snd_card_free(card);
  2405. return err;
  2406. }
  2407. }
  2408. if (!c->no_mpu401) {
  2409. err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2410. ICEREG(ice, MPU1_CTRL),
  2411. (c->mpu401_1_info_flags | MPU401_INFO_INTEGRATED),
  2412. ice->irq, 0, &ice->rmidi[0]);
  2413. if (err < 0) {
  2414. snd_card_free(card);
  2415. return err;
  2416. }
  2417. if (c->mpu401_1_name)
  2418. /* Prefered name available in card_info */
  2419. snprintf(ice->rmidi[0]->name,
  2420. sizeof(ice->rmidi[0]->name),
  2421. "%s %d", c->mpu401_1_name, card->number);
  2422. if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
  2423. /* 2nd port used */
  2424. err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
  2425. ICEREG(ice, MPU2_CTRL),
  2426. (c->mpu401_2_info_flags | MPU401_INFO_INTEGRATED),
  2427. ice->irq, 0, &ice->rmidi[1]);
  2428. if (err < 0) {
  2429. snd_card_free(card);
  2430. return err;
  2431. }
  2432. if (c->mpu401_2_name)
  2433. /* Prefered name available in card_info */
  2434. snprintf(ice->rmidi[1]->name,
  2435. sizeof(ice->rmidi[1]->name),
  2436. "%s %d", c->mpu401_2_name,
  2437. card->number);
  2438. }
  2439. }
  2440. snd_ice1712_set_input_clock_source(ice, 0);
  2441. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2442. card->shortname, ice->port, ice->irq);
  2443. err = snd_card_register(card);
  2444. if (err < 0) {
  2445. snd_card_free(card);
  2446. return err;
  2447. }
  2448. pci_set_drvdata(pci, card);
  2449. dev++;
  2450. return 0;
  2451. }
  2452. static void __devexit snd_ice1712_remove(struct pci_dev *pci)
  2453. {
  2454. snd_card_free(pci_get_drvdata(pci));
  2455. pci_set_drvdata(pci, NULL);
  2456. }
  2457. static struct pci_driver driver = {
  2458. .name = "ICE1712",
  2459. .id_table = snd_ice1712_ids,
  2460. .probe = snd_ice1712_probe,
  2461. .remove = __devexit_p(snd_ice1712_remove),
  2462. };
  2463. static int __init alsa_card_ice1712_init(void)
  2464. {
  2465. return pci_register_driver(&driver);
  2466. }
  2467. static void __exit alsa_card_ice1712_exit(void)
  2468. {
  2469. pci_unregister_driver(&driver);
  2470. }
  2471. module_init(alsa_card_ice1712_init)
  2472. module_exit(alsa_card_ice1712_exit)