delta.c 23 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
  5. * Audiophile, Digigram VX442
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. #include "ice1712.h"
  34. #include "delta.h"
  35. #define SND_CS8403
  36. #include <sound/cs8403.h>
  37. /*
  38. * CS8427 via SPI mode (for Audiophile), emulated I2C
  39. */
  40. /* send 8 bits */
  41. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  42. {
  43. int idx;
  44. for (idx = 7; idx >= 0; idx--) {
  45. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  46. if (data & (1 << idx))
  47. tmp |= ICE1712_DELTA_AP_DOUT;
  48. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  49. udelay(5);
  50. tmp |= ICE1712_DELTA_AP_CCLK;
  51. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  52. udelay(5);
  53. }
  54. }
  55. /* read 8 bits */
  56. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  57. {
  58. unsigned char data = 0;
  59. int idx;
  60. for (idx = 7; idx >= 0; idx--) {
  61. tmp &= ~ICE1712_DELTA_AP_CCLK;
  62. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  63. udelay(5);
  64. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  65. data |= 1 << idx;
  66. tmp |= ICE1712_DELTA_AP_CCLK;
  67. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  68. udelay(5);
  69. }
  70. return data;
  71. }
  72. /* assert chip select */
  73. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  74. {
  75. unsigned char tmp;
  76. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  77. switch (ice->eeprom.subvendor) {
  78. case ICE1712_SUBDEVICE_DELTA1010E:
  79. case ICE1712_SUBDEVICE_DELTA1010LT:
  80. tmp &= ~ICE1712_DELTA_1010LT_CS;
  81. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  82. break;
  83. case ICE1712_SUBDEVICE_AUDIOPHILE:
  84. case ICE1712_SUBDEVICE_DELTA410:
  85. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  86. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  87. break;
  88. case ICE1712_SUBDEVICE_VX442:
  89. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  90. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  91. break;
  92. }
  93. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  94. udelay(5);
  95. return tmp;
  96. }
  97. /* deassert chip select */
  98. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  99. {
  100. switch (ice->eeprom.subvendor) {
  101. case ICE1712_SUBDEVICE_DELTA1010E:
  102. case ICE1712_SUBDEVICE_DELTA1010LT:
  103. tmp &= ~ICE1712_DELTA_1010LT_CS;
  104. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  105. break;
  106. case ICE1712_SUBDEVICE_AUDIOPHILE:
  107. case ICE1712_SUBDEVICE_DELTA410:
  108. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  109. break;
  110. case ICE1712_SUBDEVICE_VX442:
  111. tmp |= ICE1712_VX442_CS_DIGITAL;
  112. break;
  113. }
  114. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  115. }
  116. /* sequential write */
  117. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  118. {
  119. struct snd_ice1712 *ice = device->bus->private_data;
  120. int res = count;
  121. unsigned char tmp;
  122. mutex_lock(&ice->gpio_mutex);
  123. tmp = ap_cs8427_codec_select(ice);
  124. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  125. while (count-- > 0)
  126. ap_cs8427_write_byte(ice, *bytes++, tmp);
  127. ap_cs8427_codec_deassert(ice, tmp);
  128. mutex_unlock(&ice->gpio_mutex);
  129. return res;
  130. }
  131. /* sequential read */
  132. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  133. {
  134. struct snd_ice1712 *ice = device->bus->private_data;
  135. int res = count;
  136. unsigned char tmp;
  137. mutex_lock(&ice->gpio_mutex);
  138. tmp = ap_cs8427_codec_select(ice);
  139. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  140. while (count-- > 0)
  141. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  142. ap_cs8427_codec_deassert(ice, tmp);
  143. mutex_unlock(&ice->gpio_mutex);
  144. return res;
  145. }
  146. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  147. {
  148. if (addr == 0x10)
  149. return 1;
  150. return -ENOENT;
  151. }
  152. static struct snd_i2c_ops ap_cs8427_i2c_ops = {
  153. .sendbytes = ap_cs8427_sendbytes,
  154. .readbytes = ap_cs8427_readbytes,
  155. .probeaddr = ap_cs8427_probeaddr,
  156. };
  157. /*
  158. */
  159. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  160. {
  161. unsigned char tmp, mask1, mask2;
  162. int idx;
  163. /* send byte to transmitter */
  164. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  165. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  166. mutex_lock(&ice->gpio_mutex);
  167. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  168. for (idx = 7; idx >= 0; idx--) {
  169. tmp &= ~(mask1 | mask2);
  170. if (bits & (1 << idx))
  171. tmp |= mask2;
  172. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  173. udelay(100);
  174. tmp |= mask1;
  175. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  176. udelay(100);
  177. }
  178. tmp &= ~mask1;
  179. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  180. mutex_unlock(&ice->gpio_mutex);
  181. }
  182. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  183. {
  184. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  185. }
  186. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  187. {
  188. unsigned int val;
  189. int change;
  190. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  191. spin_lock_irq(&ice->reg_lock);
  192. change = ice->spdif.cs8403_bits != val;
  193. ice->spdif.cs8403_bits = val;
  194. if (change && ice->playback_pro_substream == NULL) {
  195. spin_unlock_irq(&ice->reg_lock);
  196. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  197. } else {
  198. spin_unlock_irq(&ice->reg_lock);
  199. }
  200. return change;
  201. }
  202. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  203. {
  204. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  205. }
  206. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  207. {
  208. unsigned int val;
  209. int change;
  210. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  211. spin_lock_irq(&ice->reg_lock);
  212. change = ice->spdif.cs8403_stream_bits != val;
  213. ice->spdif.cs8403_stream_bits = val;
  214. if (change && ice->playback_pro_substream != NULL) {
  215. spin_unlock_irq(&ice->reg_lock);
  216. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  217. } else {
  218. spin_unlock_irq(&ice->reg_lock);
  219. }
  220. return change;
  221. }
  222. /*
  223. * AK4524 on Delta 44 and 66 to choose the chip mask
  224. */
  225. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  226. {
  227. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  228. struct snd_ice1712 *ice = ak->private_data[0];
  229. snd_ice1712_save_gpio_status(ice);
  230. priv->cs_mask =
  231. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  232. ICE1712_DELTA_CODEC_CHIP_B;
  233. }
  234. /*
  235. * AK4524 on Delta1010LT to choose the chip address
  236. */
  237. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  238. {
  239. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  240. struct snd_ice1712 *ice = ak->private_data[0];
  241. snd_ice1712_save_gpio_status(ice);
  242. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  243. priv->cs_addr = chip << 4;
  244. }
  245. /*
  246. * AK4528 on VX442 to choose the chip mask
  247. */
  248. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  249. {
  250. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  251. struct snd_ice1712 *ice = ak->private_data[0];
  252. snd_ice1712_save_gpio_status(ice);
  253. priv->cs_mask =
  254. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  255. ICE1712_VX442_CODEC_CHIP_B;
  256. }
  257. /*
  258. * change the DFS bit according rate for Delta1010
  259. */
  260. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  261. {
  262. unsigned char tmp, tmp2;
  263. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  264. return;
  265. mutex_lock(&ice->gpio_mutex);
  266. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  267. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  268. if (rate > 48000)
  269. tmp2 |= ICE1712_DELTA_DFS;
  270. if (tmp != tmp2)
  271. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  272. mutex_unlock(&ice->gpio_mutex);
  273. }
  274. /*
  275. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  276. */
  277. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  278. {
  279. unsigned char tmp, tmp2;
  280. struct snd_ice1712 *ice = ak->private_data[0];
  281. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  282. return;
  283. /* check before reset ak4524 to avoid unnecessary clicks */
  284. mutex_lock(&ice->gpio_mutex);
  285. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  286. mutex_unlock(&ice->gpio_mutex);
  287. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  288. if (rate > 48000)
  289. tmp2 |= ICE1712_DELTA_DFS;
  290. if (tmp == tmp2)
  291. return;
  292. /* do it again */
  293. snd_akm4xxx_reset(ak, 1);
  294. mutex_lock(&ice->gpio_mutex);
  295. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  296. if (rate > 48000)
  297. tmp |= ICE1712_DELTA_DFS;
  298. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  299. mutex_unlock(&ice->gpio_mutex);
  300. snd_akm4xxx_reset(ak, 0);
  301. }
  302. /*
  303. * change the rate of AK4524 on VX442
  304. */
  305. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  306. {
  307. unsigned char val;
  308. val = (rate > 48000) ? 0x65 : 0x60;
  309. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  310. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  311. snd_akm4xxx_reset(ak, 1);
  312. snd_akm4xxx_write(ak, 0, 0x02, val);
  313. snd_akm4xxx_write(ak, 1, 0x02, val);
  314. snd_akm4xxx_reset(ak, 0);
  315. }
  316. }
  317. /*
  318. * SPDIF ops for Delta 1010, Dio, 66
  319. */
  320. /* open callback */
  321. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  322. {
  323. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  324. }
  325. /* set up */
  326. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  327. {
  328. unsigned long flags;
  329. unsigned int tmp;
  330. int change;
  331. spin_lock_irqsave(&ice->reg_lock, flags);
  332. tmp = ice->spdif.cs8403_stream_bits;
  333. if (tmp & 0x01) /* consumer */
  334. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  335. switch (rate) {
  336. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  337. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  338. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  339. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  340. }
  341. change = ice->spdif.cs8403_stream_bits != tmp;
  342. ice->spdif.cs8403_stream_bits = tmp;
  343. spin_unlock_irqrestore(&ice->reg_lock, flags);
  344. if (change)
  345. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  346. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  347. }
  348. #define snd_ice1712_delta1010lt_wordclock_status_info \
  349. snd_ctl_boolean_mono_info
  350. static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
  351. struct snd_ctl_elem_value *ucontrol)
  352. {
  353. char reg = 0x10; /* CS8427 receiver error register */
  354. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  355. if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
  356. snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
  357. snd_i2c_readbytes(ice->cs8427, &reg, 1);
  358. ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
  359. return 0;
  360. }
  361. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata =
  362. {
  363. .access = (SNDRV_CTL_ELEM_ACCESS_READ),
  364. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  365. .name = "Word Clock Status",
  366. .info = snd_ice1712_delta1010lt_wordclock_status_info,
  367. .get = snd_ice1712_delta1010lt_wordclock_status_get,
  368. };
  369. /*
  370. * initialize the chips on M-Audio cards
  371. */
  372. static struct snd_akm4xxx akm_audiophile __devinitdata = {
  373. .type = SND_AK4528,
  374. .num_adcs = 2,
  375. .num_dacs = 2,
  376. .ops = {
  377. .set_rate_val = delta_ak4524_set_rate_val
  378. }
  379. };
  380. static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
  381. .caddr = 2,
  382. .cif = 0,
  383. .data_mask = ICE1712_DELTA_AP_DOUT,
  384. .clk_mask = ICE1712_DELTA_AP_CCLK,
  385. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  386. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  387. .cs_none = 0,
  388. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  389. .mask_flags = 0,
  390. };
  391. static struct snd_akm4xxx akm_delta410 __devinitdata = {
  392. .type = SND_AK4529,
  393. .num_adcs = 2,
  394. .num_dacs = 8,
  395. .ops = {
  396. .set_rate_val = delta_ak4524_set_rate_val
  397. }
  398. };
  399. static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
  400. .caddr = 0,
  401. .cif = 0,
  402. .data_mask = ICE1712_DELTA_AP_DOUT,
  403. .clk_mask = ICE1712_DELTA_AP_CCLK,
  404. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  405. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  406. .cs_none = 0,
  407. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  408. .mask_flags = 0,
  409. };
  410. static struct snd_akm4xxx akm_delta1010lt __devinitdata = {
  411. .type = SND_AK4524,
  412. .num_adcs = 8,
  413. .num_dacs = 8,
  414. .ops = {
  415. .lock = delta1010lt_ak4524_lock,
  416. .set_rate_val = delta_ak4524_set_rate_val
  417. }
  418. };
  419. static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
  420. .caddr = 2,
  421. .cif = 0, /* the default level of the CIF pin from AK4524 */
  422. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  423. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  424. .cs_mask = 0,
  425. .cs_addr = 0, /* set later */
  426. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  427. .add_flags = 0,
  428. .mask_flags = 0,
  429. };
  430. static struct snd_akm4xxx akm_delta44 __devinitdata = {
  431. .type = SND_AK4524,
  432. .num_adcs = 4,
  433. .num_dacs = 4,
  434. .ops = {
  435. .lock = delta_ak4524_lock,
  436. .set_rate_val = delta_ak4524_set_rate_val
  437. }
  438. };
  439. static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
  440. .caddr = 2,
  441. .cif = 0, /* the default level of the CIF pin from AK4524 */
  442. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  443. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  444. .cs_mask = 0,
  445. .cs_addr = 0, /* set later */
  446. .cs_none = 0,
  447. .add_flags = 0,
  448. .mask_flags = 0,
  449. };
  450. static struct snd_akm4xxx akm_vx442 __devinitdata = {
  451. .type = SND_AK4524,
  452. .num_adcs = 4,
  453. .num_dacs = 4,
  454. .ops = {
  455. .lock = vx442_ak4524_lock,
  456. .set_rate_val = vx442_ak4524_set_rate_val
  457. }
  458. };
  459. static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
  460. .caddr = 2,
  461. .cif = 0,
  462. .data_mask = ICE1712_VX442_DOUT,
  463. .clk_mask = ICE1712_VX442_CCLK,
  464. .cs_mask = 0,
  465. .cs_addr = 0, /* set later */
  466. .cs_none = 0,
  467. .add_flags = 0,
  468. .mask_flags = 0,
  469. };
  470. static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
  471. {
  472. int err;
  473. struct snd_akm4xxx *ak;
  474. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
  475. ice->eeprom.gpiodir == 0x7b)
  476. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
  477. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
  478. ice->eeprom.gpiodir == 0xfb)
  479. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
  480. /* determine I2C, DACs and ADCs */
  481. switch (ice->eeprom.subvendor) {
  482. case ICE1712_SUBDEVICE_AUDIOPHILE:
  483. ice->num_total_dacs = 2;
  484. ice->num_total_adcs = 2;
  485. break;
  486. case ICE1712_SUBDEVICE_DELTA410:
  487. ice->num_total_dacs = 8;
  488. ice->num_total_adcs = 2;
  489. break;
  490. case ICE1712_SUBDEVICE_DELTA44:
  491. case ICE1712_SUBDEVICE_DELTA66:
  492. ice->num_total_dacs = ice->omni ? 8 : 4;
  493. ice->num_total_adcs = ice->omni ? 8 : 4;
  494. break;
  495. case ICE1712_SUBDEVICE_DELTA1010:
  496. case ICE1712_SUBDEVICE_DELTA1010E:
  497. case ICE1712_SUBDEVICE_DELTA1010LT:
  498. case ICE1712_SUBDEVICE_MEDIASTATION:
  499. ice->num_total_dacs = 8;
  500. ice->num_total_adcs = 8;
  501. break;
  502. case ICE1712_SUBDEVICE_DELTADIO2496:
  503. ice->num_total_dacs = 4; /* two AK4324 codecs */
  504. break;
  505. case ICE1712_SUBDEVICE_VX442:
  506. case ICE1712_SUBDEVICE_DELTA66E: /* omni not suported yet */
  507. ice->num_total_dacs = 4;
  508. ice->num_total_adcs = 4;
  509. break;
  510. }
  511. /* initialize spdif */
  512. switch (ice->eeprom.subvendor) {
  513. case ICE1712_SUBDEVICE_AUDIOPHILE:
  514. case ICE1712_SUBDEVICE_DELTA410:
  515. case ICE1712_SUBDEVICE_DELTA1010E:
  516. case ICE1712_SUBDEVICE_DELTA1010LT:
  517. case ICE1712_SUBDEVICE_VX442:
  518. case ICE1712_SUBDEVICE_DELTA66E:
  519. if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
  520. snd_printk(KERN_ERR "unable to create I2C bus\n");
  521. return err;
  522. }
  523. ice->i2c->private_data = ice;
  524. ice->i2c->ops = &ap_cs8427_i2c_ops;
  525. if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
  526. return err;
  527. break;
  528. case ICE1712_SUBDEVICE_DELTA1010:
  529. case ICE1712_SUBDEVICE_MEDIASTATION:
  530. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  531. break;
  532. case ICE1712_SUBDEVICE_DELTADIO2496:
  533. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  534. /* fall thru */
  535. case ICE1712_SUBDEVICE_DELTA66:
  536. ice->spdif.ops.open = delta_open_spdif;
  537. ice->spdif.ops.setup_rate = delta_setup_spdif;
  538. ice->spdif.ops.default_get = delta_spdif_default_get;
  539. ice->spdif.ops.default_put = delta_spdif_default_put;
  540. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  541. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  542. /* Set spdif defaults */
  543. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  544. break;
  545. }
  546. /* no analog? */
  547. switch (ice->eeprom.subvendor) {
  548. case ICE1712_SUBDEVICE_DELTA1010:
  549. case ICE1712_SUBDEVICE_DELTA1010E:
  550. case ICE1712_SUBDEVICE_DELTADIO2496:
  551. case ICE1712_SUBDEVICE_MEDIASTATION:
  552. return 0;
  553. }
  554. /* second stage of initialization, analog parts and others */
  555. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  556. if (! ak)
  557. return -ENOMEM;
  558. ice->akm_codecs = 1;
  559. switch (ice->eeprom.subvendor) {
  560. case ICE1712_SUBDEVICE_AUDIOPHILE:
  561. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  562. break;
  563. case ICE1712_SUBDEVICE_DELTA410:
  564. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  565. break;
  566. case ICE1712_SUBDEVICE_DELTA1010LT:
  567. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  568. break;
  569. case ICE1712_SUBDEVICE_DELTA66:
  570. case ICE1712_SUBDEVICE_DELTA44:
  571. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  572. break;
  573. case ICE1712_SUBDEVICE_VX442:
  574. case ICE1712_SUBDEVICE_DELTA66E:
  575. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  576. break;
  577. default:
  578. snd_BUG();
  579. return -EINVAL;
  580. }
  581. return err;
  582. }
  583. /*
  584. * additional controls for M-Audio cards
  585. */
  586. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
  587. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  588. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
  589. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
  590. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
  591. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  592. static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
  593. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  594. static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
  595. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  596. static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  597. {
  598. int err;
  599. /* 1010 and dio specific controls */
  600. switch (ice->eeprom.subvendor) {
  601. case ICE1712_SUBDEVICE_DELTA1010:
  602. case ICE1712_SUBDEVICE_MEDIASTATION:
  603. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  604. if (err < 0)
  605. return err;
  606. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  607. if (err < 0)
  608. return err;
  609. break;
  610. case ICE1712_SUBDEVICE_DELTADIO2496:
  611. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  612. if (err < 0)
  613. return err;
  614. break;
  615. case ICE1712_SUBDEVICE_DELTA1010E:
  616. case ICE1712_SUBDEVICE_DELTA1010LT:
  617. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  618. if (err < 0)
  619. return err;
  620. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
  621. if (err < 0)
  622. return err;
  623. break;
  624. }
  625. /* normal spdif controls */
  626. switch (ice->eeprom.subvendor) {
  627. case ICE1712_SUBDEVICE_DELTA1010:
  628. case ICE1712_SUBDEVICE_DELTADIO2496:
  629. case ICE1712_SUBDEVICE_DELTA66:
  630. case ICE1712_SUBDEVICE_MEDIASTATION:
  631. err = snd_ice1712_spdif_build_controls(ice);
  632. if (err < 0)
  633. return err;
  634. break;
  635. }
  636. /* spdif status in */
  637. switch (ice->eeprom.subvendor) {
  638. case ICE1712_SUBDEVICE_DELTA1010:
  639. case ICE1712_SUBDEVICE_DELTADIO2496:
  640. case ICE1712_SUBDEVICE_DELTA66:
  641. case ICE1712_SUBDEVICE_MEDIASTATION:
  642. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  643. if (err < 0)
  644. return err;
  645. break;
  646. }
  647. /* ak4524 controls */
  648. switch (ice->eeprom.subvendor) {
  649. case ICE1712_SUBDEVICE_DELTA1010LT:
  650. case ICE1712_SUBDEVICE_AUDIOPHILE:
  651. case ICE1712_SUBDEVICE_DELTA410:
  652. case ICE1712_SUBDEVICE_DELTA44:
  653. case ICE1712_SUBDEVICE_DELTA66:
  654. case ICE1712_SUBDEVICE_VX442:
  655. case ICE1712_SUBDEVICE_DELTA66E:
  656. err = snd_ice1712_akm4xxx_build_controls(ice);
  657. if (err < 0)
  658. return err;
  659. break;
  660. }
  661. return 0;
  662. }
  663. /* entry point */
  664. struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
  665. {
  666. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  667. .name = "M Audio Delta 1010",
  668. .model = "delta1010",
  669. .chip_init = snd_ice1712_delta_init,
  670. .build_controls = snd_ice1712_delta_add_controls,
  671. },
  672. {
  673. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  674. .name = "M Audio Delta DiO 2496",
  675. .model = "dio2496",
  676. .chip_init = snd_ice1712_delta_init,
  677. .build_controls = snd_ice1712_delta_add_controls,
  678. .no_mpu401 = 1,
  679. },
  680. {
  681. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  682. .name = "M Audio Delta 66",
  683. .model = "delta66",
  684. .chip_init = snd_ice1712_delta_init,
  685. .build_controls = snd_ice1712_delta_add_controls,
  686. .no_mpu401 = 1,
  687. },
  688. {
  689. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  690. .name = "M Audio Delta 44",
  691. .model = "delta44",
  692. .chip_init = snd_ice1712_delta_init,
  693. .build_controls = snd_ice1712_delta_add_controls,
  694. .no_mpu401 = 1,
  695. },
  696. {
  697. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  698. .name = "M Audio Audiophile 24/96",
  699. .model = "audiophile",
  700. .chip_init = snd_ice1712_delta_init,
  701. .build_controls = snd_ice1712_delta_add_controls,
  702. },
  703. {
  704. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  705. .name = "M Audio Delta 410",
  706. .model = "delta410",
  707. .chip_init = snd_ice1712_delta_init,
  708. .build_controls = snd_ice1712_delta_add_controls,
  709. },
  710. {
  711. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  712. .name = "M Audio Delta 1010LT",
  713. .model = "delta1010lt",
  714. .chip_init = snd_ice1712_delta_init,
  715. .build_controls = snd_ice1712_delta_add_controls,
  716. },
  717. {
  718. .subvendor = ICE1712_SUBDEVICE_VX442,
  719. .name = "Digigram VX442",
  720. .model = "vx442",
  721. .chip_init = snd_ice1712_delta_init,
  722. .build_controls = snd_ice1712_delta_add_controls,
  723. .no_mpu401 = 1,
  724. },
  725. {
  726. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  727. .name = "Lionstracs Mediastation",
  728. .model = "mediastation",
  729. .chip_init = snd_ice1712_delta_init,
  730. .build_controls = snd_ice1712_delta_add_controls,
  731. },
  732. { } /* terminator */
  733. };