au88x0_pcm.c 15 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU Library General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. */
  16. /*
  17. * Vortex PCM ALSA driver.
  18. *
  19. * Supports ADB and WT DMA. Unfortunately, WT channels do not run yet.
  20. * It remains stuck,and DMA transfers do not happen.
  21. */
  22. #include <sound/asoundef.h>
  23. #include <linux/time.h>
  24. #include <sound/core.h>
  25. #include <sound/pcm.h>
  26. #include <sound/pcm_params.h>
  27. #include "au88x0.h"
  28. #define VORTEX_PCM_TYPE(x) (x->name[40])
  29. /* hardware definition */
  30. static struct snd_pcm_hardware snd_vortex_playback_hw_adb = {
  31. .info =
  32. (SNDRV_PCM_INFO_MMAP | /* SNDRV_PCM_INFO_RESUME | */
  33. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_INTERLEAVED |
  34. SNDRV_PCM_INFO_MMAP_VALID),
  35. .formats =
  36. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U8 |
  37. SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW,
  38. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  39. .rate_min = 5000,
  40. .rate_max = 48000,
  41. .channels_min = 1,
  42. #ifdef CHIP_AU8830
  43. .channels_max = 4,
  44. #else
  45. .channels_max = 2,
  46. #endif
  47. .buffer_bytes_max = 0x10000,
  48. .period_bytes_min = 0x1,
  49. .period_bytes_max = 0x1000,
  50. .periods_min = 2,
  51. .periods_max = 32,
  52. };
  53. #ifndef CHIP_AU8820
  54. static struct snd_pcm_hardware snd_vortex_playback_hw_a3d = {
  55. .info =
  56. (SNDRV_PCM_INFO_MMAP | /* SNDRV_PCM_INFO_RESUME | */
  57. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_INTERLEAVED |
  58. SNDRV_PCM_INFO_MMAP_VALID),
  59. .formats =
  60. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U8 |
  61. SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW,
  62. .rates = SNDRV_PCM_RATE_CONTINUOUS,
  63. .rate_min = 5000,
  64. .rate_max = 48000,
  65. .channels_min = 1,
  66. .channels_max = 1,
  67. .buffer_bytes_max = 0x10000,
  68. .period_bytes_min = 0x100,
  69. .period_bytes_max = 0x1000,
  70. .periods_min = 2,
  71. .periods_max = 64,
  72. };
  73. #endif
  74. static struct snd_pcm_hardware snd_vortex_playback_hw_spdif = {
  75. .info =
  76. (SNDRV_PCM_INFO_MMAP | /* SNDRV_PCM_INFO_RESUME | */
  77. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_INTERLEAVED |
  78. SNDRV_PCM_INFO_MMAP_VALID),
  79. .formats =
  80. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U8 |
  81. SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE | SNDRV_PCM_FMTBIT_MU_LAW |
  82. SNDRV_PCM_FMTBIT_A_LAW,
  83. .rates =
  84. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  85. .rate_min = 32000,
  86. .rate_max = 48000,
  87. .channels_min = 1,
  88. .channels_max = 2,
  89. .buffer_bytes_max = 0x10000,
  90. .period_bytes_min = 0x100,
  91. .period_bytes_max = 0x1000,
  92. .periods_min = 2,
  93. .periods_max = 64,
  94. };
  95. #ifndef CHIP_AU8810
  96. static struct snd_pcm_hardware snd_vortex_playback_hw_wt = {
  97. .info = (SNDRV_PCM_INFO_MMAP |
  98. SNDRV_PCM_INFO_INTERLEAVED |
  99. SNDRV_PCM_INFO_BLOCK_TRANSFER | SNDRV_PCM_INFO_MMAP_VALID),
  100. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  101. .rates = SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_CONTINUOUS, // SNDRV_PCM_RATE_48000,
  102. .rate_min = 8000,
  103. .rate_max = 48000,
  104. .channels_min = 1,
  105. .channels_max = 2,
  106. .buffer_bytes_max = 0x10000,
  107. .period_bytes_min = 0x0400,
  108. .period_bytes_max = 0x1000,
  109. .periods_min = 2,
  110. .periods_max = 64,
  111. };
  112. #endif
  113. /* open callback */
  114. static int snd_vortex_pcm_open(struct snd_pcm_substream *substream)
  115. {
  116. vortex_t *vortex = snd_pcm_substream_chip(substream);
  117. struct snd_pcm_runtime *runtime = substream->runtime;
  118. int err;
  119. /* Force equal size periods */
  120. if ((err =
  121. snd_pcm_hw_constraint_integer(runtime,
  122. SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  123. return err;
  124. /* Avoid PAGE_SIZE boundary to fall inside of a period. */
  125. if ((err =
  126. snd_pcm_hw_constraint_pow2(runtime, 0,
  127. SNDRV_PCM_HW_PARAM_PERIOD_BYTES)) < 0)
  128. return err;
  129. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT) {
  130. #ifndef CHIP_AU8820
  131. if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_A3D) {
  132. runtime->hw = snd_vortex_playback_hw_a3d;
  133. }
  134. #endif
  135. if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_SPDIF) {
  136. runtime->hw = snd_vortex_playback_hw_spdif;
  137. switch (vortex->spdif_sr) {
  138. case 32000:
  139. runtime->hw.rates = SNDRV_PCM_RATE_32000;
  140. break;
  141. case 44100:
  142. runtime->hw.rates = SNDRV_PCM_RATE_44100;
  143. break;
  144. case 48000:
  145. runtime->hw.rates = SNDRV_PCM_RATE_48000;
  146. break;
  147. }
  148. }
  149. if (VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_ADB
  150. || VORTEX_PCM_TYPE(substream->pcm) == VORTEX_PCM_I2S)
  151. runtime->hw = snd_vortex_playback_hw_adb;
  152. substream->runtime->private_data = NULL;
  153. }
  154. #ifndef CHIP_AU8810
  155. else {
  156. runtime->hw = snd_vortex_playback_hw_wt;
  157. substream->runtime->private_data = NULL;
  158. }
  159. #endif
  160. return 0;
  161. }
  162. /* close callback */
  163. static int snd_vortex_pcm_close(struct snd_pcm_substream *substream)
  164. {
  165. //vortex_t *chip = snd_pcm_substream_chip(substream);
  166. stream_t *stream = (stream_t *) substream->runtime->private_data;
  167. // the hardware-specific codes will be here
  168. if (stream != NULL) {
  169. stream->substream = NULL;
  170. stream->nr_ch = 0;
  171. }
  172. substream->runtime->private_data = NULL;
  173. return 0;
  174. }
  175. /* hw_params callback */
  176. static int
  177. snd_vortex_pcm_hw_params(struct snd_pcm_substream *substream,
  178. struct snd_pcm_hw_params *hw_params)
  179. {
  180. vortex_t *chip = snd_pcm_substream_chip(substream);
  181. stream_t *stream = (stream_t *) (substream->runtime->private_data);
  182. int err;
  183. // Alloc buffer memory.
  184. err =
  185. snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  186. if (err < 0) {
  187. printk(KERN_ERR "Vortex: pcm page alloc failed!\n");
  188. return err;
  189. }
  190. /*
  191. printk(KERN_INFO "Vortex: periods %d, period_bytes %d, channels = %d\n", params_periods(hw_params),
  192. params_period_bytes(hw_params), params_channels(hw_params));
  193. */
  194. spin_lock_irq(&chip->lock);
  195. // Make audio routes and config buffer DMA.
  196. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT) {
  197. int dma, type = VORTEX_PCM_TYPE(substream->pcm);
  198. /* Dealloc any routes. */
  199. if (stream != NULL)
  200. vortex_adb_allocroute(chip, stream->dma,
  201. stream->nr_ch, stream->dir,
  202. stream->type);
  203. /* Alloc routes. */
  204. dma =
  205. vortex_adb_allocroute(chip, -1,
  206. params_channels(hw_params),
  207. substream->stream, type);
  208. if (dma < 0) {
  209. spin_unlock_irq(&chip->lock);
  210. return dma;
  211. }
  212. stream = substream->runtime->private_data = &chip->dma_adb[dma];
  213. stream->substream = substream;
  214. /* Setup Buffers. */
  215. vortex_adbdma_setbuffers(chip, dma,
  216. params_period_bytes(hw_params),
  217. params_periods(hw_params));
  218. }
  219. #ifndef CHIP_AU8810
  220. else {
  221. /* if (stream != NULL)
  222. vortex_wt_allocroute(chip, substream->number, 0); */
  223. vortex_wt_allocroute(chip, substream->number,
  224. params_channels(hw_params));
  225. stream = substream->runtime->private_data =
  226. &chip->dma_wt[substream->number];
  227. stream->dma = substream->number;
  228. stream->substream = substream;
  229. vortex_wtdma_setbuffers(chip, substream->number,
  230. params_period_bytes(hw_params),
  231. params_periods(hw_params));
  232. }
  233. #endif
  234. spin_unlock_irq(&chip->lock);
  235. return 0;
  236. }
  237. /* hw_free callback */
  238. static int snd_vortex_pcm_hw_free(struct snd_pcm_substream *substream)
  239. {
  240. vortex_t *chip = snd_pcm_substream_chip(substream);
  241. stream_t *stream = (stream_t *) (substream->runtime->private_data);
  242. spin_lock_irq(&chip->lock);
  243. // Delete audio routes.
  244. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT) {
  245. if (stream != NULL)
  246. vortex_adb_allocroute(chip, stream->dma,
  247. stream->nr_ch, stream->dir,
  248. stream->type);
  249. }
  250. #ifndef CHIP_AU8810
  251. else {
  252. if (stream != NULL)
  253. vortex_wt_allocroute(chip, stream->dma, 0);
  254. }
  255. #endif
  256. substream->runtime->private_data = NULL;
  257. spin_unlock_irq(&chip->lock);
  258. return snd_pcm_lib_free_pages(substream);
  259. }
  260. /* prepare callback */
  261. static int snd_vortex_pcm_prepare(struct snd_pcm_substream *substream)
  262. {
  263. vortex_t *chip = snd_pcm_substream_chip(substream);
  264. struct snd_pcm_runtime *runtime = substream->runtime;
  265. stream_t *stream = (stream_t *) substream->runtime->private_data;
  266. int dma = stream->dma, fmt, dir;
  267. // set up the hardware with the current configuration.
  268. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  269. dir = 1;
  270. else
  271. dir = 0;
  272. fmt = vortex_alsafmt_aspfmt(runtime->format);
  273. spin_lock_irq(&chip->lock);
  274. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT) {
  275. vortex_adbdma_setmode(chip, dma, 1, dir, fmt, 0 /*? */ ,
  276. 0);
  277. vortex_adbdma_setstartbuffer(chip, dma, 0);
  278. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_SPDIF)
  279. vortex_adb_setsrc(chip, dma, runtime->rate, dir);
  280. }
  281. #ifndef CHIP_AU8810
  282. else {
  283. vortex_wtdma_setmode(chip, dma, 1, fmt, 0, 0);
  284. // FIXME: Set rate (i guess using vortex_wt_writereg() somehow).
  285. vortex_wtdma_setstartbuffer(chip, dma, 0);
  286. }
  287. #endif
  288. spin_unlock_irq(&chip->lock);
  289. return 0;
  290. }
  291. /* trigger callback */
  292. static int snd_vortex_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  293. {
  294. vortex_t *chip = snd_pcm_substream_chip(substream);
  295. stream_t *stream = (stream_t *) substream->runtime->private_data;
  296. int dma = stream->dma;
  297. spin_lock(&chip->lock);
  298. switch (cmd) {
  299. case SNDRV_PCM_TRIGGER_START:
  300. // do something to start the PCM engine
  301. //printk(KERN_INFO "vortex: start %d\n", dma);
  302. stream->fifo_enabled = 1;
  303. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT) {
  304. vortex_adbdma_resetup(chip, dma);
  305. vortex_adbdma_startfifo(chip, dma);
  306. }
  307. #ifndef CHIP_AU8810
  308. else {
  309. printk(KERN_INFO "vortex: wt start %d\n", dma);
  310. vortex_wtdma_startfifo(chip, dma);
  311. }
  312. #endif
  313. break;
  314. case SNDRV_PCM_TRIGGER_STOP:
  315. // do something to stop the PCM engine
  316. //printk(KERN_INFO "vortex: stop %d\n", dma);
  317. stream->fifo_enabled = 0;
  318. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT)
  319. vortex_adbdma_pausefifo(chip, dma);
  320. //vortex_adbdma_stopfifo(chip, dma);
  321. #ifndef CHIP_AU8810
  322. else {
  323. printk(KERN_INFO "vortex: wt stop %d\n", dma);
  324. vortex_wtdma_stopfifo(chip, dma);
  325. }
  326. #endif
  327. break;
  328. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  329. //printk(KERN_INFO "vortex: pause %d\n", dma);
  330. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT)
  331. vortex_adbdma_pausefifo(chip, dma);
  332. #ifndef CHIP_AU8810
  333. else
  334. vortex_wtdma_pausefifo(chip, dma);
  335. #endif
  336. break;
  337. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  338. //printk(KERN_INFO "vortex: resume %d\n", dma);
  339. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT)
  340. vortex_adbdma_resumefifo(chip, dma);
  341. #ifndef CHIP_AU8810
  342. else
  343. vortex_wtdma_resumefifo(chip, dma);
  344. #endif
  345. break;
  346. default:
  347. spin_unlock(&chip->lock);
  348. return -EINVAL;
  349. }
  350. spin_unlock(&chip->lock);
  351. return 0;
  352. }
  353. /* pointer callback */
  354. static snd_pcm_uframes_t snd_vortex_pcm_pointer(struct snd_pcm_substream *substream)
  355. {
  356. vortex_t *chip = snd_pcm_substream_chip(substream);
  357. stream_t *stream = (stream_t *) substream->runtime->private_data;
  358. int dma = stream->dma;
  359. snd_pcm_uframes_t current_ptr = 0;
  360. spin_lock(&chip->lock);
  361. if (VORTEX_PCM_TYPE(substream->pcm) != VORTEX_PCM_WT)
  362. current_ptr = vortex_adbdma_getlinearpos(chip, dma);
  363. #ifndef CHIP_AU8810
  364. else
  365. current_ptr = vortex_wtdma_getlinearpos(chip, dma);
  366. #endif
  367. //printk(KERN_INFO "vortex: pointer = 0x%x\n", current_ptr);
  368. spin_unlock(&chip->lock);
  369. return (bytes_to_frames(substream->runtime, current_ptr));
  370. }
  371. /* operators */
  372. static struct snd_pcm_ops snd_vortex_playback_ops = {
  373. .open = snd_vortex_pcm_open,
  374. .close = snd_vortex_pcm_close,
  375. .ioctl = snd_pcm_lib_ioctl,
  376. .hw_params = snd_vortex_pcm_hw_params,
  377. .hw_free = snd_vortex_pcm_hw_free,
  378. .prepare = snd_vortex_pcm_prepare,
  379. .trigger = snd_vortex_pcm_trigger,
  380. .pointer = snd_vortex_pcm_pointer,
  381. .page = snd_pcm_sgbuf_ops_page,
  382. };
  383. /*
  384. * definitions of capture are omitted here...
  385. */
  386. static char *vortex_pcm_prettyname[VORTEX_PCM_LAST] = {
  387. "AU88x0 ADB",
  388. "AU88x0 SPDIF",
  389. "AU88x0 A3D",
  390. "AU88x0 WT",
  391. "AU88x0 I2S",
  392. };
  393. static char *vortex_pcm_name[VORTEX_PCM_LAST] = {
  394. "adb",
  395. "spdif",
  396. "a3d",
  397. "wt",
  398. "i2s",
  399. };
  400. /* SPDIF kcontrol */
  401. static int snd_vortex_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  402. {
  403. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  404. uinfo->count = 1;
  405. return 0;
  406. }
  407. static int snd_vortex_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  408. {
  409. ucontrol->value.iec958.status[0] = 0xff;
  410. ucontrol->value.iec958.status[1] = 0xff;
  411. ucontrol->value.iec958.status[2] = 0xff;
  412. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  413. return 0;
  414. }
  415. static int snd_vortex_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  416. {
  417. vortex_t *vortex = snd_kcontrol_chip(kcontrol);
  418. ucontrol->value.iec958.status[0] = 0x00;
  419. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL|IEC958_AES1_CON_DIGDIGCONV_ID;
  420. ucontrol->value.iec958.status[2] = 0x00;
  421. switch (vortex->spdif_sr) {
  422. case 32000: ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_32000; break;
  423. case 44100: ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_44100; break;
  424. case 48000: ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; break;
  425. }
  426. return 0;
  427. }
  428. static int snd_vortex_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  429. {
  430. vortex_t *vortex = snd_kcontrol_chip(kcontrol);
  431. int spdif_sr = 48000;
  432. switch (ucontrol->value.iec958.status[3] & IEC958_AES3_CON_FS) {
  433. case IEC958_AES3_CON_FS_32000: spdif_sr = 32000; break;
  434. case IEC958_AES3_CON_FS_44100: spdif_sr = 44100; break;
  435. case IEC958_AES3_CON_FS_48000: spdif_sr = 48000; break;
  436. }
  437. if (spdif_sr == vortex->spdif_sr)
  438. return 0;
  439. vortex->spdif_sr = spdif_sr;
  440. vortex_spdif_init(vortex, vortex->spdif_sr, 1);
  441. return 1;
  442. }
  443. /* spdif controls */
  444. static struct snd_kcontrol_new snd_vortex_mixer_spdif[] __devinitdata = {
  445. {
  446. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  447. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  448. .info = snd_vortex_spdif_info,
  449. .get = snd_vortex_spdif_get,
  450. .put = snd_vortex_spdif_put,
  451. },
  452. {
  453. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  454. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  455. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  456. .info = snd_vortex_spdif_info,
  457. .get = snd_vortex_spdif_mask_get
  458. },
  459. };
  460. /* create a pcm device */
  461. static int __devinit snd_vortex_new_pcm(vortex_t *chip, int idx, int nr)
  462. {
  463. struct snd_pcm *pcm;
  464. struct snd_kcontrol *kctl;
  465. int i;
  466. int err, nr_capt;
  467. if (!chip || idx < 0 || idx >= VORTEX_PCM_LAST)
  468. return -ENODEV;
  469. /* idx indicates which kind of PCM device. ADB, SPDIF, I2S and A3D share the
  470. * same dma engine. WT uses it own separate dma engine whcih cant capture. */
  471. if (idx == VORTEX_PCM_ADB)
  472. nr_capt = nr;
  473. else
  474. nr_capt = 0;
  475. err = snd_pcm_new(chip->card, vortex_pcm_prettyname[idx], idx, nr,
  476. nr_capt, &pcm);
  477. if (err < 0)
  478. return err;
  479. strcpy(pcm->name, vortex_pcm_name[idx]);
  480. chip->pcm[idx] = pcm;
  481. // This is an evil hack, but it saves a lot of duplicated code.
  482. VORTEX_PCM_TYPE(pcm) = idx;
  483. pcm->private_data = chip;
  484. /* set operators */
  485. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  486. &snd_vortex_playback_ops);
  487. if (idx == VORTEX_PCM_ADB)
  488. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  489. &snd_vortex_playback_ops);
  490. /* pre-allocation of Scatter-Gather buffers */
  491. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
  492. snd_dma_pci_data(chip->pci_dev),
  493. 0x10000, 0x10000);
  494. if (VORTEX_PCM_TYPE(pcm) == VORTEX_PCM_SPDIF) {
  495. for (i = 0; i < ARRAY_SIZE(snd_vortex_mixer_spdif); i++) {
  496. kctl = snd_ctl_new1(&snd_vortex_mixer_spdif[i], chip);
  497. if (!kctl)
  498. return -ENOMEM;
  499. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  500. return err;
  501. }
  502. }
  503. return 0;
  504. }