sb16_main.c 27 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Routines for control of 16-bit SoundBlaster cards and clones
  4. * Note: This is very ugly hardware which uses one 8-bit DMA channel and
  5. * second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
  6. * transfer 16-bit samples and 16-bit DMA channels can't transfer
  7. * 8-bit samples. This make full duplex more complicated than
  8. * can be... People, don't buy these soundcards for full 16-bit
  9. * duplex!!!
  10. * Note: 16-bit wide is assigned to first direction which made request.
  11. * With full duplex - playback is preferred with abstract layer.
  12. *
  13. * Note: Some chip revisions have hardware bug. Changing capture
  14. * channel from full-duplex 8bit DMA to 16bit DMA will block
  15. * 16bit DMA transfers from DSP chip (capture) until 8bit transfer
  16. * to DSP chip (playback) starts. This bug can be avoided with
  17. * "16bit DMA Allocation" setting set to Playback or Capture.
  18. *
  19. *
  20. * This program is free software; you can redistribute it and/or modify
  21. * it under the terms of the GNU General Public License as published by
  22. * the Free Software Foundation; either version 2 of the License, or
  23. * (at your option) any later version.
  24. *
  25. * This program is distributed in the hope that it will be useful,
  26. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  28. * GNU General Public License for more details.
  29. *
  30. * You should have received a copy of the GNU General Public License
  31. * along with this program; if not, write to the Free Software
  32. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  33. *
  34. */
  35. #include <asm/io.h>
  36. #include <asm/dma.h>
  37. #include <linux/init.h>
  38. #include <linux/time.h>
  39. #include <sound/core.h>
  40. #include <sound/sb.h>
  41. #include <sound/sb16_csp.h>
  42. #include <sound/mpu401.h>
  43. #include <sound/control.h>
  44. #include <sound/info.h>
  45. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  46. MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
  47. MODULE_LICENSE("GPL");
  48. #ifdef CONFIG_SND_SB16_CSP
  49. static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  50. {
  51. if (chip->hardware == SB_HW_16CSP) {
  52. struct snd_sb_csp *csp = chip->csp;
  53. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  54. /* manually loaded codec */
  55. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
  56. ((1U << runtime->format) == csp->acc_format)) {
  57. /* Supported runtime PCM format for playback */
  58. if (csp->ops.csp_use(csp) == 0) {
  59. /* If CSP was successfully acquired */
  60. goto __start_CSP;
  61. }
  62. } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
  63. /* QSound decoder is loaded and enabled */
  64. if ((1 << runtime->format) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  65. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
  66. /* Only for simple PCM formats */
  67. if (csp->ops.csp_use(csp) == 0) {
  68. /* If CSP was successfully acquired */
  69. goto __start_CSP;
  70. }
  71. }
  72. }
  73. } else if (csp->ops.csp_use(csp) == 0) {
  74. /* Acquire CSP and try to autoload hardware codec */
  75. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  76. /* Unsupported format, release CSP */
  77. csp->ops.csp_unuse(csp);
  78. } else {
  79. __start_CSP:
  80. /* Try to start CSP */
  81. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
  82. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  83. (runtime->channels > 1) ?
  84. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  85. /* Failed, release CSP */
  86. csp->ops.csp_unuse(csp);
  87. } else {
  88. /* Success, CSP acquired and running */
  89. chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
  90. }
  91. }
  92. }
  93. }
  94. }
  95. static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  96. {
  97. if (chip->hardware == SB_HW_16CSP) {
  98. struct snd_sb_csp *csp = chip->csp;
  99. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  100. /* manually loaded codec */
  101. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
  102. ((1U << runtime->format) == csp->acc_format)) {
  103. /* Supported runtime PCM format for capture */
  104. if (csp->ops.csp_use(csp) == 0) {
  105. /* If CSP was successfully acquired */
  106. goto __start_CSP;
  107. }
  108. }
  109. } else if (csp->ops.csp_use(csp) == 0) {
  110. /* Acquire CSP and try to autoload hardware codec */
  111. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
  112. /* Unsupported format, release CSP */
  113. csp->ops.csp_unuse(csp);
  114. } else {
  115. __start_CSP:
  116. /* Try to start CSP */
  117. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
  118. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  119. (runtime->channels > 1) ?
  120. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  121. /* Failed, release CSP */
  122. csp->ops.csp_unuse(csp);
  123. } else {
  124. /* Success, CSP acquired and running */
  125. chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
  126. }
  127. }
  128. }
  129. }
  130. }
  131. static void snd_sb16_csp_update(struct snd_sb *chip)
  132. {
  133. if (chip->hardware == SB_HW_16CSP) {
  134. struct snd_sb_csp *csp = chip->csp;
  135. if (csp->qpos_changed) {
  136. spin_lock(&chip->reg_lock);
  137. csp->ops.csp_qsound_transfer (csp);
  138. spin_unlock(&chip->reg_lock);
  139. }
  140. }
  141. }
  142. static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  143. {
  144. /* CSP decoders (QSound excluded) support only 16bit transfers */
  145. if (chip->hardware == SB_HW_16CSP) {
  146. struct snd_sb_csp *csp = chip->csp;
  147. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  148. /* manually loaded codec */
  149. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
  150. runtime->hw.formats |= csp->acc_format;
  151. }
  152. } else {
  153. /* autoloaded codecs */
  154. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  155. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  156. }
  157. }
  158. }
  159. static void snd_sb16_csp_playback_close(struct snd_sb *chip)
  160. {
  161. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  162. struct snd_sb_csp *csp = chip->csp;
  163. if (csp->ops.csp_stop(csp) == 0) {
  164. csp->ops.csp_unuse(csp);
  165. chip->open = 0;
  166. }
  167. }
  168. }
  169. static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  170. {
  171. /* CSP coders support only 16bit transfers */
  172. if (chip->hardware == SB_HW_16CSP) {
  173. struct snd_sb_csp *csp = chip->csp;
  174. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  175. /* manually loaded codec */
  176. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
  177. runtime->hw.formats |= csp->acc_format;
  178. }
  179. } else {
  180. /* autoloaded codecs */
  181. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  182. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  183. }
  184. }
  185. }
  186. static void snd_sb16_csp_capture_close(struct snd_sb *chip)
  187. {
  188. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
  189. struct snd_sb_csp *csp = chip->csp;
  190. if (csp->ops.csp_stop(csp) == 0) {
  191. csp->ops.csp_unuse(csp);
  192. chip->open = 0;
  193. }
  194. }
  195. }
  196. #else
  197. #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/
  198. #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/
  199. #define snd_sb16_csp_update(chip) /*nop*/
  200. #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/
  201. #define snd_sb16_csp_playback_close(chip) /*nop*/
  202. #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/
  203. #define snd_sb16_csp_capture_close(chip) /*nop*/
  204. #endif
  205. static void snd_sb16_setup_rate(struct snd_sb *chip,
  206. unsigned short rate,
  207. int channel)
  208. {
  209. unsigned long flags;
  210. spin_lock_irqsave(&chip->reg_lock, flags);
  211. if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
  212. snd_sb_ack_16bit(chip);
  213. else
  214. snd_sb_ack_8bit(chip);
  215. if (!(chip->mode & SB_RATE_LOCK)) {
  216. chip->locked_rate = rate;
  217. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
  218. snd_sbdsp_command(chip, rate >> 8);
  219. snd_sbdsp_command(chip, rate & 0xff);
  220. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
  221. snd_sbdsp_command(chip, rate >> 8);
  222. snd_sbdsp_command(chip, rate & 0xff);
  223. }
  224. spin_unlock_irqrestore(&chip->reg_lock, flags);
  225. }
  226. static int snd_sb16_hw_params(struct snd_pcm_substream *substream,
  227. struct snd_pcm_hw_params *hw_params)
  228. {
  229. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  230. }
  231. static int snd_sb16_hw_free(struct snd_pcm_substream *substream)
  232. {
  233. snd_pcm_lib_free_pages(substream);
  234. return 0;
  235. }
  236. static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
  237. {
  238. unsigned long flags;
  239. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  240. struct snd_pcm_runtime *runtime = substream->runtime;
  241. unsigned char format;
  242. unsigned int size, count, dma;
  243. snd_sb16_csp_playback_prepare(chip, runtime);
  244. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  245. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  246. } else {
  247. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  248. }
  249. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
  250. size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
  251. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  252. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  253. count = snd_pcm_lib_period_bytes(substream);
  254. spin_lock_irqsave(&chip->reg_lock, flags);
  255. if (chip->mode & SB_MODE_PLAYBACK_16) {
  256. count >>= 1;
  257. count--;
  258. snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
  259. snd_sbdsp_command(chip, format);
  260. snd_sbdsp_command(chip, count & 0xff);
  261. snd_sbdsp_command(chip, count >> 8);
  262. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  263. } else {
  264. count--;
  265. snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
  266. snd_sbdsp_command(chip, format);
  267. snd_sbdsp_command(chip, count & 0xff);
  268. snd_sbdsp_command(chip, count >> 8);
  269. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  270. }
  271. spin_unlock_irqrestore(&chip->reg_lock, flags);
  272. return 0;
  273. }
  274. static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
  275. int cmd)
  276. {
  277. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  278. int result = 0;
  279. spin_lock(&chip->reg_lock);
  280. switch (cmd) {
  281. case SNDRV_PCM_TRIGGER_START:
  282. case SNDRV_PCM_TRIGGER_RESUME:
  283. chip->mode |= SB_RATE_LOCK_PLAYBACK;
  284. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  285. break;
  286. case SNDRV_PCM_TRIGGER_STOP:
  287. case SNDRV_PCM_TRIGGER_SUSPEND:
  288. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  289. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  290. if (chip->mode & SB_RATE_LOCK_CAPTURE)
  291. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  292. chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
  293. break;
  294. default:
  295. result = -EINVAL;
  296. }
  297. spin_unlock(&chip->reg_lock);
  298. return result;
  299. }
  300. static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
  301. {
  302. unsigned long flags;
  303. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  304. struct snd_pcm_runtime *runtime = substream->runtime;
  305. unsigned char format;
  306. unsigned int size, count, dma;
  307. snd_sb16_csp_capture_prepare(chip, runtime);
  308. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  309. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  310. } else {
  311. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  312. }
  313. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
  314. size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
  315. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  316. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  317. count = snd_pcm_lib_period_bytes(substream);
  318. spin_lock_irqsave(&chip->reg_lock, flags);
  319. if (chip->mode & SB_MODE_CAPTURE_16) {
  320. count >>= 1;
  321. count--;
  322. snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
  323. snd_sbdsp_command(chip, format);
  324. snd_sbdsp_command(chip, count & 0xff);
  325. snd_sbdsp_command(chip, count >> 8);
  326. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  327. } else {
  328. count--;
  329. snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
  330. snd_sbdsp_command(chip, format);
  331. snd_sbdsp_command(chip, count & 0xff);
  332. snd_sbdsp_command(chip, count >> 8);
  333. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  334. }
  335. spin_unlock_irqrestore(&chip->reg_lock, flags);
  336. return 0;
  337. }
  338. static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
  339. int cmd)
  340. {
  341. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  342. int result = 0;
  343. spin_lock(&chip->reg_lock);
  344. switch (cmd) {
  345. case SNDRV_PCM_TRIGGER_START:
  346. case SNDRV_PCM_TRIGGER_RESUME:
  347. chip->mode |= SB_RATE_LOCK_CAPTURE;
  348. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  349. break;
  350. case SNDRV_PCM_TRIGGER_STOP:
  351. case SNDRV_PCM_TRIGGER_SUSPEND:
  352. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  353. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  354. if (chip->mode & SB_RATE_LOCK_PLAYBACK)
  355. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  356. chip->mode &= ~SB_RATE_LOCK_CAPTURE;
  357. break;
  358. default:
  359. result = -EINVAL;
  360. }
  361. spin_unlock(&chip->reg_lock);
  362. return result;
  363. }
  364. irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
  365. {
  366. struct snd_sb *chip = dev_id;
  367. unsigned char status;
  368. int ok;
  369. spin_lock(&chip->mixer_lock);
  370. status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
  371. spin_unlock(&chip->mixer_lock);
  372. if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
  373. chip->rmidi_callback(irq, chip->rmidi->private_data);
  374. if (status & SB_IRQTYPE_8BIT) {
  375. ok = 0;
  376. if (chip->mode & SB_MODE_PLAYBACK_8) {
  377. snd_pcm_period_elapsed(chip->playback_substream);
  378. snd_sb16_csp_update(chip);
  379. ok++;
  380. }
  381. if (chip->mode & SB_MODE_CAPTURE_8) {
  382. snd_pcm_period_elapsed(chip->capture_substream);
  383. ok++;
  384. }
  385. spin_lock(&chip->reg_lock);
  386. if (!ok)
  387. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  388. snd_sb_ack_8bit(chip);
  389. spin_unlock(&chip->reg_lock);
  390. }
  391. if (status & SB_IRQTYPE_16BIT) {
  392. ok = 0;
  393. if (chip->mode & SB_MODE_PLAYBACK_16) {
  394. snd_pcm_period_elapsed(chip->playback_substream);
  395. snd_sb16_csp_update(chip);
  396. ok++;
  397. }
  398. if (chip->mode & SB_MODE_CAPTURE_16) {
  399. snd_pcm_period_elapsed(chip->capture_substream);
  400. ok++;
  401. }
  402. spin_lock(&chip->reg_lock);
  403. if (!ok)
  404. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  405. snd_sb_ack_16bit(chip);
  406. spin_unlock(&chip->reg_lock);
  407. }
  408. return IRQ_HANDLED;
  409. }
  410. /*
  411. */
  412. static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
  413. {
  414. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  415. unsigned int dma;
  416. size_t ptr;
  417. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  418. ptr = snd_dma_pointer(dma, chip->p_dma_size);
  419. return bytes_to_frames(substream->runtime, ptr);
  420. }
  421. static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
  422. {
  423. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  424. unsigned int dma;
  425. size_t ptr;
  426. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  427. ptr = snd_dma_pointer(dma, chip->c_dma_size);
  428. return bytes_to_frames(substream->runtime, ptr);
  429. }
  430. /*
  431. */
  432. static struct snd_pcm_hardware snd_sb16_playback =
  433. {
  434. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  435. SNDRV_PCM_INFO_MMAP_VALID),
  436. .formats = 0,
  437. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  438. .rate_min = 4000,
  439. .rate_max = 44100,
  440. .channels_min = 1,
  441. .channels_max = 2,
  442. .buffer_bytes_max = (128*1024),
  443. .period_bytes_min = 64,
  444. .period_bytes_max = (128*1024),
  445. .periods_min = 1,
  446. .periods_max = 1024,
  447. .fifo_size = 0,
  448. };
  449. static struct snd_pcm_hardware snd_sb16_capture =
  450. {
  451. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  452. SNDRV_PCM_INFO_MMAP_VALID),
  453. .formats = 0,
  454. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  455. .rate_min = 4000,
  456. .rate_max = 44100,
  457. .channels_min = 1,
  458. .channels_max = 2,
  459. .buffer_bytes_max = (128*1024),
  460. .period_bytes_min = 64,
  461. .period_bytes_max = (128*1024),
  462. .periods_min = 1,
  463. .periods_max = 1024,
  464. .fifo_size = 0,
  465. };
  466. /*
  467. * open/close
  468. */
  469. static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
  470. {
  471. unsigned long flags;
  472. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  473. struct snd_pcm_runtime *runtime = substream->runtime;
  474. spin_lock_irqsave(&chip->open_lock, flags);
  475. if (chip->mode & SB_MODE_PLAYBACK) {
  476. spin_unlock_irqrestore(&chip->open_lock, flags);
  477. return -EAGAIN;
  478. }
  479. runtime->hw = snd_sb16_playback;
  480. /* skip if 16 bit DMA was reserved for capture */
  481. if (chip->force_mode16 & SB_MODE_CAPTURE_16)
  482. goto __skip_16bit;
  483. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
  484. chip->mode |= SB_MODE_PLAYBACK_16;
  485. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  486. /* Vibra16X hack */
  487. if (chip->dma16 <= 3) {
  488. runtime->hw.buffer_bytes_max =
  489. runtime->hw.period_bytes_max = 64 * 1024;
  490. } else {
  491. snd_sb16_csp_playback_open(chip, runtime);
  492. }
  493. goto __open_ok;
  494. }
  495. __skip_16bit:
  496. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
  497. chip->mode |= SB_MODE_PLAYBACK_8;
  498. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  499. if (chip->dma16 < 0) {
  500. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  501. chip->mode |= SB_MODE_PLAYBACK_16;
  502. } else {
  503. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  504. }
  505. runtime->hw.buffer_bytes_max =
  506. runtime->hw.period_bytes_max = 64 * 1024;
  507. goto __open_ok;
  508. }
  509. spin_unlock_irqrestore(&chip->open_lock, flags);
  510. return -EAGAIN;
  511. __open_ok:
  512. if (chip->hardware == SB_HW_ALS100)
  513. runtime->hw.rate_max = 48000;
  514. if (chip->hardware == SB_HW_CS5530) {
  515. runtime->hw.buffer_bytes_max = 32 * 1024;
  516. runtime->hw.periods_min = 2;
  517. runtime->hw.rate_min = 44100;
  518. }
  519. if (chip->mode & SB_RATE_LOCK)
  520. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  521. chip->playback_substream = substream;
  522. spin_unlock_irqrestore(&chip->open_lock, flags);
  523. return 0;
  524. }
  525. static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
  526. {
  527. unsigned long flags;
  528. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  529. snd_sb16_csp_playback_close(chip);
  530. spin_lock_irqsave(&chip->open_lock, flags);
  531. chip->playback_substream = NULL;
  532. chip->mode &= ~SB_MODE_PLAYBACK;
  533. spin_unlock_irqrestore(&chip->open_lock, flags);
  534. return 0;
  535. }
  536. static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
  537. {
  538. unsigned long flags;
  539. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  540. struct snd_pcm_runtime *runtime = substream->runtime;
  541. spin_lock_irqsave(&chip->open_lock, flags);
  542. if (chip->mode & SB_MODE_CAPTURE) {
  543. spin_unlock_irqrestore(&chip->open_lock, flags);
  544. return -EAGAIN;
  545. }
  546. runtime->hw = snd_sb16_capture;
  547. /* skip if 16 bit DMA was reserved for playback */
  548. if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
  549. goto __skip_16bit;
  550. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
  551. chip->mode |= SB_MODE_CAPTURE_16;
  552. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  553. /* Vibra16X hack */
  554. if (chip->dma16 <= 3) {
  555. runtime->hw.buffer_bytes_max =
  556. runtime->hw.period_bytes_max = 64 * 1024;
  557. } else {
  558. snd_sb16_csp_capture_open(chip, runtime);
  559. }
  560. goto __open_ok;
  561. }
  562. __skip_16bit:
  563. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
  564. chip->mode |= SB_MODE_CAPTURE_8;
  565. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  566. if (chip->dma16 < 0) {
  567. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  568. chip->mode |= SB_MODE_CAPTURE_16;
  569. } else {
  570. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  571. }
  572. runtime->hw.buffer_bytes_max =
  573. runtime->hw.period_bytes_max = 64 * 1024;
  574. goto __open_ok;
  575. }
  576. spin_unlock_irqrestore(&chip->open_lock, flags);
  577. return -EAGAIN;
  578. __open_ok:
  579. if (chip->hardware == SB_HW_ALS100)
  580. runtime->hw.rate_max = 48000;
  581. if (chip->hardware == SB_HW_CS5530) {
  582. runtime->hw.buffer_bytes_max = 32 * 1024;
  583. runtime->hw.periods_min = 2;
  584. runtime->hw.rate_min = 44100;
  585. }
  586. if (chip->mode & SB_RATE_LOCK)
  587. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  588. chip->capture_substream = substream;
  589. spin_unlock_irqrestore(&chip->open_lock, flags);
  590. return 0;
  591. }
  592. static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
  593. {
  594. unsigned long flags;
  595. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  596. snd_sb16_csp_capture_close(chip);
  597. spin_lock_irqsave(&chip->open_lock, flags);
  598. chip->capture_substream = NULL;
  599. chip->mode &= ~SB_MODE_CAPTURE;
  600. spin_unlock_irqrestore(&chip->open_lock, flags);
  601. return 0;
  602. }
  603. /*
  604. * DMA control interface
  605. */
  606. static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
  607. {
  608. if (chip->dma8 < 0 || chip->dma16 < 0) {
  609. if (snd_BUG_ON(what))
  610. return -EINVAL;
  611. return 0;
  612. }
  613. if (what == 0) {
  614. chip->force_mode16 = 0;
  615. } else if (what == 1) {
  616. chip->force_mode16 = SB_MODE_PLAYBACK_16;
  617. } else if (what == 2) {
  618. chip->force_mode16 = SB_MODE_CAPTURE_16;
  619. } else {
  620. return -EINVAL;
  621. }
  622. return 0;
  623. }
  624. static int snd_sb16_get_dma_mode(struct snd_sb *chip)
  625. {
  626. if (chip->dma8 < 0 || chip->dma16 < 0)
  627. return 0;
  628. switch (chip->force_mode16) {
  629. case SB_MODE_PLAYBACK_16:
  630. return 1;
  631. case SB_MODE_CAPTURE_16:
  632. return 2;
  633. default:
  634. return 0;
  635. }
  636. }
  637. static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  638. {
  639. static char *texts[3] = {
  640. "Auto", "Playback", "Capture"
  641. };
  642. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  643. uinfo->count = 1;
  644. uinfo->value.enumerated.items = 3;
  645. if (uinfo->value.enumerated.item > 2)
  646. uinfo->value.enumerated.item = 2;
  647. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  648. return 0;
  649. }
  650. static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  651. {
  652. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  653. unsigned long flags;
  654. spin_lock_irqsave(&chip->reg_lock, flags);
  655. ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
  656. spin_unlock_irqrestore(&chip->reg_lock, flags);
  657. return 0;
  658. }
  659. static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  660. {
  661. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  662. unsigned long flags;
  663. unsigned char nval, oval;
  664. int change;
  665. if ((nval = ucontrol->value.enumerated.item[0]) > 2)
  666. return -EINVAL;
  667. spin_lock_irqsave(&chip->reg_lock, flags);
  668. oval = snd_sb16_get_dma_mode(chip);
  669. change = nval != oval;
  670. snd_sb16_set_dma_mode(chip, nval);
  671. spin_unlock_irqrestore(&chip->reg_lock, flags);
  672. return change;
  673. }
  674. static struct snd_kcontrol_new snd_sb16_dma_control = {
  675. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  676. .name = "16-bit DMA Allocation",
  677. .info = snd_sb16_dma_control_info,
  678. .get = snd_sb16_dma_control_get,
  679. .put = snd_sb16_dma_control_put
  680. };
  681. /*
  682. * Initialization part
  683. */
  684. int snd_sb16dsp_configure(struct snd_sb * chip)
  685. {
  686. unsigned long flags;
  687. unsigned char irqreg = 0, dmareg = 0, mpureg;
  688. unsigned char realirq, realdma, realmpureg;
  689. /* note: mpu register should be present only on SB16 Vibra soundcards */
  690. // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16);
  691. spin_lock_irqsave(&chip->mixer_lock, flags);
  692. mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
  693. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  694. switch (chip->irq) {
  695. case 2:
  696. case 9:
  697. irqreg |= SB_IRQSETUP_IRQ9;
  698. break;
  699. case 5:
  700. irqreg |= SB_IRQSETUP_IRQ5;
  701. break;
  702. case 7:
  703. irqreg |= SB_IRQSETUP_IRQ7;
  704. break;
  705. case 10:
  706. irqreg |= SB_IRQSETUP_IRQ10;
  707. break;
  708. default:
  709. return -EINVAL;
  710. }
  711. if (chip->dma8 >= 0) {
  712. switch (chip->dma8) {
  713. case 0:
  714. dmareg |= SB_DMASETUP_DMA0;
  715. break;
  716. case 1:
  717. dmareg |= SB_DMASETUP_DMA1;
  718. break;
  719. case 3:
  720. dmareg |= SB_DMASETUP_DMA3;
  721. break;
  722. default:
  723. return -EINVAL;
  724. }
  725. }
  726. if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
  727. switch (chip->dma16) {
  728. case 5:
  729. dmareg |= SB_DMASETUP_DMA5;
  730. break;
  731. case 6:
  732. dmareg |= SB_DMASETUP_DMA6;
  733. break;
  734. case 7:
  735. dmareg |= SB_DMASETUP_DMA7;
  736. break;
  737. default:
  738. return -EINVAL;
  739. }
  740. }
  741. switch (chip->mpu_port) {
  742. case 0x300:
  743. mpureg |= 0x04;
  744. break;
  745. case 0x330:
  746. mpureg |= 0x00;
  747. break;
  748. default:
  749. mpureg |= 0x02; /* disable MPU */
  750. }
  751. spin_lock_irqsave(&chip->mixer_lock, flags);
  752. snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
  753. realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
  754. snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
  755. realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
  756. snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
  757. realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
  758. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  759. if ((~realirq) & irqreg || (~realdma) & dmareg) {
  760. snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port);
  761. snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg);
  762. snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg);
  763. return -ENODEV;
  764. }
  765. return 0;
  766. }
  767. static struct snd_pcm_ops snd_sb16_playback_ops = {
  768. .open = snd_sb16_playback_open,
  769. .close = snd_sb16_playback_close,
  770. .ioctl = snd_pcm_lib_ioctl,
  771. .hw_params = snd_sb16_hw_params,
  772. .hw_free = snd_sb16_hw_free,
  773. .prepare = snd_sb16_playback_prepare,
  774. .trigger = snd_sb16_playback_trigger,
  775. .pointer = snd_sb16_playback_pointer,
  776. };
  777. static struct snd_pcm_ops snd_sb16_capture_ops = {
  778. .open = snd_sb16_capture_open,
  779. .close = snd_sb16_capture_close,
  780. .ioctl = snd_pcm_lib_ioctl,
  781. .hw_params = snd_sb16_hw_params,
  782. .hw_free = snd_sb16_hw_free,
  783. .prepare = snd_sb16_capture_prepare,
  784. .trigger = snd_sb16_capture_trigger,
  785. .pointer = snd_sb16_capture_pointer,
  786. };
  787. int snd_sb16dsp_pcm(struct snd_sb * chip, int device, struct snd_pcm ** rpcm)
  788. {
  789. struct snd_card *card = chip->card;
  790. struct snd_pcm *pcm;
  791. int err;
  792. if (rpcm)
  793. *rpcm = NULL;
  794. if ((err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm)) < 0)
  795. return err;
  796. sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
  797. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  798. pcm->private_data = chip;
  799. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
  800. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
  801. if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
  802. snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
  803. else
  804. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  805. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  806. snd_dma_isa_data(),
  807. 64*1024, 128*1024);
  808. if (rpcm)
  809. *rpcm = pcm;
  810. return 0;
  811. }
  812. const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
  813. {
  814. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  815. &snd_sb16_playback_ops : &snd_sb16_capture_ops;
  816. }
  817. EXPORT_SYMBOL(snd_sb16dsp_pcm);
  818. EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
  819. EXPORT_SYMBOL(snd_sb16dsp_configure);
  820. EXPORT_SYMBOL(snd_sb16dsp_interrupt);
  821. /*
  822. * INIT part
  823. */
  824. static int __init alsa_sb16_init(void)
  825. {
  826. return 0;
  827. }
  828. static void __exit alsa_sb16_exit(void)
  829. {
  830. }
  831. module_init(alsa_sb16_init)
  832. module_exit(alsa_sb16_exit)