sdhci-pci.c 17 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/mmc/host.h>
  19. #include <asm/scatterlist.h>
  20. #include <asm/io.h>
  21. #include "sdhci.h"
  22. /*
  23. * PCI registers
  24. */
  25. #define PCI_SDHCI_IFPIO 0x00
  26. #define PCI_SDHCI_IFDMA 0x01
  27. #define PCI_SDHCI_IFVENDOR 0x02
  28. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  29. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  30. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  31. #define MAX_SLOTS 8
  32. struct sdhci_pci_chip;
  33. struct sdhci_pci_slot;
  34. struct sdhci_pci_fixes {
  35. unsigned int quirks;
  36. int (*probe)(struct sdhci_pci_chip*);
  37. int (*probe_slot)(struct sdhci_pci_slot*);
  38. void (*remove_slot)(struct sdhci_pci_slot*, int);
  39. int (*suspend)(struct sdhci_pci_chip*,
  40. pm_message_t);
  41. int (*resume)(struct sdhci_pci_chip*);
  42. };
  43. struct sdhci_pci_slot {
  44. struct sdhci_pci_chip *chip;
  45. struct sdhci_host *host;
  46. int pci_bar;
  47. };
  48. struct sdhci_pci_chip {
  49. struct pci_dev *pdev;
  50. unsigned int quirks;
  51. const struct sdhci_pci_fixes *fixes;
  52. int num_slots; /* Slots on controller */
  53. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  54. };
  55. /*****************************************************************************\
  56. * *
  57. * Hardware specific quirk handling *
  58. * *
  59. \*****************************************************************************/
  60. static int ricoh_probe(struct sdhci_pci_chip *chip)
  61. {
  62. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM)
  63. chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET;
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  65. chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  66. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  67. return 0;
  68. }
  69. static const struct sdhci_pci_fixes sdhci_ricoh = {
  70. .probe = ricoh_probe,
  71. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR,
  72. };
  73. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  74. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  75. SDHCI_QUIRK_BROKEN_DMA,
  76. };
  77. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  78. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  79. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  80. SDHCI_QUIRK_BROKEN_DMA,
  81. };
  82. static const struct sdhci_pci_fixes sdhci_cafe = {
  83. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  84. SDHCI_QUIRK_NO_BUSY_IRQ |
  85. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  86. };
  87. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  88. {
  89. u8 scratch;
  90. int ret;
  91. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  92. if (ret)
  93. return ret;
  94. /*
  95. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  96. * [bit 1:2] and enable over current debouncing [bit 6].
  97. */
  98. if (on)
  99. scratch |= 0x47;
  100. else
  101. scratch &= ~0x47;
  102. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  103. if (ret)
  104. return ret;
  105. return 0;
  106. }
  107. static int jmicron_probe(struct sdhci_pci_chip *chip)
  108. {
  109. int ret;
  110. if (chip->pdev->revision == 0) {
  111. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  112. SDHCI_QUIRK_32BIT_DMA_SIZE |
  113. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  114. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  115. SDHCI_QUIRK_BROKEN_SMALL_PIO;
  116. }
  117. /*
  118. * JMicron chips can have two interfaces to the same hardware
  119. * in order to work around limitations in Microsoft's driver.
  120. * We need to make sure we only bind to one of them.
  121. *
  122. * This code assumes two things:
  123. *
  124. * 1. The PCI code adds subfunctions in order.
  125. *
  126. * 2. The MMC interface has a lower subfunction number
  127. * than the SD interface.
  128. */
  129. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  130. struct pci_dev *sd_dev;
  131. sd_dev = NULL;
  132. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  133. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  134. if ((PCI_SLOT(chip->pdev->devfn) ==
  135. PCI_SLOT(sd_dev->devfn)) &&
  136. (chip->pdev->bus == sd_dev->bus))
  137. break;
  138. }
  139. if (sd_dev) {
  140. pci_dev_put(sd_dev);
  141. dev_info(&chip->pdev->dev, "Refusing to bind to "
  142. "secondary interface.\n");
  143. return -ENODEV;
  144. }
  145. }
  146. /*
  147. * JMicron chips need a bit of a nudge to enable the power
  148. * output pins.
  149. */
  150. ret = jmicron_pmos(chip, 1);
  151. if (ret) {
  152. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  153. return ret;
  154. }
  155. return 0;
  156. }
  157. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  158. {
  159. u8 scratch;
  160. scratch = readb(host->ioaddr + 0xC0);
  161. if (on)
  162. scratch |= 0x01;
  163. else
  164. scratch &= ~0x01;
  165. writeb(scratch, host->ioaddr + 0xC0);
  166. }
  167. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  168. {
  169. if (slot->chip->pdev->revision == 0) {
  170. u16 version;
  171. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  172. version = (version & SDHCI_VENDOR_VER_MASK) >>
  173. SDHCI_VENDOR_VER_SHIFT;
  174. /*
  175. * Older versions of the chip have lots of nasty glitches
  176. * in the ADMA engine. It's best just to avoid it
  177. * completely.
  178. */
  179. if (version < 0xAC)
  180. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  181. }
  182. /*
  183. * The secondary interface requires a bit set to get the
  184. * interrupts.
  185. */
  186. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  187. jmicron_enable_mmc(slot->host, 1);
  188. return 0;
  189. }
  190. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  191. {
  192. if (dead)
  193. return;
  194. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  195. jmicron_enable_mmc(slot->host, 0);
  196. }
  197. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  198. {
  199. int i;
  200. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  201. for (i = 0;i < chip->num_slots;i++)
  202. jmicron_enable_mmc(chip->slots[i]->host, 0);
  203. }
  204. return 0;
  205. }
  206. static int jmicron_resume(struct sdhci_pci_chip *chip)
  207. {
  208. int ret, i;
  209. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  210. for (i = 0;i < chip->num_slots;i++)
  211. jmicron_enable_mmc(chip->slots[i]->host, 1);
  212. }
  213. ret = jmicron_pmos(chip, 1);
  214. if (ret) {
  215. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  216. return ret;
  217. }
  218. return 0;
  219. }
  220. static const struct sdhci_pci_fixes sdhci_jmicron = {
  221. .probe = jmicron_probe,
  222. .probe_slot = jmicron_probe_slot,
  223. .remove_slot = jmicron_remove_slot,
  224. .suspend = jmicron_suspend,
  225. .resume = jmicron_resume,
  226. };
  227. static int via_probe(struct sdhci_pci_chip *chip)
  228. {
  229. if (chip->pdev->revision == 0x10)
  230. chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
  231. return 0;
  232. }
  233. static const struct sdhci_pci_fixes sdhci_via = {
  234. .probe = via_probe,
  235. };
  236. static const struct pci_device_id pci_ids[] __devinitdata = {
  237. {
  238. .vendor = PCI_VENDOR_ID_RICOH,
  239. .device = PCI_DEVICE_ID_RICOH_R5C822,
  240. .subvendor = PCI_ANY_ID,
  241. .subdevice = PCI_ANY_ID,
  242. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  243. },
  244. {
  245. .vendor = PCI_VENDOR_ID_ENE,
  246. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  247. .subvendor = PCI_ANY_ID,
  248. .subdevice = PCI_ANY_ID,
  249. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  250. },
  251. {
  252. .vendor = PCI_VENDOR_ID_ENE,
  253. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  254. .subvendor = PCI_ANY_ID,
  255. .subdevice = PCI_ANY_ID,
  256. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  257. },
  258. {
  259. .vendor = PCI_VENDOR_ID_ENE,
  260. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  261. .subvendor = PCI_ANY_ID,
  262. .subdevice = PCI_ANY_ID,
  263. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  264. },
  265. {
  266. .vendor = PCI_VENDOR_ID_ENE,
  267. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  268. .subvendor = PCI_ANY_ID,
  269. .subdevice = PCI_ANY_ID,
  270. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  271. },
  272. {
  273. .vendor = PCI_VENDOR_ID_MARVELL,
  274. .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
  275. .subvendor = PCI_ANY_ID,
  276. .subdevice = PCI_ANY_ID,
  277. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  278. },
  279. {
  280. .vendor = PCI_VENDOR_ID_JMICRON,
  281. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  282. .subvendor = PCI_ANY_ID,
  283. .subdevice = PCI_ANY_ID,
  284. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  285. },
  286. {
  287. .vendor = PCI_VENDOR_ID_JMICRON,
  288. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  289. .subvendor = PCI_ANY_ID,
  290. .subdevice = PCI_ANY_ID,
  291. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  292. },
  293. {
  294. .vendor = PCI_VENDOR_ID_VIA,
  295. .device = 0x95d0,
  296. .subvendor = PCI_ANY_ID,
  297. .subdevice = PCI_ANY_ID,
  298. .driver_data = (kernel_ulong_t)&sdhci_via,
  299. },
  300. { /* Generic SD host controller */
  301. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  302. },
  303. { /* end: all zeroes */ },
  304. };
  305. MODULE_DEVICE_TABLE(pci, pci_ids);
  306. /*****************************************************************************\
  307. * *
  308. * SDHCI core callbacks *
  309. * *
  310. \*****************************************************************************/
  311. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  312. {
  313. struct sdhci_pci_slot *slot;
  314. struct pci_dev *pdev;
  315. int ret;
  316. slot = sdhci_priv(host);
  317. pdev = slot->chip->pdev;
  318. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  319. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  320. (host->flags & SDHCI_USE_SDMA)) {
  321. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  322. "doesn't fully claim to support it.\n");
  323. }
  324. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  325. if (ret)
  326. return ret;
  327. pci_set_master(pdev);
  328. return 0;
  329. }
  330. static struct sdhci_ops sdhci_pci_ops = {
  331. .enable_dma = sdhci_pci_enable_dma,
  332. };
  333. /*****************************************************************************\
  334. * *
  335. * Suspend/resume *
  336. * *
  337. \*****************************************************************************/
  338. #ifdef CONFIG_PM
  339. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  340. {
  341. struct sdhci_pci_chip *chip;
  342. struct sdhci_pci_slot *slot;
  343. int i, ret;
  344. chip = pci_get_drvdata(pdev);
  345. if (!chip)
  346. return 0;
  347. for (i = 0;i < chip->num_slots;i++) {
  348. slot = chip->slots[i];
  349. if (!slot)
  350. continue;
  351. ret = sdhci_suspend_host(slot->host, state);
  352. if (ret) {
  353. for (i--;i >= 0;i--)
  354. sdhci_resume_host(chip->slots[i]->host);
  355. return ret;
  356. }
  357. }
  358. if (chip->fixes && chip->fixes->suspend) {
  359. ret = chip->fixes->suspend(chip, state);
  360. if (ret) {
  361. for (i = chip->num_slots - 1;i >= 0;i--)
  362. sdhci_resume_host(chip->slots[i]->host);
  363. return ret;
  364. }
  365. }
  366. pci_save_state(pdev);
  367. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  368. pci_disable_device(pdev);
  369. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  370. return 0;
  371. }
  372. static int sdhci_pci_resume (struct pci_dev *pdev)
  373. {
  374. struct sdhci_pci_chip *chip;
  375. struct sdhci_pci_slot *slot;
  376. int i, ret;
  377. chip = pci_get_drvdata(pdev);
  378. if (!chip)
  379. return 0;
  380. pci_set_power_state(pdev, PCI_D0);
  381. pci_restore_state(pdev);
  382. ret = pci_enable_device(pdev);
  383. if (ret)
  384. return ret;
  385. if (chip->fixes && chip->fixes->resume) {
  386. ret = chip->fixes->resume(chip);
  387. if (ret)
  388. return ret;
  389. }
  390. for (i = 0;i < chip->num_slots;i++) {
  391. slot = chip->slots[i];
  392. if (!slot)
  393. continue;
  394. ret = sdhci_resume_host(slot->host);
  395. if (ret)
  396. return ret;
  397. }
  398. return 0;
  399. }
  400. #else /* CONFIG_PM */
  401. #define sdhci_pci_suspend NULL
  402. #define sdhci_pci_resume NULL
  403. #endif /* CONFIG_PM */
  404. /*****************************************************************************\
  405. * *
  406. * Device probing/removal *
  407. * *
  408. \*****************************************************************************/
  409. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  410. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  411. {
  412. struct sdhci_pci_slot *slot;
  413. struct sdhci_host *host;
  414. resource_size_t addr;
  415. int ret;
  416. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  417. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  418. return ERR_PTR(-ENODEV);
  419. }
  420. if (pci_resource_len(pdev, bar) != 0x100) {
  421. dev_err(&pdev->dev, "Invalid iomem size. You may "
  422. "experience problems.\n");
  423. }
  424. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  425. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  426. return ERR_PTR(-ENODEV);
  427. }
  428. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  429. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  430. return ERR_PTR(-ENODEV);
  431. }
  432. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  433. if (IS_ERR(host)) {
  434. dev_err(&pdev->dev, "cannot allocate host\n");
  435. return ERR_PTR(PTR_ERR(host));
  436. }
  437. slot = sdhci_priv(host);
  438. slot->chip = chip;
  439. slot->host = host;
  440. slot->pci_bar = bar;
  441. host->hw_name = "PCI";
  442. host->ops = &sdhci_pci_ops;
  443. host->quirks = chip->quirks;
  444. host->irq = pdev->irq;
  445. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  446. if (ret) {
  447. dev_err(&pdev->dev, "cannot request region\n");
  448. goto free;
  449. }
  450. addr = pci_resource_start(pdev, bar);
  451. host->ioaddr = pci_ioremap_bar(pdev, bar);
  452. if (!host->ioaddr) {
  453. dev_err(&pdev->dev, "failed to remap registers\n");
  454. goto release;
  455. }
  456. if (chip->fixes && chip->fixes->probe_slot) {
  457. ret = chip->fixes->probe_slot(slot);
  458. if (ret)
  459. goto unmap;
  460. }
  461. ret = sdhci_add_host(host);
  462. if (ret)
  463. goto remove;
  464. return slot;
  465. remove:
  466. if (chip->fixes && chip->fixes->remove_slot)
  467. chip->fixes->remove_slot(slot, 0);
  468. unmap:
  469. iounmap(host->ioaddr);
  470. release:
  471. pci_release_region(pdev, bar);
  472. free:
  473. sdhci_free_host(host);
  474. return ERR_PTR(ret);
  475. }
  476. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  477. {
  478. int dead;
  479. u32 scratch;
  480. dead = 0;
  481. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  482. if (scratch == (u32)-1)
  483. dead = 1;
  484. sdhci_remove_host(slot->host, dead);
  485. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  486. slot->chip->fixes->remove_slot(slot, dead);
  487. pci_release_region(slot->chip->pdev, slot->pci_bar);
  488. sdhci_free_host(slot->host);
  489. }
  490. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  491. const struct pci_device_id *ent)
  492. {
  493. struct sdhci_pci_chip *chip;
  494. struct sdhci_pci_slot *slot;
  495. u8 slots, rev, first_bar;
  496. int ret, i;
  497. BUG_ON(pdev == NULL);
  498. BUG_ON(ent == NULL);
  499. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  500. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  501. (int)pdev->vendor, (int)pdev->device, (int)rev);
  502. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  503. if (ret)
  504. return ret;
  505. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  506. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  507. if (slots == 0)
  508. return -ENODEV;
  509. BUG_ON(slots > MAX_SLOTS);
  510. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  511. if (ret)
  512. return ret;
  513. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  514. if (first_bar > 5) {
  515. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  516. return -ENODEV;
  517. }
  518. ret = pci_enable_device(pdev);
  519. if (ret)
  520. return ret;
  521. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  522. if (!chip) {
  523. ret = -ENOMEM;
  524. goto err;
  525. }
  526. chip->pdev = pdev;
  527. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  528. if (chip->fixes)
  529. chip->quirks = chip->fixes->quirks;
  530. chip->num_slots = slots;
  531. pci_set_drvdata(pdev, chip);
  532. if (chip->fixes && chip->fixes->probe) {
  533. ret = chip->fixes->probe(chip);
  534. if (ret)
  535. goto free;
  536. }
  537. for (i = 0;i < slots;i++) {
  538. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  539. if (IS_ERR(slot)) {
  540. for (i--;i >= 0;i--)
  541. sdhci_pci_remove_slot(chip->slots[i]);
  542. ret = PTR_ERR(slot);
  543. goto free;
  544. }
  545. chip->slots[i] = slot;
  546. }
  547. return 0;
  548. free:
  549. pci_set_drvdata(pdev, NULL);
  550. kfree(chip);
  551. err:
  552. pci_disable_device(pdev);
  553. return ret;
  554. }
  555. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  556. {
  557. int i;
  558. struct sdhci_pci_chip *chip;
  559. chip = pci_get_drvdata(pdev);
  560. if (chip) {
  561. for (i = 0;i < chip->num_slots; i++)
  562. sdhci_pci_remove_slot(chip->slots[i]);
  563. pci_set_drvdata(pdev, NULL);
  564. kfree(chip);
  565. }
  566. pci_disable_device(pdev);
  567. }
  568. static struct pci_driver sdhci_driver = {
  569. .name = "sdhci-pci",
  570. .id_table = pci_ids,
  571. .probe = sdhci_pci_probe,
  572. .remove = __devexit_p(sdhci_pci_remove),
  573. .suspend = sdhci_pci_suspend,
  574. .resume = sdhci_pci_resume,
  575. };
  576. /*****************************************************************************\
  577. * *
  578. * Driver init/exit *
  579. * *
  580. \*****************************************************************************/
  581. static int __init sdhci_drv_init(void)
  582. {
  583. return pci_register_driver(&sdhci_driver);
  584. }
  585. static void __exit sdhci_drv_exit(void)
  586. {
  587. pci_unregister_driver(&sdhci_driver);
  588. }
  589. module_init(sdhci_drv_init);
  590. module_exit(sdhci_drv_exit);
  591. MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
  592. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  593. MODULE_LICENSE("GPL");