ov7x10.c 8.1 KB

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  1. /* OmniVision OV7610/OV7110 Camera Chip Support Code
  2. *
  3. * Copyright (c) 1999-2004 Mark McClelland <mark@alpha.dyndns.org>
  4. * http://alpha.dyndns.org/ov511/
  5. *
  6. * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version. NO WARRANTY OF ANY KIND is expressed or implied.
  12. */
  13. #define DEBUG
  14. #include <linux/slab.h>
  15. #include "ovcamchip_priv.h"
  16. /* Registers */
  17. #define REG_GAIN 0x00 /* gain [5:0] */
  18. #define REG_BLUE 0x01 /* blue channel balance */
  19. #define REG_RED 0x02 /* red channel balance */
  20. #define REG_SAT 0x03 /* saturation */
  21. #define REG_CNT 0x05 /* Y contrast */
  22. #define REG_BRT 0x06 /* Y brightness */
  23. #define REG_BLUE_BIAS 0x0C /* blue channel bias [5:0] */
  24. #define REG_RED_BIAS 0x0D /* red channel bias [5:0] */
  25. #define REG_GAMMA_COEFF 0x0E /* gamma settings */
  26. #define REG_WB_RANGE 0x0F /* AEC/ALC/S-AWB settings */
  27. #define REG_EXP 0x10 /* manual exposure setting */
  28. #define REG_CLOCK 0x11 /* polarity/clock prescaler */
  29. #define REG_FIELD_DIVIDE 0x16 /* field interval/mode settings */
  30. #define REG_HWIN_START 0x17 /* horizontal window start */
  31. #define REG_HWIN_END 0x18 /* horizontal window end */
  32. #define REG_VWIN_START 0x19 /* vertical window start */
  33. #define REG_VWIN_END 0x1A /* vertical window end */
  34. #define REG_PIXEL_SHIFT 0x1B /* pixel shift */
  35. #define REG_YOFFSET 0x21 /* Y channel offset */
  36. #define REG_UOFFSET 0x22 /* U channel offset */
  37. #define REG_ECW 0x24 /* exposure white level for AEC */
  38. #define REG_ECB 0x25 /* exposure black level for AEC */
  39. #define REG_FRAMERATE_H 0x2A /* frame rate MSB + misc */
  40. #define REG_FRAMERATE_L 0x2B /* frame rate LSB */
  41. #define REG_ALC 0x2C /* Auto Level Control settings */
  42. #define REG_VOFFSET 0x2E /* V channel offset adjustment */
  43. #define REG_ARRAY_BIAS 0x2F /* array bias -- don't change */
  44. #define REG_YGAMMA 0x33 /* misc gamma settings [7:6] */
  45. #define REG_BIAS_ADJUST 0x34 /* misc bias settings */
  46. /* Window parameters */
  47. #define HWSBASE 0x38
  48. #define HWEBASE 0x3a
  49. #define VWSBASE 0x05
  50. #define VWEBASE 0x05
  51. struct ov7x10 {
  52. int auto_brt;
  53. int auto_exp;
  54. int bandfilt;
  55. int mirror;
  56. };
  57. /* Lawrence Glaister <lg@jfm.bc.ca> reports:
  58. *
  59. * Register 0x0f in the 7610 has the following effects:
  60. *
  61. * 0x85 (AEC method 1): Best overall, good contrast range
  62. * 0x45 (AEC method 2): Very overexposed
  63. * 0xa5 (spec sheet default): Ok, but the black level is
  64. * shifted resulting in loss of contrast
  65. * 0x05 (old driver setting): very overexposed, too much
  66. * contrast
  67. */
  68. static struct ovcamchip_regvals regvals_init_7x10[] = {
  69. { 0x10, 0xff },
  70. { 0x16, 0x03 },
  71. { 0x28, 0x24 },
  72. { 0x2b, 0xac },
  73. { 0x12, 0x00 },
  74. { 0x38, 0x81 },
  75. { 0x28, 0x24 }, /* 0c */
  76. { 0x0f, 0x85 }, /* lg's setting */
  77. { 0x15, 0x01 },
  78. { 0x20, 0x1c },
  79. { 0x23, 0x2a },
  80. { 0x24, 0x10 },
  81. { 0x25, 0x8a },
  82. { 0x26, 0xa2 },
  83. { 0x27, 0xc2 },
  84. { 0x2a, 0x04 },
  85. { 0x2c, 0xfe },
  86. { 0x2d, 0x93 },
  87. { 0x30, 0x71 },
  88. { 0x31, 0x60 },
  89. { 0x32, 0x26 },
  90. { 0x33, 0x20 },
  91. { 0x34, 0x48 },
  92. { 0x12, 0x24 },
  93. { 0x11, 0x01 },
  94. { 0x0c, 0x24 },
  95. { 0x0d, 0x24 },
  96. { 0xff, 0xff }, /* END MARKER */
  97. };
  98. /* This initializes the OV7x10 camera chip and relevant variables. */
  99. static int ov7x10_init(struct i2c_client *c)
  100. {
  101. struct ovcamchip *ov = i2c_get_clientdata(c);
  102. struct ov7x10 *s;
  103. int rc;
  104. DDEBUG(4, &c->dev, "entered");
  105. rc = ov_write_regvals(c, regvals_init_7x10);
  106. if (rc < 0)
  107. return rc;
  108. ov->spriv = s = kzalloc(sizeof *s, GFP_KERNEL);
  109. if (!s)
  110. return -ENOMEM;
  111. s->auto_brt = 1;
  112. s->auto_exp = 1;
  113. return rc;
  114. }
  115. static int ov7x10_free(struct i2c_client *c)
  116. {
  117. struct ovcamchip *ov = i2c_get_clientdata(c);
  118. kfree(ov->spriv);
  119. return 0;
  120. }
  121. static int ov7x10_set_control(struct i2c_client *c,
  122. struct ovcamchip_control *ctl)
  123. {
  124. struct ovcamchip *ov = i2c_get_clientdata(c);
  125. struct ov7x10 *s = ov->spriv;
  126. int rc;
  127. int v = ctl->value;
  128. switch (ctl->id) {
  129. case OVCAMCHIP_CID_CONT:
  130. rc = ov_write(c, REG_CNT, v >> 8);
  131. break;
  132. case OVCAMCHIP_CID_BRIGHT:
  133. rc = ov_write(c, REG_BRT, v >> 8);
  134. break;
  135. case OVCAMCHIP_CID_SAT:
  136. rc = ov_write(c, REG_SAT, v >> 8);
  137. break;
  138. case OVCAMCHIP_CID_HUE:
  139. rc = ov_write(c, REG_RED, 0xFF - (v >> 8));
  140. if (rc < 0)
  141. goto out;
  142. rc = ov_write(c, REG_BLUE, v >> 8);
  143. break;
  144. case OVCAMCHIP_CID_EXP:
  145. rc = ov_write(c, REG_EXP, v);
  146. break;
  147. case OVCAMCHIP_CID_FREQ:
  148. {
  149. int sixty = (v == 60);
  150. rc = ov_write_mask(c, 0x2a, sixty?0x00:0x80, 0x80);
  151. if (rc < 0)
  152. goto out;
  153. rc = ov_write(c, 0x2b, sixty?0x00:0xac);
  154. if (rc < 0)
  155. goto out;
  156. rc = ov_write_mask(c, 0x13, 0x10, 0x10);
  157. if (rc < 0)
  158. goto out;
  159. rc = ov_write_mask(c, 0x13, 0x00, 0x10);
  160. break;
  161. }
  162. case OVCAMCHIP_CID_BANDFILT:
  163. rc = ov_write_mask(c, 0x2d, v?0x04:0x00, 0x04);
  164. s->bandfilt = v;
  165. break;
  166. case OVCAMCHIP_CID_AUTOBRIGHT:
  167. rc = ov_write_mask(c, 0x2d, v?0x10:0x00, 0x10);
  168. s->auto_brt = v;
  169. break;
  170. case OVCAMCHIP_CID_AUTOEXP:
  171. rc = ov_write_mask(c, 0x29, v?0x00:0x80, 0x80);
  172. s->auto_exp = v;
  173. break;
  174. case OVCAMCHIP_CID_MIRROR:
  175. rc = ov_write_mask(c, 0x12, v?0x40:0x00, 0x40);
  176. s->mirror = v;
  177. break;
  178. default:
  179. DDEBUG(2, &c->dev, "control not supported: %d", ctl->id);
  180. return -EPERM;
  181. }
  182. out:
  183. DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, v, rc);
  184. return rc;
  185. }
  186. static int ov7x10_get_control(struct i2c_client *c,
  187. struct ovcamchip_control *ctl)
  188. {
  189. struct ovcamchip *ov = i2c_get_clientdata(c);
  190. struct ov7x10 *s = ov->spriv;
  191. int rc = 0;
  192. unsigned char val = 0;
  193. switch (ctl->id) {
  194. case OVCAMCHIP_CID_CONT:
  195. rc = ov_read(c, REG_CNT, &val);
  196. ctl->value = val << 8;
  197. break;
  198. case OVCAMCHIP_CID_BRIGHT:
  199. rc = ov_read(c, REG_BRT, &val);
  200. ctl->value = val << 8;
  201. break;
  202. case OVCAMCHIP_CID_SAT:
  203. rc = ov_read(c, REG_SAT, &val);
  204. ctl->value = val << 8;
  205. break;
  206. case OVCAMCHIP_CID_HUE:
  207. rc = ov_read(c, REG_BLUE, &val);
  208. ctl->value = val << 8;
  209. break;
  210. case OVCAMCHIP_CID_EXP:
  211. rc = ov_read(c, REG_EXP, &val);
  212. ctl->value = val;
  213. break;
  214. case OVCAMCHIP_CID_BANDFILT:
  215. ctl->value = s->bandfilt;
  216. break;
  217. case OVCAMCHIP_CID_AUTOBRIGHT:
  218. ctl->value = s->auto_brt;
  219. break;
  220. case OVCAMCHIP_CID_AUTOEXP:
  221. ctl->value = s->auto_exp;
  222. break;
  223. case OVCAMCHIP_CID_MIRROR:
  224. ctl->value = s->mirror;
  225. break;
  226. default:
  227. DDEBUG(2, &c->dev, "control not supported: %d", ctl->id);
  228. return -EPERM;
  229. }
  230. DDEBUG(3, &c->dev, "id=%d, arg=%d, rc=%d", ctl->id, ctl->value, rc);
  231. return rc;
  232. }
  233. static int ov7x10_mode_init(struct i2c_client *c, struct ovcamchip_window *win)
  234. {
  235. int qvga = win->quarter;
  236. /******** QVGA-specific regs ********/
  237. ov_write(c, 0x14, qvga?0x24:0x04);
  238. /******** Palette-specific regs ********/
  239. if (win->format == VIDEO_PALETTE_GREY) {
  240. ov_write_mask(c, 0x0e, 0x40, 0x40);
  241. ov_write_mask(c, 0x13, 0x20, 0x20);
  242. } else {
  243. ov_write_mask(c, 0x0e, 0x00, 0x40);
  244. ov_write_mask(c, 0x13, 0x00, 0x20);
  245. }
  246. /******** Clock programming ********/
  247. ov_write(c, 0x11, win->clockdiv);
  248. /******** Resolution-specific ********/
  249. if (win->width == 640 && win->height == 480)
  250. ov_write(c, 0x35, 0x9e);
  251. else
  252. ov_write(c, 0x35, 0x1e);
  253. return 0;
  254. }
  255. static int ov7x10_set_window(struct i2c_client *c, struct ovcamchip_window *win)
  256. {
  257. int ret, hwscale, vwscale;
  258. ret = ov7x10_mode_init(c, win);
  259. if (ret < 0)
  260. return ret;
  261. if (win->quarter) {
  262. hwscale = 1;
  263. vwscale = 0;
  264. } else {
  265. hwscale = 2;
  266. vwscale = 1;
  267. }
  268. ov_write(c, 0x17, HWSBASE + (win->x >> hwscale));
  269. ov_write(c, 0x18, HWEBASE + ((win->x + win->width) >> hwscale));
  270. ov_write(c, 0x19, VWSBASE + (win->y >> vwscale));
  271. ov_write(c, 0x1a, VWEBASE + ((win->y + win->height) >> vwscale));
  272. return 0;
  273. }
  274. static int ov7x10_command(struct i2c_client *c, unsigned int cmd, void *arg)
  275. {
  276. switch (cmd) {
  277. case OVCAMCHIP_CMD_S_CTRL:
  278. return ov7x10_set_control(c, arg);
  279. case OVCAMCHIP_CMD_G_CTRL:
  280. return ov7x10_get_control(c, arg);
  281. case OVCAMCHIP_CMD_S_MODE:
  282. return ov7x10_set_window(c, arg);
  283. default:
  284. DDEBUG(2, &c->dev, "command not supported: %d", cmd);
  285. return -ENOIOCTLCMD;
  286. }
  287. }
  288. struct ovcamchip_ops ov7x10_ops = {
  289. .init = ov7x10_init,
  290. .free = ov7x10_free,
  291. .command = ov7x10_command,
  292. };