mx3_camera.c 34 KB

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  1. /*
  2. * V4L2 Driver for i.MX3x camera host
  3. *
  4. * Copyright (C) 2008
  5. * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/version.h>
  14. #include <linux/videodev2.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/clk.h>
  17. #include <linux/vmalloc.h>
  18. #include <linux/interrupt.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-dev.h>
  21. #include <media/videobuf-dma-contig.h>
  22. #include <media/soc_camera.h>
  23. #include <mach/ipu.h>
  24. #include <mach/mx3_camera.h>
  25. #define MX3_CAM_DRV_NAME "mx3-camera"
  26. /* CMOS Sensor Interface Registers */
  27. #define CSI_REG_START 0x60
  28. #define CSI_SENS_CONF (0x60 - CSI_REG_START)
  29. #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
  30. #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
  31. #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
  32. #define CSI_TST_CTRL (0x70 - CSI_REG_START)
  33. #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
  34. #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
  35. #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
  36. #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
  37. #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
  38. #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
  39. #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
  40. #define CSI_SENS_CONF_DATA_POL_SHIFT 2
  41. #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
  42. #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
  43. #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
  44. #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
  45. #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
  46. #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
  47. #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
  48. #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  49. #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  50. #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  51. #define MAX_VIDEO_MEM 16
  52. struct mx3_camera_buffer {
  53. /* common v4l buffer stuff -- must be first */
  54. struct videobuf_buffer vb;
  55. const struct soc_camera_data_format *fmt;
  56. /* One descriptot per scatterlist (per frame) */
  57. struct dma_async_tx_descriptor *txd;
  58. /* We have to "build" a scatterlist ourselves - one element per frame */
  59. struct scatterlist sg;
  60. };
  61. /**
  62. * struct mx3_camera_dev - i.MX3x camera (CSI) object
  63. * @dev: camera device, to which the coherent buffer is attached
  64. * @icd: currently attached camera sensor
  65. * @clk: pointer to clock
  66. * @base: remapped register base address
  67. * @pdata: platform data
  68. * @platform_flags: platform flags
  69. * @mclk: master clock frequency in Hz
  70. * @capture: list of capture videobuffers
  71. * @lock: protects video buffer lists
  72. * @active: active video buffer
  73. * @idmac_channel: array of pointers to IPU DMAC DMA channels
  74. * @soc_host: embedded soc_host object
  75. */
  76. struct mx3_camera_dev {
  77. /*
  78. * i.MX3x is only supposed to handle one camera on its Camera Sensor
  79. * Interface. If anyone ever builds hardware to enable more than one
  80. * camera _simultaneously_, they will have to modify this driver too
  81. */
  82. struct soc_camera_device *icd;
  83. struct clk *clk;
  84. void __iomem *base;
  85. struct mx3_camera_pdata *pdata;
  86. unsigned long platform_flags;
  87. unsigned long mclk;
  88. struct list_head capture;
  89. spinlock_t lock; /* Protects video buffer lists */
  90. struct mx3_camera_buffer *active;
  91. /* IDMAC / dmaengine interface */
  92. struct idmac_channel *idmac_channel[1]; /* We need one channel */
  93. struct soc_camera_host soc_host;
  94. };
  95. struct dma_chan_request {
  96. struct mx3_camera_dev *mx3_cam;
  97. enum ipu_channel id;
  98. };
  99. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
  100. static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
  101. {
  102. return __raw_readl(mx3->base + reg);
  103. }
  104. static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
  105. {
  106. __raw_writel(value, mx3->base + reg);
  107. }
  108. /* Called from the IPU IDMAC ISR */
  109. static void mx3_cam_dma_done(void *arg)
  110. {
  111. struct idmac_tx_desc *desc = to_tx_desc(arg);
  112. struct dma_chan *chan = desc->txd.chan;
  113. struct idmac_channel *ichannel = to_idmac_chan(chan);
  114. struct mx3_camera_dev *mx3_cam = ichannel->client;
  115. struct videobuf_buffer *vb;
  116. dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
  117. desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
  118. spin_lock(&mx3_cam->lock);
  119. if (mx3_cam->active) {
  120. vb = &mx3_cam->active->vb;
  121. list_del_init(&vb->queue);
  122. vb->state = VIDEOBUF_DONE;
  123. do_gettimeofday(&vb->ts);
  124. vb->field_count++;
  125. wake_up(&vb->done);
  126. }
  127. if (list_empty(&mx3_cam->capture)) {
  128. mx3_cam->active = NULL;
  129. spin_unlock(&mx3_cam->lock);
  130. /*
  131. * stop capture - without further buffers IPU_CHA_BUF0_RDY will
  132. * not get updated
  133. */
  134. return;
  135. }
  136. mx3_cam->active = list_entry(mx3_cam->capture.next,
  137. struct mx3_camera_buffer, vb.queue);
  138. mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
  139. spin_unlock(&mx3_cam->lock);
  140. }
  141. static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
  142. {
  143. struct soc_camera_device *icd = vq->priv_data;
  144. struct videobuf_buffer *vb = &buf->vb;
  145. struct dma_async_tx_descriptor *txd = buf->txd;
  146. struct idmac_channel *ichan;
  147. BUG_ON(in_interrupt());
  148. dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
  149. vb, vb->baddr, vb->bsize);
  150. /*
  151. * This waits until this buffer is out of danger, i.e., until it is no
  152. * longer in STATE_QUEUED or STATE_ACTIVE
  153. */
  154. videobuf_waiton(vb, 0, 0);
  155. if (txd) {
  156. ichan = to_idmac_chan(txd->chan);
  157. async_tx_ack(txd);
  158. }
  159. videobuf_dma_contig_free(vq, vb);
  160. buf->txd = NULL;
  161. vb->state = VIDEOBUF_NEEDS_INIT;
  162. }
  163. /*
  164. * Videobuf operations
  165. */
  166. /*
  167. * Calculate the __buffer__ (not data) size and number of buffers.
  168. * Called with .vb_lock held
  169. */
  170. static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
  171. unsigned int *size)
  172. {
  173. struct soc_camera_device *icd = vq->priv_data;
  174. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  175. struct mx3_camera_dev *mx3_cam = ici->priv;
  176. /*
  177. * bits-per-pixel (depth) as specified in camera's pixel format does
  178. * not necessarily match what the camera interface writes to RAM, but
  179. * it should be good enough for now.
  180. */
  181. unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
  182. if (!mx3_cam->idmac_channel[0])
  183. return -EINVAL;
  184. *size = icd->user_width * icd->user_height * bpp;
  185. if (!*count)
  186. *count = 32;
  187. if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
  188. *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
  189. return 0;
  190. }
  191. /* Called with .vb_lock held */
  192. static int mx3_videobuf_prepare(struct videobuf_queue *vq,
  193. struct videobuf_buffer *vb, enum v4l2_field field)
  194. {
  195. struct soc_camera_device *icd = vq->priv_data;
  196. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  197. struct mx3_camera_dev *mx3_cam = ici->priv;
  198. struct mx3_camera_buffer *buf =
  199. container_of(vb, struct mx3_camera_buffer, vb);
  200. /* current_fmt _must_ always be set */
  201. size_t new_size = icd->user_width * icd->user_height *
  202. ((icd->current_fmt->depth + 7) >> 3);
  203. int ret;
  204. /*
  205. * I think, in buf_prepare you only have to protect global data,
  206. * the actual buffer is yours
  207. */
  208. if (buf->fmt != icd->current_fmt ||
  209. vb->width != icd->user_width ||
  210. vb->height != icd->user_height ||
  211. vb->field != field) {
  212. buf->fmt = icd->current_fmt;
  213. vb->width = icd->user_width;
  214. vb->height = icd->user_height;
  215. vb->field = field;
  216. if (vb->state != VIDEOBUF_NEEDS_INIT)
  217. free_buffer(vq, buf);
  218. }
  219. if (vb->baddr && vb->bsize < new_size) {
  220. /* User provided buffer, but it is too small */
  221. ret = -ENOMEM;
  222. goto out;
  223. }
  224. if (vb->state == VIDEOBUF_NEEDS_INIT) {
  225. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  226. struct scatterlist *sg = &buf->sg;
  227. /*
  228. * The total size of video-buffers that will be allocated / mapped.
  229. * *size that we calculated in videobuf_setup gets assigned to
  230. * vb->bsize, and now we use the same calculation to get vb->size.
  231. */
  232. vb->size = new_size;
  233. /* This actually (allocates and) maps buffers */
  234. ret = videobuf_iolock(vq, vb, NULL);
  235. if (ret)
  236. goto fail;
  237. /*
  238. * We will have to configure the IDMAC channel. It has two slots
  239. * for DMA buffers, we shall enter the first two buffers there,
  240. * and then submit new buffers in DMA-ready interrupts
  241. */
  242. sg_init_table(sg, 1);
  243. sg_dma_address(sg) = videobuf_to_dma_contig(vb);
  244. sg_dma_len(sg) = vb->size;
  245. buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
  246. &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
  247. DMA_PREP_INTERRUPT);
  248. if (!buf->txd) {
  249. ret = -EIO;
  250. goto fail;
  251. }
  252. buf->txd->callback_param = buf->txd;
  253. buf->txd->callback = mx3_cam_dma_done;
  254. vb->state = VIDEOBUF_PREPARED;
  255. }
  256. return 0;
  257. fail:
  258. free_buffer(vq, buf);
  259. out:
  260. return ret;
  261. }
  262. static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
  263. {
  264. /* Add more formats as need arises and test possibilities appear... */
  265. switch (fourcc) {
  266. case V4L2_PIX_FMT_RGB565:
  267. return IPU_PIX_FMT_RGB565;
  268. case V4L2_PIX_FMT_RGB24:
  269. return IPU_PIX_FMT_RGB24;
  270. case V4L2_PIX_FMT_RGB332:
  271. return IPU_PIX_FMT_RGB332;
  272. case V4L2_PIX_FMT_YUV422P:
  273. return IPU_PIX_FMT_YVU422P;
  274. default:
  275. return IPU_PIX_FMT_GENERIC;
  276. }
  277. }
  278. /*
  279. * Called with .vb_lock mutex held and
  280. * under spinlock_irqsave(&mx3_cam->lock, ...)
  281. */
  282. static void mx3_videobuf_queue(struct videobuf_queue *vq,
  283. struct videobuf_buffer *vb)
  284. {
  285. struct soc_camera_device *icd = vq->priv_data;
  286. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  287. struct mx3_camera_dev *mx3_cam = ici->priv;
  288. struct mx3_camera_buffer *buf =
  289. container_of(vb, struct mx3_camera_buffer, vb);
  290. struct dma_async_tx_descriptor *txd = buf->txd;
  291. struct idmac_channel *ichan = to_idmac_chan(txd->chan);
  292. struct idmac_video_param *video = &ichan->params.video;
  293. const struct soc_camera_data_format *data_fmt = icd->current_fmt;
  294. dma_cookie_t cookie;
  295. BUG_ON(!irqs_disabled());
  296. /* This is the configuration of one sg-element */
  297. video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
  298. video->out_width = icd->user_width;
  299. video->out_height = icd->user_height;
  300. video->out_stride = icd->user_width;
  301. #ifdef DEBUG
  302. /* helps to see what DMA actually has written */
  303. memset((void *)vb->baddr, 0xaa, vb->bsize);
  304. #endif
  305. list_add_tail(&vb->queue, &mx3_cam->capture);
  306. if (!mx3_cam->active) {
  307. mx3_cam->active = buf;
  308. vb->state = VIDEOBUF_ACTIVE;
  309. } else {
  310. vb->state = VIDEOBUF_QUEUED;
  311. }
  312. spin_unlock_irq(&mx3_cam->lock);
  313. cookie = txd->tx_submit(txd);
  314. dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
  315. cookie, sg_dma_address(&buf->sg));
  316. spin_lock_irq(&mx3_cam->lock);
  317. if (cookie >= 0)
  318. return;
  319. /* Submit error */
  320. vb->state = VIDEOBUF_PREPARED;
  321. list_del_init(&vb->queue);
  322. if (mx3_cam->active == buf)
  323. mx3_cam->active = NULL;
  324. }
  325. /* Called with .vb_lock held */
  326. static void mx3_videobuf_release(struct videobuf_queue *vq,
  327. struct videobuf_buffer *vb)
  328. {
  329. struct soc_camera_device *icd = vq->priv_data;
  330. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  331. struct mx3_camera_dev *mx3_cam = ici->priv;
  332. struct mx3_camera_buffer *buf =
  333. container_of(vb, struct mx3_camera_buffer, vb);
  334. unsigned long flags;
  335. dev_dbg(icd->dev.parent,
  336. "Release%s DMA 0x%08x (state %d), queue %sempty\n",
  337. mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
  338. vb->state, list_empty(&vb->queue) ? "" : "not ");
  339. spin_lock_irqsave(&mx3_cam->lock, flags);
  340. if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
  341. !list_empty(&vb->queue)) {
  342. vb->state = VIDEOBUF_ERROR;
  343. list_del_init(&vb->queue);
  344. if (mx3_cam->active == buf)
  345. mx3_cam->active = NULL;
  346. }
  347. spin_unlock_irqrestore(&mx3_cam->lock, flags);
  348. free_buffer(vq, buf);
  349. }
  350. static struct videobuf_queue_ops mx3_videobuf_ops = {
  351. .buf_setup = mx3_videobuf_setup,
  352. .buf_prepare = mx3_videobuf_prepare,
  353. .buf_queue = mx3_videobuf_queue,
  354. .buf_release = mx3_videobuf_release,
  355. };
  356. static void mx3_camera_init_videobuf(struct videobuf_queue *q,
  357. struct soc_camera_device *icd)
  358. {
  359. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  360. struct mx3_camera_dev *mx3_cam = ici->priv;
  361. videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
  362. &mx3_cam->lock,
  363. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  364. V4L2_FIELD_NONE,
  365. sizeof(struct mx3_camera_buffer), icd);
  366. }
  367. /* First part of ipu_csi_init_interface() */
  368. static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
  369. struct soc_camera_device *icd)
  370. {
  371. u32 conf;
  372. long rate;
  373. /* Set default size: ipu_csi_set_window_size() */
  374. csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
  375. /* ...and position to 0:0: ipu_csi_set_window_pos() */
  376. conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  377. csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
  378. /* We use only gated clock synchronisation mode so far */
  379. conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
  380. /* Set generic data, platform-biggest bus-width */
  381. conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  382. if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
  383. conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  384. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
  385. conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  386. else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
  387. conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  388. else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
  389. conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  390. if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
  391. conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
  392. if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
  393. conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
  394. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  395. conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  396. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  397. conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  398. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  399. conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  400. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  401. conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  402. /* ipu_csi_init_interface() */
  403. csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
  404. clk_enable(mx3_cam->clk);
  405. rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
  406. dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
  407. if (rate)
  408. clk_set_rate(mx3_cam->clk, rate);
  409. }
  410. /* Called with .video_lock held */
  411. static int mx3_camera_add_device(struct soc_camera_device *icd)
  412. {
  413. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  414. struct mx3_camera_dev *mx3_cam = ici->priv;
  415. if (mx3_cam->icd)
  416. return -EBUSY;
  417. mx3_camera_activate(mx3_cam, icd);
  418. mx3_cam->icd = icd;
  419. dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
  420. icd->devnum);
  421. return 0;
  422. }
  423. /* Called with .video_lock held */
  424. static void mx3_camera_remove_device(struct soc_camera_device *icd)
  425. {
  426. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  427. struct mx3_camera_dev *mx3_cam = ici->priv;
  428. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  429. BUG_ON(icd != mx3_cam->icd);
  430. if (*ichan) {
  431. dma_release_channel(&(*ichan)->dma_chan);
  432. *ichan = NULL;
  433. }
  434. clk_disable(mx3_cam->clk);
  435. mx3_cam->icd = NULL;
  436. dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
  437. icd->devnum);
  438. }
  439. static bool channel_change_requested(struct soc_camera_device *icd,
  440. struct v4l2_rect *rect)
  441. {
  442. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  443. struct mx3_camera_dev *mx3_cam = ici->priv;
  444. struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
  445. /* Do buffers have to be re-allocated or channel re-configured? */
  446. return ichan && rect->width * rect->height >
  447. icd->user_width * icd->user_height;
  448. }
  449. static int test_platform_param(struct mx3_camera_dev *mx3_cam,
  450. unsigned char buswidth, unsigned long *flags)
  451. {
  452. /*
  453. * Platform specified synchronization and pixel clock polarities are
  454. * only a recommendation and are only used during probing. MX3x
  455. * camera interface only works in master mode, i.e., uses HSYNC and
  456. * VSYNC signals from the sensor
  457. */
  458. *flags = SOCAM_MASTER |
  459. SOCAM_HSYNC_ACTIVE_HIGH |
  460. SOCAM_HSYNC_ACTIVE_LOW |
  461. SOCAM_VSYNC_ACTIVE_HIGH |
  462. SOCAM_VSYNC_ACTIVE_LOW |
  463. SOCAM_PCLK_SAMPLE_RISING |
  464. SOCAM_PCLK_SAMPLE_FALLING |
  465. SOCAM_DATA_ACTIVE_HIGH |
  466. SOCAM_DATA_ACTIVE_LOW;
  467. /* If requested data width is supported by the platform, use it or any
  468. * possible lower value - i.MX31 is smart enough to schift bits */
  469. switch (buswidth) {
  470. case 15:
  471. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
  472. return -EINVAL;
  473. *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
  474. SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  475. break;
  476. case 10:
  477. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
  478. return -EINVAL;
  479. *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
  480. SOCAM_DATAWIDTH_4;
  481. break;
  482. case 8:
  483. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
  484. return -EINVAL;
  485. *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
  486. break;
  487. case 4:
  488. if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
  489. return -EINVAL;
  490. *flags |= SOCAM_DATAWIDTH_4;
  491. break;
  492. default:
  493. dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
  494. "Unsupported bus width %d\n", buswidth);
  495. return -EINVAL;
  496. }
  497. return 0;
  498. }
  499. static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
  500. const unsigned int depth)
  501. {
  502. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  503. struct mx3_camera_dev *mx3_cam = ici->priv;
  504. unsigned long bus_flags, camera_flags;
  505. int ret = test_platform_param(mx3_cam, depth, &bus_flags);
  506. dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
  507. if (ret < 0)
  508. return ret;
  509. camera_flags = icd->ops->query_bus_param(icd);
  510. ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  511. if (ret < 0)
  512. dev_warn(icd->dev.parent,
  513. "Flags incompatible: camera %lx, host %lx\n",
  514. camera_flags, bus_flags);
  515. return ret;
  516. }
  517. static bool chan_filter(struct dma_chan *chan, void *arg)
  518. {
  519. struct dma_chan_request *rq = arg;
  520. struct mx3_camera_pdata *pdata;
  521. if (!rq)
  522. return false;
  523. pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
  524. return rq->id == chan->chan_id &&
  525. pdata->dma_dev == chan->device->dev;
  526. }
  527. static const struct soc_camera_data_format mx3_camera_formats[] = {
  528. {
  529. .name = "Bayer (sRGB) 8 bit",
  530. .depth = 8,
  531. .fourcc = V4L2_PIX_FMT_SBGGR8,
  532. .colorspace = V4L2_COLORSPACE_SRGB,
  533. }, {
  534. .name = "Monochrome 8 bit",
  535. .depth = 8,
  536. .fourcc = V4L2_PIX_FMT_GREY,
  537. .colorspace = V4L2_COLORSPACE_JPEG,
  538. },
  539. };
  540. static bool buswidth_supported(struct soc_camera_host *ici, int depth)
  541. {
  542. struct mx3_camera_dev *mx3_cam = ici->priv;
  543. switch (depth) {
  544. case 4:
  545. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
  546. case 8:
  547. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
  548. case 10:
  549. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
  550. case 15:
  551. return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
  552. }
  553. return false;
  554. }
  555. static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
  556. struct soc_camera_format_xlate *xlate)
  557. {
  558. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  559. int formats = 0, buswidth, ret;
  560. buswidth = icd->formats[idx].depth;
  561. if (!buswidth_supported(ici, buswidth))
  562. return 0;
  563. ret = mx3_camera_try_bus_param(icd, buswidth);
  564. if (ret < 0)
  565. return 0;
  566. switch (icd->formats[idx].fourcc) {
  567. case V4L2_PIX_FMT_SGRBG10:
  568. formats++;
  569. if (xlate) {
  570. xlate->host_fmt = &mx3_camera_formats[0];
  571. xlate->cam_fmt = icd->formats + idx;
  572. xlate->buswidth = buswidth;
  573. xlate++;
  574. dev_dbg(icd->dev.parent,
  575. "Providing format %s using %s\n",
  576. mx3_camera_formats[0].name,
  577. icd->formats[idx].name);
  578. }
  579. goto passthrough;
  580. case V4L2_PIX_FMT_Y16:
  581. formats++;
  582. if (xlate) {
  583. xlate->host_fmt = &mx3_camera_formats[1];
  584. xlate->cam_fmt = icd->formats + idx;
  585. xlate->buswidth = buswidth;
  586. xlate++;
  587. dev_dbg(icd->dev.parent,
  588. "Providing format %s using %s\n",
  589. mx3_camera_formats[0].name,
  590. icd->formats[idx].name);
  591. }
  592. default:
  593. passthrough:
  594. /* Generic pass-through */
  595. formats++;
  596. if (xlate) {
  597. xlate->host_fmt = icd->formats + idx;
  598. xlate->cam_fmt = icd->formats + idx;
  599. xlate->buswidth = buswidth;
  600. xlate++;
  601. dev_dbg(icd->dev.parent,
  602. "Providing format %s in pass-through mode\n",
  603. icd->formats[idx].name);
  604. }
  605. }
  606. return formats;
  607. }
  608. static void configure_geometry(struct mx3_camera_dev *mx3_cam,
  609. unsigned int width, unsigned int height)
  610. {
  611. u32 ctrl, width_field, height_field;
  612. /* Setup frame size - this cannot be changed on-the-fly... */
  613. width_field = width - 1;
  614. height_field = height - 1;
  615. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
  616. csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
  617. csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
  618. csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
  619. /* ...and position */
  620. ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
  621. /* Sensor does the cropping */
  622. csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
  623. }
  624. static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
  625. {
  626. dma_cap_mask_t mask;
  627. struct dma_chan *chan;
  628. struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
  629. /* We have to use IDMAC_IC_7 for Bayer / generic data */
  630. struct dma_chan_request rq = {.mx3_cam = mx3_cam,
  631. .id = IDMAC_IC_7};
  632. if (*ichan) {
  633. struct videobuf_buffer *vb, *_vb;
  634. dma_release_channel(&(*ichan)->dma_chan);
  635. *ichan = NULL;
  636. mx3_cam->active = NULL;
  637. list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
  638. list_del_init(&vb->queue);
  639. vb->state = VIDEOBUF_ERROR;
  640. wake_up(&vb->done);
  641. }
  642. }
  643. dma_cap_zero(mask);
  644. dma_cap_set(DMA_SLAVE, mask);
  645. dma_cap_set(DMA_PRIVATE, mask);
  646. chan = dma_request_channel(mask, chan_filter, &rq);
  647. if (!chan)
  648. return -EBUSY;
  649. *ichan = to_idmac_chan(chan);
  650. (*ichan)->client = mx3_cam;
  651. return 0;
  652. }
  653. /*
  654. * FIXME: learn to use stride != width, then we can keep stride properly aligned
  655. * and support arbitrary (even) widths.
  656. */
  657. static inline void stride_align(__s32 *width)
  658. {
  659. if (((*width + 7) & ~7) < 4096)
  660. *width = (*width + 7) & ~7;
  661. else
  662. *width = *width & ~7;
  663. }
  664. /*
  665. * As long as we don't implement host-side cropping and scaling, we can use
  666. * default g_crop and cropcap from soc_camera.c
  667. */
  668. static int mx3_camera_set_crop(struct soc_camera_device *icd,
  669. struct v4l2_crop *a)
  670. {
  671. struct v4l2_rect *rect = &a->c;
  672. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  673. struct mx3_camera_dev *mx3_cam = ici->priv;
  674. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  675. struct v4l2_format f = {.type = V4L2_BUF_TYPE_VIDEO_CAPTURE};
  676. struct v4l2_pix_format *pix = &f.fmt.pix;
  677. int ret;
  678. soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
  679. soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
  680. ret = v4l2_subdev_call(sd, video, s_crop, a);
  681. if (ret < 0)
  682. return ret;
  683. /* The capture device might have changed its output */
  684. ret = v4l2_subdev_call(sd, video, g_fmt, &f);
  685. if (ret < 0)
  686. return ret;
  687. if (pix->width & 7) {
  688. /* Ouch! We can only handle 8-byte aligned width... */
  689. stride_align(&pix->width);
  690. ret = v4l2_subdev_call(sd, video, s_fmt, &f);
  691. if (ret < 0)
  692. return ret;
  693. }
  694. if (pix->width != icd->user_width || pix->height != icd->user_height) {
  695. /*
  696. * We now know pixel formats and can decide upon DMA-channel(s)
  697. * So far only direct camera-to-memory is supported
  698. */
  699. if (channel_change_requested(icd, rect)) {
  700. int ret = acquire_dma_channel(mx3_cam);
  701. if (ret < 0)
  702. return ret;
  703. }
  704. configure_geometry(mx3_cam, pix->width, pix->height);
  705. }
  706. dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
  707. pix->width, pix->height);
  708. icd->user_width = pix->width;
  709. icd->user_height = pix->height;
  710. return ret;
  711. }
  712. static int mx3_camera_set_fmt(struct soc_camera_device *icd,
  713. struct v4l2_format *f)
  714. {
  715. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  716. struct mx3_camera_dev *mx3_cam = ici->priv;
  717. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  718. const struct soc_camera_format_xlate *xlate;
  719. struct v4l2_pix_format *pix = &f->fmt.pix;
  720. int ret;
  721. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  722. if (!xlate) {
  723. dev_warn(icd->dev.parent, "Format %x not found\n",
  724. pix->pixelformat);
  725. return -EINVAL;
  726. }
  727. stride_align(&pix->width);
  728. dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
  729. ret = acquire_dma_channel(mx3_cam);
  730. if (ret < 0)
  731. return ret;
  732. /*
  733. * Might have to perform a complete interface initialisation like in
  734. * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
  735. * mxc_v4l2_s_fmt()
  736. */
  737. configure_geometry(mx3_cam, pix->width, pix->height);
  738. ret = v4l2_subdev_call(sd, video, s_fmt, f);
  739. if (!ret) {
  740. icd->buswidth = xlate->buswidth;
  741. icd->current_fmt = xlate->host_fmt;
  742. }
  743. dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
  744. return ret;
  745. }
  746. static int mx3_camera_try_fmt(struct soc_camera_device *icd,
  747. struct v4l2_format *f)
  748. {
  749. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  750. const struct soc_camera_format_xlate *xlate;
  751. struct v4l2_pix_format *pix = &f->fmt.pix;
  752. __u32 pixfmt = pix->pixelformat;
  753. enum v4l2_field field;
  754. int ret;
  755. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  756. if (pixfmt && !xlate) {
  757. dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
  758. return -EINVAL;
  759. }
  760. /* limit to MX3 hardware capabilities */
  761. if (pix->height > 4096)
  762. pix->height = 4096;
  763. if (pix->width > 4096)
  764. pix->width = 4096;
  765. pix->bytesperline = pix->width *
  766. DIV_ROUND_UP(xlate->host_fmt->depth, 8);
  767. pix->sizeimage = pix->height * pix->bytesperline;
  768. /* camera has to see its format, but the user the original one */
  769. pix->pixelformat = xlate->cam_fmt->fourcc;
  770. /* limit to sensor capabilities */
  771. ret = v4l2_subdev_call(sd, video, try_fmt, f);
  772. pix->pixelformat = xlate->host_fmt->fourcc;
  773. field = pix->field;
  774. if (field == V4L2_FIELD_ANY) {
  775. pix->field = V4L2_FIELD_NONE;
  776. } else if (field != V4L2_FIELD_NONE) {
  777. dev_err(icd->dev.parent, "Field type %d unsupported.\n", field);
  778. return -EINVAL;
  779. }
  780. return ret;
  781. }
  782. static int mx3_camera_reqbufs(struct soc_camera_file *icf,
  783. struct v4l2_requestbuffers *p)
  784. {
  785. return 0;
  786. }
  787. static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
  788. {
  789. struct soc_camera_file *icf = file->private_data;
  790. return videobuf_poll_stream(file, &icf->vb_vidq, pt);
  791. }
  792. static int mx3_camera_querycap(struct soc_camera_host *ici,
  793. struct v4l2_capability *cap)
  794. {
  795. /* cap->name is set by the firendly caller:-> */
  796. strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
  797. cap->version = KERNEL_VERSION(0, 2, 2);
  798. cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  799. return 0;
  800. }
  801. static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
  802. {
  803. struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
  804. struct mx3_camera_dev *mx3_cam = ici->priv;
  805. unsigned long bus_flags, camera_flags, common_flags;
  806. u32 dw, sens_conf;
  807. int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
  808. const struct soc_camera_format_xlate *xlate;
  809. struct device *dev = icd->dev.parent;
  810. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  811. if (!xlate) {
  812. dev_warn(dev, "Format %x not found\n", pixfmt);
  813. return -EINVAL;
  814. }
  815. dev_dbg(dev, "requested bus width %d bit: %d\n",
  816. icd->buswidth, ret);
  817. if (ret < 0)
  818. return ret;
  819. camera_flags = icd->ops->query_bus_param(icd);
  820. common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
  821. dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
  822. camera_flags, bus_flags, common_flags);
  823. if (!common_flags) {
  824. dev_dbg(dev, "no common flags");
  825. return -EINVAL;
  826. }
  827. /* Make choices, based on platform preferences */
  828. if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
  829. (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
  830. if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
  831. common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
  832. else
  833. common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
  834. }
  835. if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
  836. (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
  837. if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
  838. common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
  839. else
  840. common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
  841. }
  842. if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
  843. (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
  844. if (mx3_cam->platform_flags & MX3_CAMERA_DP)
  845. common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
  846. else
  847. common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
  848. }
  849. if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
  850. (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
  851. if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
  852. common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
  853. else
  854. common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
  855. }
  856. /* Make the camera work in widest common mode, we'll take care of
  857. * the rest */
  858. if (common_flags & SOCAM_DATAWIDTH_15)
  859. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  860. SOCAM_DATAWIDTH_15;
  861. else if (common_flags & SOCAM_DATAWIDTH_10)
  862. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  863. SOCAM_DATAWIDTH_10;
  864. else if (common_flags & SOCAM_DATAWIDTH_8)
  865. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  866. SOCAM_DATAWIDTH_8;
  867. else
  868. common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
  869. SOCAM_DATAWIDTH_4;
  870. ret = icd->ops->set_bus_param(icd, common_flags);
  871. if (ret < 0) {
  872. dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
  873. common_flags, ret);
  874. return ret;
  875. }
  876. /*
  877. * So far only gated clock mode is supported. Add a line
  878. * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
  879. * below and select the required mode when supporting other
  880. * synchronisation protocols.
  881. */
  882. sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
  883. ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
  884. (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
  885. (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
  886. (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
  887. (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
  888. (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
  889. /* TODO: Support RGB and YUV formats */
  890. /* This has been set in mx3_camera_activate(), but we clear it above */
  891. sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
  892. if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
  893. sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
  894. if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
  895. sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
  896. if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
  897. sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
  898. if (common_flags & SOCAM_DATA_ACTIVE_LOW)
  899. sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
  900. /* Just do what we're asked to do */
  901. switch (xlate->host_fmt->depth) {
  902. case 4:
  903. dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  904. break;
  905. case 8:
  906. dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  907. break;
  908. case 10:
  909. dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  910. break;
  911. default:
  912. /*
  913. * Actually it can only be 15 now, default is just to silence
  914. * compiler warnings
  915. */
  916. case 15:
  917. dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
  918. }
  919. csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
  920. dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
  921. return 0;
  922. }
  923. static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
  924. .owner = THIS_MODULE,
  925. .add = mx3_camera_add_device,
  926. .remove = mx3_camera_remove_device,
  927. .set_crop = mx3_camera_set_crop,
  928. .set_fmt = mx3_camera_set_fmt,
  929. .try_fmt = mx3_camera_try_fmt,
  930. .get_formats = mx3_camera_get_formats,
  931. .init_videobuf = mx3_camera_init_videobuf,
  932. .reqbufs = mx3_camera_reqbufs,
  933. .poll = mx3_camera_poll,
  934. .querycap = mx3_camera_querycap,
  935. .set_bus_param = mx3_camera_set_bus_param,
  936. };
  937. static int __devinit mx3_camera_probe(struct platform_device *pdev)
  938. {
  939. struct mx3_camera_dev *mx3_cam;
  940. struct resource *res;
  941. void __iomem *base;
  942. int err = 0;
  943. struct soc_camera_host *soc_host;
  944. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  945. if (!res) {
  946. err = -ENODEV;
  947. goto egetres;
  948. }
  949. mx3_cam = vmalloc(sizeof(*mx3_cam));
  950. if (!mx3_cam) {
  951. dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
  952. err = -ENOMEM;
  953. goto ealloc;
  954. }
  955. memset(mx3_cam, 0, sizeof(*mx3_cam));
  956. mx3_cam->clk = clk_get(&pdev->dev, NULL);
  957. if (IS_ERR(mx3_cam->clk)) {
  958. err = PTR_ERR(mx3_cam->clk);
  959. goto eclkget;
  960. }
  961. mx3_cam->pdata = pdev->dev.platform_data;
  962. mx3_cam->platform_flags = mx3_cam->pdata->flags;
  963. if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
  964. MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
  965. MX3_CAMERA_DATAWIDTH_15))) {
  966. /* Platform hasn't set available data widths. This is bad.
  967. * Warn and use a default. */
  968. dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
  969. "data widths, using default 8 bit\n");
  970. mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
  971. }
  972. mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
  973. if (!mx3_cam->mclk) {
  974. dev_warn(&pdev->dev,
  975. "mclk_10khz == 0! Please, fix your platform data. "
  976. "Using default 20MHz\n");
  977. mx3_cam->mclk = 20000000;
  978. }
  979. /* list of video-buffers */
  980. INIT_LIST_HEAD(&mx3_cam->capture);
  981. spin_lock_init(&mx3_cam->lock);
  982. base = ioremap(res->start, resource_size(res));
  983. if (!base) {
  984. pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
  985. err = -ENOMEM;
  986. goto eioremap;
  987. }
  988. mx3_cam->base = base;
  989. soc_host = &mx3_cam->soc_host;
  990. soc_host->drv_name = MX3_CAM_DRV_NAME;
  991. soc_host->ops = &mx3_soc_camera_host_ops;
  992. soc_host->priv = mx3_cam;
  993. soc_host->v4l2_dev.dev = &pdev->dev;
  994. soc_host->nr = pdev->id;
  995. err = soc_camera_host_register(soc_host);
  996. if (err)
  997. goto ecamhostreg;
  998. /* IDMAC interface */
  999. dmaengine_get();
  1000. return 0;
  1001. ecamhostreg:
  1002. iounmap(base);
  1003. eioremap:
  1004. clk_put(mx3_cam->clk);
  1005. eclkget:
  1006. vfree(mx3_cam);
  1007. ealloc:
  1008. egetres:
  1009. return err;
  1010. }
  1011. static int __devexit mx3_camera_remove(struct platform_device *pdev)
  1012. {
  1013. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  1014. struct mx3_camera_dev *mx3_cam = container_of(soc_host,
  1015. struct mx3_camera_dev, soc_host);
  1016. clk_put(mx3_cam->clk);
  1017. soc_camera_host_unregister(soc_host);
  1018. iounmap(mx3_cam->base);
  1019. /*
  1020. * The channel has either not been allocated,
  1021. * or should have been released
  1022. */
  1023. if (WARN_ON(mx3_cam->idmac_channel[0]))
  1024. dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
  1025. vfree(mx3_cam);
  1026. dmaengine_put();
  1027. dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
  1028. return 0;
  1029. }
  1030. static struct platform_driver mx3_camera_driver = {
  1031. .driver = {
  1032. .name = MX3_CAM_DRV_NAME,
  1033. },
  1034. .probe = mx3_camera_probe,
  1035. .remove = __devexit_p(mx3_camera_remove),
  1036. };
  1037. static int __init mx3_camera_init(void)
  1038. {
  1039. return platform_driver_register(&mx3_camera_driver);
  1040. }
  1041. static void __exit mx3_camera_exit(void)
  1042. {
  1043. platform_driver_unregister(&mx3_camera_driver);
  1044. }
  1045. module_init(mx3_camera_init);
  1046. module_exit(mx3_camera_exit);
  1047. MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
  1048. MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
  1049. MODULE_LICENSE("GPL v2");
  1050. MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);