tv8532.c 13 KB

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  1. /*
  2. * Quickcam cameras initialization data
  3. *
  4. * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. *
  20. */
  21. #define MODULE_NAME "tv8532"
  22. #include "gspca.h"
  23. MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
  24. MODULE_DESCRIPTION("TV8532 USB Camera Driver");
  25. MODULE_LICENSE("GPL");
  26. /* specific webcam descriptor */
  27. struct sd {
  28. struct gspca_dev gspca_dev; /* !! must be the first item */
  29. __u16 brightness;
  30. __u8 packet;
  31. };
  32. /* V4L2 controls supported by the driver */
  33. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
  34. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
  35. static struct ctrl sd_ctrls[] = {
  36. {
  37. {
  38. .id = V4L2_CID_BRIGHTNESS,
  39. .type = V4L2_CTRL_TYPE_INTEGER,
  40. .name = "Brightness",
  41. .minimum = 1,
  42. .maximum = 0x15f, /* = 352 - 1 */
  43. .step = 1,
  44. #define BRIGHTNESS_DEF 0x14c
  45. .default_value = BRIGHTNESS_DEF,
  46. },
  47. .set = sd_setbrightness,
  48. .get = sd_getbrightness,
  49. },
  50. };
  51. static const struct v4l2_pix_format sif_mode[] = {
  52. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  53. .bytesperline = 176,
  54. .sizeimage = 176 * 144,
  55. .colorspace = V4L2_COLORSPACE_SRGB,
  56. .priv = 1},
  57. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  58. .bytesperline = 352,
  59. .sizeimage = 352 * 288,
  60. .colorspace = V4L2_COLORSPACE_SRGB,
  61. .priv = 0},
  62. };
  63. /* TV-8532A (ICM532A) registers (LE) */
  64. #define R00_PART_CONTROL 0x00
  65. #define LATENT_CHANGE 0x80
  66. #define EXPO_CHANGE 0x04
  67. #define R01_TIMING_CONTROL_LOW 0x01
  68. #define CMD_EEprom_Open 0x30
  69. #define CMD_EEprom_Close 0x29
  70. #define R03_TABLE_ADDR 0x03
  71. #define R04_WTRAM_DATA_L 0x04
  72. #define R05_WTRAM_DATA_M 0x05
  73. #define R06_WTRAM_DATA_H 0x06
  74. #define R07_TABLE_LEN 0x07
  75. #define R08_RAM_WRITE_ACTION 0x08
  76. #define R0C_AD_WIDTHL 0x0c
  77. #define R0D_AD_WIDTHH 0x0d
  78. #define R0E_AD_HEIGHTL 0x0e
  79. #define R0F_AD_HEIGHTH 0x0f
  80. #define R10_AD_COL_BEGINL 0x10
  81. #define R11_AD_COL_BEGINH 0x11
  82. #define MIRROR 0x04 /* [10] */
  83. #define R14_AD_ROW_BEGINL 0x14
  84. #define R15_AD_ROWBEGINH 0x15
  85. #define R1C_AD_EXPOSE_TIMEL 0x1c
  86. #define R28_QUANT 0x28
  87. #define R29_LINE 0x29
  88. #define R2C_POLARITY 0x2c
  89. #define R2D_POINT 0x2d
  90. #define R2E_POINTH 0x2e
  91. #define R2F_POINTB 0x2f
  92. #define R30_POINTBH 0x30
  93. #define R31_UPD 0x31
  94. #define R2A_HIGH_BUDGET 0x2a
  95. #define R2B_LOW_BUDGET 0x2b
  96. #define R34_VID 0x34
  97. #define R35_VIDH 0x35
  98. #define R36_PID 0x36
  99. #define R37_PIDH 0x37
  100. #define R39_Test1 0x39 /* GPIO */
  101. #define R3B_Test3 0x3B /* GPIO */
  102. #define R83_AD_IDH 0x83
  103. #define R91_AD_SLOPEREG 0x91
  104. #define R94_AD_BITCONTROL 0x94
  105. static const u8 eeprom_data[][3] = {
  106. /* dataH dataM dataL */
  107. {0x01, 0x00, 0x01},
  108. {0x01, 0x80, 0x11},
  109. {0x05, 0x00, 0x14},
  110. {0x05, 0x00, 0x1c},
  111. {0x0d, 0x00, 0x1e},
  112. {0x05, 0x00, 0x1f},
  113. {0x05, 0x05, 0x19},
  114. {0x05, 0x01, 0x1b},
  115. {0x05, 0x09, 0x1e},
  116. {0x0d, 0x89, 0x2e},
  117. {0x05, 0x89, 0x2f},
  118. {0x05, 0x0d, 0xd9},
  119. {0x05, 0x09, 0xf1},
  120. };
  121. static int reg_r(struct gspca_dev *gspca_dev,
  122. __u16 index)
  123. {
  124. usb_control_msg(gspca_dev->dev,
  125. usb_rcvctrlpipe(gspca_dev->dev, 0),
  126. 0x03,
  127. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  128. 0, /* value */
  129. index, gspca_dev->usb_buf, 1,
  130. 500);
  131. return gspca_dev->usb_buf[0];
  132. }
  133. /* write 1 byte */
  134. static void reg_w1(struct gspca_dev *gspca_dev,
  135. __u16 index, __u8 value)
  136. {
  137. gspca_dev->usb_buf[0] = value;
  138. usb_control_msg(gspca_dev->dev,
  139. usb_sndctrlpipe(gspca_dev->dev, 0),
  140. 0x02,
  141. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  142. 0, /* value */
  143. index, gspca_dev->usb_buf, 1, 500);
  144. }
  145. /* write 2 bytes */
  146. static void reg_w2(struct gspca_dev *gspca_dev,
  147. u16 index, u16 value)
  148. {
  149. gspca_dev->usb_buf[0] = value;
  150. gspca_dev->usb_buf[1] = value >> 8;
  151. usb_control_msg(gspca_dev->dev,
  152. usb_sndctrlpipe(gspca_dev->dev, 0),
  153. 0x02,
  154. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  155. 0, /* value */
  156. index, gspca_dev->usb_buf, 2, 500);
  157. }
  158. static void tv_8532WriteEEprom(struct gspca_dev *gspca_dev)
  159. {
  160. int i;
  161. reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Open);
  162. for (i = 0; i < ARRAY_SIZE(eeprom_data); i++) {
  163. reg_w1(gspca_dev, R03_TABLE_ADDR, i);
  164. reg_w1(gspca_dev, R04_WTRAM_DATA_L, eeprom_data[i][2]);
  165. reg_w1(gspca_dev, R05_WTRAM_DATA_M, eeprom_data[i][1]);
  166. reg_w1(gspca_dev, R06_WTRAM_DATA_H, eeprom_data[i][0]);
  167. reg_w1(gspca_dev, R08_RAM_WRITE_ACTION, 0);
  168. }
  169. reg_w1(gspca_dev, R07_TABLE_LEN, i);
  170. reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Close);
  171. msleep(10);
  172. }
  173. /* this function is called at probe time */
  174. static int sd_config(struct gspca_dev *gspca_dev,
  175. const struct usb_device_id *id)
  176. {
  177. struct sd *sd = (struct sd *) gspca_dev;
  178. struct cam *cam;
  179. cam = &gspca_dev->cam;
  180. cam->cam_mode = sif_mode;
  181. cam->nmodes = ARRAY_SIZE(sif_mode);
  182. sd->brightness = BRIGHTNESS_DEF;
  183. return 0;
  184. }
  185. static void tv_8532ReadRegisters(struct gspca_dev *gspca_dev)
  186. {
  187. int i;
  188. static u8 reg_tb[] = {
  189. R0C_AD_WIDTHL,
  190. R0D_AD_WIDTHH,
  191. R28_QUANT,
  192. R29_LINE,
  193. R2C_POLARITY,
  194. R2D_POINT,
  195. R2E_POINTH,
  196. R2F_POINTB,
  197. R30_POINTBH,
  198. R2A_HIGH_BUDGET,
  199. R2B_LOW_BUDGET,
  200. R34_VID,
  201. R35_VIDH,
  202. R36_PID,
  203. R37_PIDH,
  204. R83_AD_IDH,
  205. R10_AD_COL_BEGINL,
  206. R11_AD_COL_BEGINH,
  207. R14_AD_ROW_BEGINL,
  208. R15_AD_ROWBEGINH,
  209. 0
  210. };
  211. i = 0;
  212. do {
  213. reg_r(gspca_dev, reg_tb[i]);
  214. i++;
  215. } while (reg_tb[i] != 0);
  216. }
  217. static void tv_8532_setReg(struct gspca_dev *gspca_dev)
  218. {
  219. reg_w1(gspca_dev, R10_AD_COL_BEGINL, 0x44);
  220. /* begin active line */
  221. reg_w1(gspca_dev, R11_AD_COL_BEGINH, 0x00);
  222. /* mirror and digital gain */
  223. reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
  224. /* = 0x84 */
  225. reg_w1(gspca_dev, R3B_Test3, 0x0a); /* Test0Sel = 10 */
  226. /******************************************************/
  227. reg_w1(gspca_dev, R0E_AD_HEIGHTL, 0x90);
  228. reg_w1(gspca_dev, R0F_AD_HEIGHTH, 0x01);
  229. reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, 0x018f);
  230. reg_w1(gspca_dev, R10_AD_COL_BEGINL, 0x44);
  231. /* begin active line */
  232. reg_w1(gspca_dev, R11_AD_COL_BEGINH, 0x00);
  233. /* mirror and digital gain */
  234. reg_w1(gspca_dev, R14_AD_ROW_BEGINL, 0x0a);
  235. reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x00);
  236. reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x02);
  237. reg_w1(gspca_dev, R01_TIMING_CONTROL_LOW, CMD_EEprom_Close);
  238. reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x00);
  239. reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
  240. /* = 0x84 */
  241. }
  242. static void tv_8532_PollReg(struct gspca_dev *gspca_dev)
  243. {
  244. int i;
  245. /* strange polling from tgc */
  246. for (i = 0; i < 10; i++) {
  247. reg_w1(gspca_dev, R2C_POLARITY, 0x10);
  248. reg_w1(gspca_dev, R00_PART_CONTROL,
  249. LATENT_CHANGE | EXPO_CHANGE);
  250. reg_w1(gspca_dev, R31_UPD, 0x01);
  251. }
  252. }
  253. /* this function is called at probe and resume time */
  254. static int sd_init(struct gspca_dev *gspca_dev)
  255. {
  256. tv_8532WriteEEprom(gspca_dev);
  257. reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x32); /* slope begin 1,7V,
  258. * slope rate 2 */
  259. reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x00);
  260. tv_8532ReadRegisters(gspca_dev);
  261. reg_w1(gspca_dev, R3B_Test3, 0x0b);
  262. reg_w2(gspca_dev, R0E_AD_HEIGHTL, 0x0190);
  263. reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, 0x018f);
  264. reg_w1(gspca_dev, R0C_AD_WIDTHL, 0xe8);
  265. reg_w1(gspca_dev, R0D_AD_WIDTHH, 0x03);
  266. /*******************************************************************/
  267. reg_w1(gspca_dev, R28_QUANT, 0x90);
  268. /* no compress - fixed Q - quant 0 */
  269. reg_w1(gspca_dev, R29_LINE, 0x81);
  270. /* 0x84; // CIF | 4 packet 0x29 */
  271. /************************************************/
  272. reg_w1(gspca_dev, R2C_POLARITY, 0x10);
  273. /* 0x48; //0x08; 0x2c */
  274. reg_w1(gspca_dev, R2D_POINT, 0x14);
  275. /* 0x38; 0x2d */
  276. reg_w1(gspca_dev, R2E_POINTH, 0x01);
  277. /* 0x04; 0x2e */
  278. reg_w1(gspca_dev, R2F_POINTB, 0x12);
  279. /* 0x04; 0x2f */
  280. reg_w1(gspca_dev, R30_POINTBH, 0x01);
  281. /* 0x04; 0x30 */
  282. reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
  283. /* 0x00<-0x84 */
  284. /*************************************************/
  285. reg_w1(gspca_dev, R31_UPD, 0x01); /* update registers */
  286. msleep(200);
  287. reg_w1(gspca_dev, R31_UPD, 0x00); /* end update */
  288. /*************************************************/
  289. tv_8532_setReg(gspca_dev);
  290. /*************************************************/
  291. reg_w1(gspca_dev, R3B_Test3, 0x0b); /* Test0Sel = 11 = GPIO */
  292. /*************************************************/
  293. tv_8532_setReg(gspca_dev);
  294. /*************************************************/
  295. tv_8532_PollReg(gspca_dev);
  296. return 0;
  297. }
  298. static void setbrightness(struct gspca_dev *gspca_dev)
  299. {
  300. struct sd *sd = (struct sd *) gspca_dev;
  301. reg_w2(gspca_dev, R1C_AD_EXPOSE_TIMEL, sd->brightness);
  302. reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
  303. /* 0x84 */
  304. }
  305. /* -- start the camera -- */
  306. static int sd_start(struct gspca_dev *gspca_dev)
  307. {
  308. struct sd *sd = (struct sd *) gspca_dev;
  309. reg_w1(gspca_dev, R91_AD_SLOPEREG, 0x32); /* slope begin 1,7V,
  310. * slope rate 2 */
  311. reg_w1(gspca_dev, R94_AD_BITCONTROL, 0x00);
  312. tv_8532ReadRegisters(gspca_dev);
  313. reg_w1(gspca_dev, R3B_Test3, 0x0b);
  314. reg_w2(gspca_dev, R0E_AD_HEIGHTL, 0x0190);
  315. setbrightness(gspca_dev);
  316. reg_w1(gspca_dev, R0C_AD_WIDTHL, 0xe8); /* 0x20; 0x0c */
  317. reg_w1(gspca_dev, R0D_AD_WIDTHH, 0x03);
  318. /************************************************/
  319. reg_w1(gspca_dev, R28_QUANT, 0x90);
  320. /* 0x72 compressed mode 0x28 */
  321. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
  322. /* 176x144 */
  323. reg_w1(gspca_dev, R29_LINE, 0x41);
  324. /* CIF - 2 lines/packet */
  325. } else {
  326. /* 352x288 */
  327. reg_w1(gspca_dev, R29_LINE, 0x81);
  328. /* CIF - 2 lines/packet */
  329. }
  330. /************************************************/
  331. reg_w1(gspca_dev, R2C_POLARITY, 0x10); /* slow clock */
  332. reg_w1(gspca_dev, R2D_POINT, 0x14);
  333. reg_w1(gspca_dev, R2E_POINTH, 0x01);
  334. reg_w1(gspca_dev, R2F_POINTB, 0x12);
  335. reg_w1(gspca_dev, R30_POINTBH, 0x01);
  336. reg_w1(gspca_dev, R00_PART_CONTROL, LATENT_CHANGE | EXPO_CHANGE);
  337. /************************************************/
  338. reg_w1(gspca_dev, R31_UPD, 0x01); /* update registers */
  339. msleep(200);
  340. reg_w1(gspca_dev, R31_UPD, 0x00); /* end update */
  341. /************************************************/
  342. tv_8532_setReg(gspca_dev);
  343. /************************************************/
  344. reg_w1(gspca_dev, R3B_Test3, 0x0b); /* Test0Sel = 11 = GPIO */
  345. /************************************************/
  346. tv_8532_setReg(gspca_dev);
  347. /************************************************/
  348. tv_8532_PollReg(gspca_dev);
  349. reg_w1(gspca_dev, R31_UPD, 0x00); /* end update */
  350. gspca_dev->empty_packet = 0; /* check the empty packets */
  351. sd->packet = 0; /* ignore the first packets */
  352. return 0;
  353. }
  354. static void sd_stopN(struct gspca_dev *gspca_dev)
  355. {
  356. reg_w1(gspca_dev, R3B_Test3, 0x0b); /* Test0Sel = 11 = GPIO */
  357. }
  358. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  359. struct gspca_frame *frame, /* target */
  360. __u8 *data, /* isoc packet */
  361. int len) /* iso packet length */
  362. {
  363. struct sd *sd = (struct sd *) gspca_dev;
  364. int packet_type0, packet_type1;
  365. packet_type0 = packet_type1 = INTER_PACKET;
  366. if (gspca_dev->empty_packet) {
  367. gspca_dev->empty_packet = 0;
  368. sd->packet = gspca_dev->height / 2;
  369. packet_type0 = FIRST_PACKET;
  370. } else if (sd->packet == 0)
  371. return; /* 2 more lines in 352x288 ! */
  372. sd->packet--;
  373. if (sd->packet == 0)
  374. packet_type1 = LAST_PACKET;
  375. /* each packet contains:
  376. * - header 2 bytes
  377. * - RGRG line
  378. * - 4 bytes
  379. * - GBGB line
  380. * - 4 bytes
  381. */
  382. gspca_frame_add(gspca_dev, packet_type0,
  383. frame, data + 2, gspca_dev->width);
  384. gspca_frame_add(gspca_dev, packet_type1,
  385. frame, data + gspca_dev->width + 5, gspca_dev->width);
  386. }
  387. static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
  388. {
  389. struct sd *sd = (struct sd *) gspca_dev;
  390. sd->brightness = val;
  391. if (gspca_dev->streaming)
  392. setbrightness(gspca_dev);
  393. return 0;
  394. }
  395. static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
  396. {
  397. struct sd *sd = (struct sd *) gspca_dev;
  398. *val = sd->brightness;
  399. return 0;
  400. }
  401. /* sub-driver description */
  402. static const struct sd_desc sd_desc = {
  403. .name = MODULE_NAME,
  404. .ctrls = sd_ctrls,
  405. .nctrls = ARRAY_SIZE(sd_ctrls),
  406. .config = sd_config,
  407. .init = sd_init,
  408. .start = sd_start,
  409. .stopN = sd_stopN,
  410. .pkt_scan = sd_pkt_scan,
  411. };
  412. /* -- module initialisation -- */
  413. static const __devinitdata struct usb_device_id device_table[] = {
  414. {USB_DEVICE(0x046d, 0x0920)},
  415. {USB_DEVICE(0x046d, 0x0921)},
  416. {USB_DEVICE(0x0545, 0x808b)},
  417. {USB_DEVICE(0x0545, 0x8333)},
  418. {USB_DEVICE(0x0923, 0x010f)},
  419. {}
  420. };
  421. MODULE_DEVICE_TABLE(usb, device_table);
  422. /* -- device connect -- */
  423. static int sd_probe(struct usb_interface *intf,
  424. const struct usb_device_id *id)
  425. {
  426. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  427. THIS_MODULE);
  428. }
  429. static struct usb_driver sd_driver = {
  430. .name = MODULE_NAME,
  431. .id_table = device_table,
  432. .probe = sd_probe,
  433. .disconnect = gspca_disconnect,
  434. #ifdef CONFIG_PM
  435. .suspend = gspca_suspend,
  436. .resume = gspca_resume,
  437. #endif
  438. };
  439. /* -- module insert / remove -- */
  440. static int __init sd_mod_init(void)
  441. {
  442. int ret;
  443. ret = usb_register(&sd_driver);
  444. if (ret < 0)
  445. return ret;
  446. PDEBUG(D_PROBE, "registered");
  447. return 0;
  448. }
  449. static void __exit sd_mod_exit(void)
  450. {
  451. usb_deregister(&sd_driver);
  452. PDEBUG(D_PROBE, "deregistered");
  453. }
  454. module_init(sd_mod_init);
  455. module_exit(sd_mod_exit);