cx88-dvb.c 38 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. int fe_id;
  103. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  104. if (!fe_id) {
  105. printk(KERN_ERR "%s() No frontend found\n", __func__);
  106. return -EINVAL;
  107. }
  108. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  109. if (drv) {
  110. if (acquire){
  111. dev->frontends.active_fe_id = fe_id;
  112. ret = drv->request_acquire(drv);
  113. } else {
  114. ret = drv->request_release(drv);
  115. dev->frontends.active_fe_id = 0;
  116. }
  117. }
  118. return ret;
  119. }
  120. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  121. {
  122. struct videobuf_dvb_frontends *f;
  123. struct videobuf_dvb_frontend *fe;
  124. if (!core->dvbdev)
  125. return;
  126. f = &core->dvbdev->frontends;
  127. if (!f)
  128. return;
  129. if (f->gate <= 1) /* undefined or fe0 */
  130. fe = videobuf_dvb_get_frontend(f, 1);
  131. else
  132. fe = videobuf_dvb_get_frontend(f, f->gate);
  133. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  134. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  135. }
  136. /* ------------------------------------------------------------------ */
  137. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  138. {
  139. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  140. static u8 reset [] = { RESET, 0x80 };
  141. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  142. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  143. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  144. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  145. mt352_write(fe, clock_config, sizeof(clock_config));
  146. udelay(200);
  147. mt352_write(fe, reset, sizeof(reset));
  148. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  149. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  150. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  155. {
  156. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  157. static u8 reset [] = { RESET, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  159. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  160. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  161. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  162. mt352_write(fe, clock_config, sizeof(clock_config));
  163. udelay(200);
  164. mt352_write(fe, reset, sizeof(reset));
  165. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  166. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  167. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  168. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  169. return 0;
  170. }
  171. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  172. {
  173. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  174. static u8 reset [] = { 0x50, 0x80 };
  175. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  176. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  177. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  178. static u8 dntv_extra[] = { 0xB5, 0x7A };
  179. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  180. mt352_write(fe, clock_config, sizeof(clock_config));
  181. udelay(2000);
  182. mt352_write(fe, reset, sizeof(reset));
  183. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  184. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  185. udelay(2000);
  186. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  187. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  188. return 0;
  189. }
  190. static struct mt352_config dvico_fusionhdtv = {
  191. .demod_address = 0x0f,
  192. .demod_init = dvico_fusionhdtv_demod_init,
  193. };
  194. static struct mt352_config dntv_live_dvbt_config = {
  195. .demod_address = 0x0f,
  196. .demod_init = dntv_live_dvbt_demod_init,
  197. };
  198. static struct mt352_config dvico_fusionhdtv_dual = {
  199. .demod_address = 0x0f,
  200. .demod_init = dvico_dual_demod_init,
  201. };
  202. static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  203. .demod_address = (0x1e >> 1),
  204. .no_tuner = 1,
  205. .if2 = 45600,
  206. };
  207. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  208. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  209. {
  210. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  211. static u8 reset [] = { 0x50, 0x80 };
  212. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  213. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  214. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  215. static u8 dntv_extra[] = { 0xB5, 0x7A };
  216. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  217. mt352_write(fe, clock_config, sizeof(clock_config));
  218. udelay(2000);
  219. mt352_write(fe, reset, sizeof(reset));
  220. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  221. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  222. udelay(2000);
  223. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  224. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  225. return 0;
  226. }
  227. static struct mt352_config dntv_live_dvbt_pro_config = {
  228. .demod_address = 0x0f,
  229. .no_tuner = 1,
  230. .demod_init = dntv_live_dvbt_pro_demod_init,
  231. };
  232. #endif
  233. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  234. .demod_address = 0x0f,
  235. .no_tuner = 1,
  236. };
  237. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  238. .demod_address = 0x0f,
  239. .if2 = 45600,
  240. .no_tuner = 1,
  241. };
  242. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  243. .demod_address = 0x0f,
  244. .if2 = 4560,
  245. .no_tuner = 1,
  246. .demod_init = dvico_fusionhdtv_demod_init,
  247. };
  248. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  249. .demod_address = 0x0f,
  250. };
  251. static struct cx22702_config connexant_refboard_config = {
  252. .demod_address = 0x43,
  253. .output_mode = CX22702_SERIAL_OUTPUT,
  254. };
  255. static struct cx22702_config hauppauge_hvr_config = {
  256. .demod_address = 0x63,
  257. .output_mode = CX22702_SERIAL_OUTPUT,
  258. };
  259. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  263. return 0;
  264. }
  265. static struct or51132_config pchdtv_hd3000 = {
  266. .demod_address = 0x15,
  267. .set_ts_params = or51132_set_ts_param,
  268. };
  269. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  270. {
  271. struct cx8802_dev *dev= fe->dvb->priv;
  272. struct cx88_core *core = dev->core;
  273. dprintk(1, "%s: index = %d\n", __func__, index);
  274. if (index == 0)
  275. cx_clear(MO_GP0_IO, 8);
  276. else
  277. cx_set(MO_GP0_IO, 8);
  278. return 0;
  279. }
  280. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  281. {
  282. struct cx8802_dev *dev= fe->dvb->priv;
  283. if (is_punctured)
  284. dev->ts_gen_cntrl |= 0x04;
  285. else
  286. dev->ts_gen_cntrl &= ~0x04;
  287. return 0;
  288. }
  289. static struct lgdt330x_config fusionhdtv_3_gold = {
  290. .demod_address = 0x0e,
  291. .demod_chip = LGDT3302,
  292. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  293. .set_ts_params = lgdt330x_set_ts_param,
  294. };
  295. static struct lgdt330x_config fusionhdtv_5_gold = {
  296. .demod_address = 0x0e,
  297. .demod_chip = LGDT3303,
  298. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  299. .set_ts_params = lgdt330x_set_ts_param,
  300. };
  301. static struct lgdt330x_config pchdtv_hd5500 = {
  302. .demod_address = 0x59,
  303. .demod_chip = LGDT3303,
  304. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  305. .set_ts_params = lgdt330x_set_ts_param,
  306. };
  307. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  308. {
  309. struct cx8802_dev *dev= fe->dvb->priv;
  310. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  311. return 0;
  312. }
  313. static struct nxt200x_config ati_hdtvwonder = {
  314. .demod_address = 0x0a,
  315. .set_ts_params = nxt200x_set_ts_param,
  316. };
  317. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  318. int is_punctured)
  319. {
  320. struct cx8802_dev *dev= fe->dvb->priv;
  321. dev->ts_gen_cntrl = 0x02;
  322. return 0;
  323. }
  324. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  325. fe_sec_voltage_t voltage)
  326. {
  327. struct cx8802_dev *dev= fe->dvb->priv;
  328. struct cx88_core *core = dev->core;
  329. if (voltage == SEC_VOLTAGE_OFF)
  330. cx_write(MO_GP0_IO, 0x000006fb);
  331. else
  332. cx_write(MO_GP0_IO, 0x000006f9);
  333. if (core->prev_set_voltage)
  334. return core->prev_set_voltage(fe, voltage);
  335. return 0;
  336. }
  337. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  338. fe_sec_voltage_t voltage)
  339. {
  340. struct cx8802_dev *dev= fe->dvb->priv;
  341. struct cx88_core *core = dev->core;
  342. if (voltage == SEC_VOLTAGE_OFF) {
  343. dprintk(1,"LNB Voltage OFF\n");
  344. cx_write(MO_GP0_IO, 0x0000efff);
  345. }
  346. if (core->prev_set_voltage)
  347. return core->prev_set_voltage(fe, voltage);
  348. return 0;
  349. }
  350. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  351. fe_sec_voltage_t voltage)
  352. {
  353. struct cx8802_dev *dev= fe->dvb->priv;
  354. struct cx88_core *core = dev->core;
  355. cx_set(MO_GP0_IO, 0x6040);
  356. switch (voltage) {
  357. case SEC_VOLTAGE_13:
  358. cx_clear(MO_GP0_IO, 0x20);
  359. break;
  360. case SEC_VOLTAGE_18:
  361. cx_set(MO_GP0_IO, 0x20);
  362. break;
  363. case SEC_VOLTAGE_OFF:
  364. cx_clear(MO_GP0_IO, 0x20);
  365. break;
  366. }
  367. if (core->prev_set_voltage)
  368. return core->prev_set_voltage(fe, voltage);
  369. return 0;
  370. }
  371. static struct cx24123_config geniatech_dvbs_config = {
  372. .demod_address = 0x55,
  373. .set_ts_params = cx24123_set_ts_param,
  374. };
  375. static struct cx24123_config hauppauge_novas_config = {
  376. .demod_address = 0x55,
  377. .set_ts_params = cx24123_set_ts_param,
  378. };
  379. static struct cx24123_config kworld_dvbs_100_config = {
  380. .demod_address = 0x15,
  381. .set_ts_params = cx24123_set_ts_param,
  382. .lnb_polarity = 1,
  383. };
  384. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  385. .demod_address = 0x32 >> 1,
  386. .output_mode = S5H1409_PARALLEL_OUTPUT,
  387. .gpio = S5H1409_GPIO_ON,
  388. .qam_if = 44000,
  389. .inversion = S5H1409_INVERSION_OFF,
  390. .status_mode = S5H1409_DEMODLOCKING,
  391. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  392. };
  393. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  394. .demod_address = 0x32 >> 1,
  395. .output_mode = S5H1409_SERIAL_OUTPUT,
  396. .gpio = S5H1409_GPIO_OFF,
  397. .inversion = S5H1409_INVERSION_OFF,
  398. .status_mode = S5H1409_DEMODLOCKING,
  399. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  400. };
  401. static struct s5h1409_config kworld_atsc_120_config = {
  402. .demod_address = 0x32 >> 1,
  403. .output_mode = S5H1409_SERIAL_OUTPUT,
  404. .gpio = S5H1409_GPIO_OFF,
  405. .inversion = S5H1409_INVERSION_OFF,
  406. .status_mode = S5H1409_DEMODLOCKING,
  407. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  408. };
  409. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  410. .i2c_address = 0x64,
  411. .if_khz = 5380,
  412. };
  413. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  414. .demod_address = (0x1e >> 1),
  415. .no_tuner = 1,
  416. .if2 = 45600,
  417. };
  418. static struct zl10353_config cx88_geniatech_x8000_mt = {
  419. .demod_address = (0x1e >> 1),
  420. .no_tuner = 1,
  421. .disable_i2c_gate_ctrl = 1,
  422. };
  423. static struct s5h1411_config dvico_fusionhdtv7_config = {
  424. .output_mode = S5H1411_SERIAL_OUTPUT,
  425. .gpio = S5H1411_GPIO_ON,
  426. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  427. .qam_if = S5H1411_IF_44000,
  428. .vsb_if = S5H1411_IF_44000,
  429. .inversion = S5H1411_INVERSION_OFF,
  430. .status_mode = S5H1411_DEMODLOCKING
  431. };
  432. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  433. .i2c_address = 0xc2 >> 1,
  434. .if_khz = 5380,
  435. };
  436. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  437. {
  438. struct dvb_frontend *fe;
  439. struct videobuf_dvb_frontend *fe0 = NULL;
  440. struct xc2028_ctrl ctl;
  441. struct xc2028_config cfg = {
  442. .i2c_adap = &dev->core->i2c_adap,
  443. .i2c_addr = addr,
  444. .ctrl = &ctl,
  445. };
  446. /* Get the first frontend */
  447. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  448. if (!fe0)
  449. return -EINVAL;
  450. if (!fe0->dvb.frontend) {
  451. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  452. "Can't attach xc3028\n",
  453. dev->core->name);
  454. return -EINVAL;
  455. }
  456. /*
  457. * Some xc3028 devices may be hidden by an I2C gate. This is known
  458. * to happen with some s5h1409-based devices.
  459. * Now that I2C gate is open, sets up xc3028 configuration
  460. */
  461. cx88_setup_xc3028(dev->core, &ctl);
  462. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  463. if (!fe) {
  464. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  465. dev->core->name);
  466. dvb_frontend_detach(fe0->dvb.frontend);
  467. dvb_unregister_frontend(fe0->dvb.frontend);
  468. fe0->dvb.frontend = NULL;
  469. return -EINVAL;
  470. }
  471. printk(KERN_INFO "%s/2: xc3028 attached\n",
  472. dev->core->name);
  473. return 0;
  474. }
  475. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  476. int is_punctured)
  477. {
  478. struct cx8802_dev *dev = fe->dvb->priv;
  479. dev->ts_gen_cntrl = 0x2;
  480. return 0;
  481. }
  482. static int cx24116_reset_device(struct dvb_frontend *fe)
  483. {
  484. struct cx8802_dev *dev = fe->dvb->priv;
  485. struct cx88_core *core = dev->core;
  486. /* Reset the part */
  487. /* Put the cx24116 into reset */
  488. cx_write(MO_SRST_IO, 0);
  489. msleep(10);
  490. /* Take the cx24116 out of reset */
  491. cx_write(MO_SRST_IO, 1);
  492. msleep(10);
  493. return 0;
  494. }
  495. static struct cx24116_config hauppauge_hvr4000_config = {
  496. .demod_address = 0x05,
  497. .set_ts_params = cx24116_set_ts_param,
  498. .reset_device = cx24116_reset_device,
  499. };
  500. static struct cx24116_config tevii_s460_config = {
  501. .demod_address = 0x55,
  502. .set_ts_params = cx24116_set_ts_param,
  503. .reset_device = cx24116_reset_device,
  504. };
  505. static struct stv0299_config tevii_tuner_sharp_config = {
  506. .demod_address = 0x68,
  507. .inittab = sharp_z0194a_inittab,
  508. .mclk = 88000000UL,
  509. .invert = 1,
  510. .skip_reinit = 0,
  511. .lock_output = 1,
  512. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  513. .min_delay_ms = 100,
  514. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  515. .set_ts_params = cx24116_set_ts_param,
  516. };
  517. static struct stv0288_config tevii_tuner_earda_config = {
  518. .demod_address = 0x68,
  519. .min_delay_ms = 100,
  520. .set_ts_params = cx24116_set_ts_param,
  521. };
  522. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  523. {
  524. struct cx88_core *core = dev->core;
  525. struct videobuf_dvb_frontend *fe = NULL;
  526. int i;
  527. mutex_init(&dev->frontends.lock);
  528. INIT_LIST_HEAD(&dev->frontends.felist);
  529. if (!core->board.num_frontends)
  530. return -ENODEV;
  531. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  532. core->board.num_frontends);
  533. for (i = 1; i <= core->board.num_frontends; i++) {
  534. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  535. if (!fe) {
  536. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  537. videobuf_dvb_dealloc_frontends(&dev->frontends);
  538. return -ENOMEM;
  539. }
  540. }
  541. return 0;
  542. }
  543. static int dvb_register(struct cx8802_dev *dev)
  544. {
  545. struct cx88_core *core = dev->core;
  546. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  547. int mfe_shared = 0; /* bus not shared by default */
  548. if (0 != core->i2c_rc) {
  549. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  550. goto frontend_detach;
  551. }
  552. /* Get the first frontend */
  553. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  554. if (!fe0)
  555. goto frontend_detach;
  556. /* multi-frontend gate control is undefined or defaults to fe0 */
  557. dev->frontends.gate = 0;
  558. /* Sets the gate control callback to be used by i2c command calls */
  559. core->gate_ctrl = cx88_dvb_gate_ctrl;
  560. /* init frontend(s) */
  561. switch (core->boardnr) {
  562. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  563. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  564. &connexant_refboard_config,
  565. &core->i2c_adap);
  566. if (fe0->dvb.frontend != NULL) {
  567. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  568. 0x61, &core->i2c_adap,
  569. DVB_PLL_THOMSON_DTT759X))
  570. goto frontend_detach;
  571. }
  572. break;
  573. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  574. case CX88_BOARD_CONEXANT_DVB_T1:
  575. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  576. case CX88_BOARD_WINFAST_DTV1000:
  577. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  578. &connexant_refboard_config,
  579. &core->i2c_adap);
  580. if (fe0->dvb.frontend != NULL) {
  581. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  582. 0x60, &core->i2c_adap,
  583. DVB_PLL_THOMSON_DTT7579))
  584. goto frontend_detach;
  585. }
  586. break;
  587. case CX88_BOARD_WINFAST_DTV2000H:
  588. case CX88_BOARD_WINFAST_DTV2000H_J:
  589. case CX88_BOARD_HAUPPAUGE_HVR1100:
  590. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  591. case CX88_BOARD_HAUPPAUGE_HVR1300:
  592. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  593. &hauppauge_hvr_config,
  594. &core->i2c_adap);
  595. if (fe0->dvb.frontend != NULL) {
  596. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  597. &core->i2c_adap, 0x61,
  598. TUNER_PHILIPS_FMD1216ME_MK3))
  599. goto frontend_detach;
  600. }
  601. break;
  602. case CX88_BOARD_HAUPPAUGE_HVR3000:
  603. /* MFE frontend 1 */
  604. mfe_shared = 1;
  605. dev->frontends.gate = 2;
  606. /* DVB-S init */
  607. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  608. &hauppauge_novas_config,
  609. &dev->core->i2c_adap);
  610. if (fe0->dvb.frontend) {
  611. if (!dvb_attach(isl6421_attach,
  612. fe0->dvb.frontend,
  613. &dev->core->i2c_adap,
  614. 0x08, ISL6421_DCL, 0x00))
  615. goto frontend_detach;
  616. }
  617. /* MFE frontend 2 */
  618. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  619. if (!fe1)
  620. goto frontend_detach;
  621. /* DVB-T init */
  622. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  623. &hauppauge_hvr_config,
  624. &dev->core->i2c_adap);
  625. if (fe1->dvb.frontend) {
  626. fe1->dvb.frontend->id = 1;
  627. if (!dvb_attach(simple_tuner_attach,
  628. fe1->dvb.frontend,
  629. &dev->core->i2c_adap,
  630. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  631. goto frontend_detach;
  632. }
  633. break;
  634. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  635. fe0->dvb.frontend = dvb_attach(mt352_attach,
  636. &dvico_fusionhdtv,
  637. &core->i2c_adap);
  638. if (fe0->dvb.frontend != NULL) {
  639. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  640. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  641. goto frontend_detach;
  642. break;
  643. }
  644. /* ZL10353 replaces MT352 on later cards */
  645. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  646. &dvico_fusionhdtv_plus_v1_1,
  647. &core->i2c_adap);
  648. if (fe0->dvb.frontend != NULL) {
  649. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  650. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  651. goto frontend_detach;
  652. }
  653. break;
  654. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  655. /* The tin box says DEE1601, but it seems to be DTT7579
  656. * compatible, with a slightly different MT352 AGC gain. */
  657. fe0->dvb.frontend = dvb_attach(mt352_attach,
  658. &dvico_fusionhdtv_dual,
  659. &core->i2c_adap);
  660. if (fe0->dvb.frontend != NULL) {
  661. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  662. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  663. goto frontend_detach;
  664. break;
  665. }
  666. /* ZL10353 replaces MT352 on later cards */
  667. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  668. &dvico_fusionhdtv_plus_v1_1,
  669. &core->i2c_adap);
  670. if (fe0->dvb.frontend != NULL) {
  671. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  672. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  673. goto frontend_detach;
  674. }
  675. break;
  676. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  677. fe0->dvb.frontend = dvb_attach(mt352_attach,
  678. &dvico_fusionhdtv,
  679. &core->i2c_adap);
  680. if (fe0->dvb.frontend != NULL) {
  681. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  682. 0x61, NULL, DVB_PLL_LG_Z201))
  683. goto frontend_detach;
  684. }
  685. break;
  686. case CX88_BOARD_KWORLD_DVB_T:
  687. case CX88_BOARD_DNTV_LIVE_DVB_T:
  688. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  689. fe0->dvb.frontend = dvb_attach(mt352_attach,
  690. &dntv_live_dvbt_config,
  691. &core->i2c_adap);
  692. if (fe0->dvb.frontend != NULL) {
  693. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  694. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  695. goto frontend_detach;
  696. }
  697. break;
  698. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  699. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  700. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  701. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  702. &dev->vp3054->adap);
  703. if (fe0->dvb.frontend != NULL) {
  704. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  705. &core->i2c_adap, 0x61,
  706. TUNER_PHILIPS_FMD1216ME_MK3))
  707. goto frontend_detach;
  708. }
  709. #else
  710. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  711. core->name);
  712. #endif
  713. break;
  714. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  715. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  716. &dvico_fusionhdtv_hybrid,
  717. &core->i2c_adap);
  718. if (fe0->dvb.frontend != NULL) {
  719. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  720. &core->i2c_adap, 0x61,
  721. TUNER_THOMSON_FE6600))
  722. goto frontend_detach;
  723. }
  724. break;
  725. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  726. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  727. &dvico_fusionhdtv_xc3028,
  728. &core->i2c_adap);
  729. if (fe0->dvb.frontend == NULL)
  730. fe0->dvb.frontend = dvb_attach(mt352_attach,
  731. &dvico_fusionhdtv_mt352_xc3028,
  732. &core->i2c_adap);
  733. /*
  734. * On this board, the demod provides the I2C bus pullup.
  735. * We must not permit gate_ctrl to be performed, or
  736. * the xc3028 cannot communicate on the bus.
  737. */
  738. if (fe0->dvb.frontend)
  739. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  740. if (attach_xc3028(0x61, dev) < 0)
  741. goto frontend_detach;
  742. break;
  743. case CX88_BOARD_PCHDTV_HD3000:
  744. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  745. &core->i2c_adap);
  746. if (fe0->dvb.frontend != NULL) {
  747. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  748. &core->i2c_adap, 0x61,
  749. TUNER_THOMSON_DTT761X))
  750. goto frontend_detach;
  751. }
  752. break;
  753. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  754. dev->ts_gen_cntrl = 0x08;
  755. /* Do a hardware reset of chip before using it. */
  756. cx_clear(MO_GP0_IO, 1);
  757. mdelay(100);
  758. cx_set(MO_GP0_IO, 1);
  759. mdelay(200);
  760. /* Select RF connector callback */
  761. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  762. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  763. &fusionhdtv_3_gold,
  764. &core->i2c_adap);
  765. if (fe0->dvb.frontend != NULL) {
  766. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  767. &core->i2c_adap, 0x61,
  768. TUNER_MICROTUNE_4042FI5))
  769. goto frontend_detach;
  770. }
  771. break;
  772. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  773. dev->ts_gen_cntrl = 0x08;
  774. /* Do a hardware reset of chip before using it. */
  775. cx_clear(MO_GP0_IO, 1);
  776. mdelay(100);
  777. cx_set(MO_GP0_IO, 9);
  778. mdelay(200);
  779. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  780. &fusionhdtv_3_gold,
  781. &core->i2c_adap);
  782. if (fe0->dvb.frontend != NULL) {
  783. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  784. &core->i2c_adap, 0x61,
  785. TUNER_THOMSON_DTT761X))
  786. goto frontend_detach;
  787. }
  788. break;
  789. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  790. dev->ts_gen_cntrl = 0x08;
  791. /* Do a hardware reset of chip before using it. */
  792. cx_clear(MO_GP0_IO, 1);
  793. mdelay(100);
  794. cx_set(MO_GP0_IO, 1);
  795. mdelay(200);
  796. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  797. &fusionhdtv_5_gold,
  798. &core->i2c_adap);
  799. if (fe0->dvb.frontend != NULL) {
  800. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  801. &core->i2c_adap, 0x61,
  802. TUNER_LG_TDVS_H06XF))
  803. goto frontend_detach;
  804. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  805. &core->i2c_adap, 0x43))
  806. goto frontend_detach;
  807. }
  808. break;
  809. case CX88_BOARD_PCHDTV_HD5500:
  810. dev->ts_gen_cntrl = 0x08;
  811. /* Do a hardware reset of chip before using it. */
  812. cx_clear(MO_GP0_IO, 1);
  813. mdelay(100);
  814. cx_set(MO_GP0_IO, 1);
  815. mdelay(200);
  816. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  817. &pchdtv_hd5500,
  818. &core->i2c_adap);
  819. if (fe0->dvb.frontend != NULL) {
  820. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  821. &core->i2c_adap, 0x61,
  822. TUNER_LG_TDVS_H06XF))
  823. goto frontend_detach;
  824. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  825. &core->i2c_adap, 0x43))
  826. goto frontend_detach;
  827. }
  828. break;
  829. case CX88_BOARD_ATI_HDTVWONDER:
  830. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  831. &ati_hdtvwonder,
  832. &core->i2c_adap);
  833. if (fe0->dvb.frontend != NULL) {
  834. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  835. &core->i2c_adap, 0x61,
  836. TUNER_PHILIPS_TUV1236D))
  837. goto frontend_detach;
  838. }
  839. break;
  840. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  841. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  842. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  843. &hauppauge_novas_config,
  844. &core->i2c_adap);
  845. if (fe0->dvb.frontend) {
  846. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  847. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  848. goto frontend_detach;
  849. }
  850. break;
  851. case CX88_BOARD_KWORLD_DVBS_100:
  852. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  853. &kworld_dvbs_100_config,
  854. &core->i2c_adap);
  855. if (fe0->dvb.frontend) {
  856. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  857. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  858. }
  859. break;
  860. case CX88_BOARD_GENIATECH_DVBS:
  861. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  862. &geniatech_dvbs_config,
  863. &core->i2c_adap);
  864. if (fe0->dvb.frontend) {
  865. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  866. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  867. }
  868. break;
  869. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  870. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  871. &pinnacle_pctv_hd_800i_config,
  872. &core->i2c_adap);
  873. if (fe0->dvb.frontend != NULL) {
  874. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  875. &core->i2c_adap,
  876. &pinnacle_pctv_hd_800i_tuner_config))
  877. goto frontend_detach;
  878. }
  879. break;
  880. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  881. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  882. &dvico_hdtv5_pci_nano_config,
  883. &core->i2c_adap);
  884. if (fe0->dvb.frontend != NULL) {
  885. struct dvb_frontend *fe;
  886. struct xc2028_config cfg = {
  887. .i2c_adap = &core->i2c_adap,
  888. .i2c_addr = 0x61,
  889. };
  890. static struct xc2028_ctrl ctl = {
  891. .fname = XC2028_DEFAULT_FIRMWARE,
  892. .max_len = 64,
  893. .scode_table = XC3028_FE_OREN538,
  894. };
  895. fe = dvb_attach(xc2028_attach,
  896. fe0->dvb.frontend, &cfg);
  897. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  898. fe->ops.tuner_ops.set_config(fe, &ctl);
  899. }
  900. break;
  901. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  902. case CX88_BOARD_WINFAST_DTV1800H:
  903. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  904. &cx88_pinnacle_hybrid_pctv,
  905. &core->i2c_adap);
  906. if (fe0->dvb.frontend) {
  907. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  908. if (attach_xc3028(0x61, dev) < 0)
  909. goto frontend_detach;
  910. }
  911. break;
  912. case CX88_BOARD_GENIATECH_X8000_MT:
  913. dev->ts_gen_cntrl = 0x00;
  914. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  915. &cx88_geniatech_x8000_mt,
  916. &core->i2c_adap);
  917. if (attach_xc3028(0x61, dev) < 0)
  918. goto frontend_detach;
  919. break;
  920. case CX88_BOARD_KWORLD_ATSC_120:
  921. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  922. &kworld_atsc_120_config,
  923. &core->i2c_adap);
  924. if (attach_xc3028(0x61, dev) < 0)
  925. goto frontend_detach;
  926. break;
  927. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  928. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  929. &dvico_fusionhdtv7_config,
  930. &core->i2c_adap);
  931. if (fe0->dvb.frontend != NULL) {
  932. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  933. &core->i2c_adap,
  934. &dvico_fusionhdtv7_tuner_config))
  935. goto frontend_detach;
  936. }
  937. break;
  938. case CX88_BOARD_HAUPPAUGE_HVR4000:
  939. /* MFE frontend 1 */
  940. mfe_shared = 1;
  941. dev->frontends.gate = 2;
  942. /* DVB-S/S2 Init */
  943. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  944. &hauppauge_hvr4000_config,
  945. &dev->core->i2c_adap);
  946. if (fe0->dvb.frontend) {
  947. if (!dvb_attach(isl6421_attach,
  948. fe0->dvb.frontend,
  949. &dev->core->i2c_adap,
  950. 0x08, ISL6421_DCL, 0x00))
  951. goto frontend_detach;
  952. }
  953. /* MFE frontend 2 */
  954. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  955. if (!fe1)
  956. goto frontend_detach;
  957. /* DVB-T Init */
  958. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  959. &hauppauge_hvr_config,
  960. &dev->core->i2c_adap);
  961. if (fe1->dvb.frontend) {
  962. fe1->dvb.frontend->id = 1;
  963. if (!dvb_attach(simple_tuner_attach,
  964. fe1->dvb.frontend,
  965. &dev->core->i2c_adap,
  966. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  967. goto frontend_detach;
  968. }
  969. break;
  970. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  971. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  972. &hauppauge_hvr4000_config,
  973. &dev->core->i2c_adap);
  974. if (fe0->dvb.frontend) {
  975. if (!dvb_attach(isl6421_attach,
  976. fe0->dvb.frontend,
  977. &dev->core->i2c_adap,
  978. 0x08, ISL6421_DCL, 0x00))
  979. goto frontend_detach;
  980. }
  981. break;
  982. case CX88_BOARD_PROF_6200:
  983. case CX88_BOARD_TBS_8910:
  984. case CX88_BOARD_TEVII_S420:
  985. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  986. &tevii_tuner_sharp_config,
  987. &core->i2c_adap);
  988. if (fe0->dvb.frontend != NULL) {
  989. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  990. &core->i2c_adap, DVB_PLL_OPERA1))
  991. goto frontend_detach;
  992. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  993. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  994. } else {
  995. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  996. &tevii_tuner_earda_config,
  997. &core->i2c_adap);
  998. if (fe0->dvb.frontend != NULL) {
  999. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1000. &core->i2c_adap))
  1001. goto frontend_detach;
  1002. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1003. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1004. }
  1005. }
  1006. break;
  1007. case CX88_BOARD_TEVII_S460:
  1008. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1009. &tevii_s460_config,
  1010. &core->i2c_adap);
  1011. if (fe0->dvb.frontend != NULL)
  1012. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1013. break;
  1014. case CX88_BOARD_OMICOM_SS4_PCI:
  1015. case CX88_BOARD_TBS_8920:
  1016. case CX88_BOARD_PROF_7300:
  1017. case CX88_BOARD_SATTRADE_ST4200:
  1018. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1019. &hauppauge_hvr4000_config,
  1020. &core->i2c_adap);
  1021. if (fe0->dvb.frontend != NULL)
  1022. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1023. break;
  1024. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1025. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1026. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1027. &core->i2c_adap);
  1028. if (fe0->dvb.frontend) {
  1029. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1030. if (attach_xc3028(0x61, dev) < 0)
  1031. goto frontend_detach;
  1032. }
  1033. break;
  1034. default:
  1035. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1036. core->name);
  1037. break;
  1038. }
  1039. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1040. printk(KERN_ERR
  1041. "%s/2: frontend initialization failed\n",
  1042. core->name);
  1043. goto frontend_detach;
  1044. }
  1045. /* define general-purpose callback pointer */
  1046. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1047. /* Ensure all frontends negotiate bus access */
  1048. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1049. if (fe1)
  1050. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1051. /* Put the analog decoder in standby to keep it quiet */
  1052. call_all(core, tuner, s_standby);
  1053. /* register everything */
  1054. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1055. &dev->pci->dev, adapter_nr, mfe_shared);
  1056. frontend_detach:
  1057. core->gate_ctrl = NULL;
  1058. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1059. return -EINVAL;
  1060. }
  1061. /* ----------------------------------------------------------- */
  1062. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1063. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1064. {
  1065. struct cx88_core *core = drv->core;
  1066. int err = 0;
  1067. dprintk( 1, "%s\n", __func__);
  1068. switch (core->boardnr) {
  1069. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1070. /* We arrive here with either the cx23416 or the cx22702
  1071. * on the bus. Take the bus from the cx23416 and enable the
  1072. * cx22702 demod
  1073. */
  1074. /* Toggle reset on cx22702 leaving i2c active */
  1075. cx_set(MO_GP0_IO, 0x00000080);
  1076. udelay(1000);
  1077. cx_clear(MO_GP0_IO, 0x00000080);
  1078. udelay(50);
  1079. cx_set(MO_GP0_IO, 0x00000080);
  1080. udelay(1000);
  1081. /* enable the cx22702 pins */
  1082. cx_clear(MO_GP0_IO, 0x00000004);
  1083. udelay(1000);
  1084. break;
  1085. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1086. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1087. /* Toggle reset on cx22702 leaving i2c active */
  1088. cx_set(MO_GP0_IO, 0x00000080);
  1089. udelay(1000);
  1090. cx_clear(MO_GP0_IO, 0x00000080);
  1091. udelay(50);
  1092. cx_set(MO_GP0_IO, 0x00000080);
  1093. udelay(1000);
  1094. switch (core->dvbdev->frontends.active_fe_id) {
  1095. case 1: /* DVB-S/S2 Enabled */
  1096. /* tri-state the cx22702 pins */
  1097. cx_set(MO_GP0_IO, 0x00000004);
  1098. /* Take the cx24116/cx24123 out of reset */
  1099. cx_write(MO_SRST_IO, 1);
  1100. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1101. break;
  1102. case 2: /* DVB-T Enabled */
  1103. /* Put the cx24116/cx24123 into reset */
  1104. cx_write(MO_SRST_IO, 0);
  1105. /* enable the cx22702 pins */
  1106. cx_clear(MO_GP0_IO, 0x00000004);
  1107. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1108. break;
  1109. }
  1110. udelay(1000);
  1111. break;
  1112. default:
  1113. err = -ENODEV;
  1114. }
  1115. return err;
  1116. }
  1117. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1118. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1119. {
  1120. struct cx88_core *core = drv->core;
  1121. int err = 0;
  1122. dprintk( 1, "%s\n", __func__);
  1123. switch (core->boardnr) {
  1124. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1125. /* Do Nothing, leave the cx22702 on the bus. */
  1126. break;
  1127. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1128. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1129. break;
  1130. default:
  1131. err = -ENODEV;
  1132. }
  1133. return err;
  1134. }
  1135. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1136. {
  1137. struct cx88_core *core = drv->core;
  1138. struct cx8802_dev *dev = drv->core->dvbdev;
  1139. int err;
  1140. struct videobuf_dvb_frontend *fe;
  1141. int i;
  1142. dprintk( 1, "%s\n", __func__);
  1143. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1144. core->boardnr,
  1145. core->name,
  1146. core->pci_bus,
  1147. core->pci_slot);
  1148. err = -ENODEV;
  1149. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1150. goto fail_core;
  1151. /* If vp3054 isn't enabled, a stub will just return 0 */
  1152. err = vp3054_i2c_probe(dev);
  1153. if (0 != err)
  1154. goto fail_core;
  1155. /* dvb stuff */
  1156. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1157. dev->ts_gen_cntrl = 0x0c;
  1158. err = cx8802_alloc_frontends(dev);
  1159. if (err)
  1160. goto fail_core;
  1161. err = -ENODEV;
  1162. for (i = 1; i <= core->board.num_frontends; i++) {
  1163. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1164. if (fe == NULL) {
  1165. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1166. __func__, i);
  1167. goto fail_probe;
  1168. }
  1169. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1170. &dev->pci->dev, &dev->slock,
  1171. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1172. V4L2_FIELD_TOP,
  1173. sizeof(struct cx88_buffer),
  1174. dev);
  1175. /* init struct videobuf_dvb */
  1176. fe->dvb.name = dev->core->name;
  1177. }
  1178. err = dvb_register(dev);
  1179. if (err)
  1180. /* frontends/adapter de-allocated in dvb_register */
  1181. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1182. core->name, err);
  1183. return err;
  1184. fail_probe:
  1185. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1186. fail_core:
  1187. return err;
  1188. }
  1189. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1190. {
  1191. struct cx88_core *core = drv->core;
  1192. struct cx8802_dev *dev = drv->core->dvbdev;
  1193. dprintk( 1, "%s\n", __func__);
  1194. videobuf_dvb_unregister_bus(&dev->frontends);
  1195. vp3054_i2c_remove(dev);
  1196. core->gate_ctrl = NULL;
  1197. return 0;
  1198. }
  1199. static struct cx8802_driver cx8802_dvb_driver = {
  1200. .type_id = CX88_MPEG_DVB,
  1201. .hw_access = CX8802_DRVCTL_SHARED,
  1202. .probe = cx8802_dvb_probe,
  1203. .remove = cx8802_dvb_remove,
  1204. .advise_acquire = cx8802_dvb_advise_acquire,
  1205. .advise_release = cx8802_dvb_advise_release,
  1206. };
  1207. static int __init dvb_init(void)
  1208. {
  1209. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1210. (CX88_VERSION_CODE >> 16) & 0xff,
  1211. (CX88_VERSION_CODE >> 8) & 0xff,
  1212. CX88_VERSION_CODE & 0xff);
  1213. #ifdef SNAPSHOT
  1214. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1215. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1216. #endif
  1217. return cx8802_register_driver(&cx8802_dvb_driver);
  1218. }
  1219. static void __exit dvb_fini(void)
  1220. {
  1221. cx8802_unregister_driver(&cx8802_dvb_driver);
  1222. }
  1223. module_init(dvb_init);
  1224. module_exit(dvb_fini);
  1225. /*
  1226. * Local variables:
  1227. * c-basic-offset: 8
  1228. * compile-command: "make DVB=1"
  1229. * End:
  1230. */