cx18-streams.c 21 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. /* FIXME change to video_ioctl2 if serialization lock can be removed */
  41. .ioctl = cx18_v4l2_ioctl,
  42. .release = cx18_v4l2_close,
  43. .poll = cx18_v4l2_enc_poll,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. enum v4l2_buf_type buf_type;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  62. },
  63. { /* CX18_ENC_STREAM_TYPE_TS */
  64. "TS",
  65. VFL_TYPE_GRABBER, -1,
  66. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  67. },
  68. { /* CX18_ENC_STREAM_TYPE_YUV */
  69. "encoder YUV",
  70. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  71. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  72. },
  73. { /* CX18_ENC_STREAM_TYPE_VBI */
  74. "encoder VBI",
  75. VFL_TYPE_VBI, 0,
  76. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
  77. },
  78. { /* CX18_ENC_STREAM_TYPE_PCM */
  79. "encoder PCM audio",
  80. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  81. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
  82. },
  83. { /* CX18_ENC_STREAM_TYPE_IDX */
  84. "encoder IDX",
  85. VFL_TYPE_GRABBER, -1,
  86. PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
  87. },
  88. { /* CX18_ENC_STREAM_TYPE_RAD */
  89. "encoder radio",
  90. VFL_TYPE_RADIO, 0,
  91. PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
  92. },
  93. };
  94. static void cx18_stream_init(struct cx18 *cx, int type)
  95. {
  96. struct cx18_stream *s = &cx->streams[type];
  97. struct video_device *video_dev = s->video_dev;
  98. /* we need to keep video_dev, so restore it afterwards */
  99. memset(s, 0, sizeof(*s));
  100. s->video_dev = video_dev;
  101. /* initialize cx18_stream fields */
  102. s->cx = cx;
  103. s->type = type;
  104. s->name = cx18_stream_info[type].name;
  105. s->handle = CX18_INVALID_TASK_HANDLE;
  106. s->dma = cx18_stream_info[type].dma;
  107. s->buffers = cx->stream_buffers[type];
  108. s->buf_size = cx->stream_buf_size[type];
  109. init_waitqueue_head(&s->waitq);
  110. s->id = -1;
  111. spin_lock_init(&s->q_free.lock);
  112. cx18_queue_init(&s->q_free);
  113. spin_lock_init(&s->q_busy.lock);
  114. cx18_queue_init(&s->q_busy);
  115. spin_lock_init(&s->q_full.lock);
  116. cx18_queue_init(&s->q_full);
  117. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  118. }
  119. static int cx18_prep_dev(struct cx18 *cx, int type)
  120. {
  121. struct cx18_stream *s = &cx->streams[type];
  122. u32 cap = cx->v4l2_cap;
  123. int num_offset = cx18_stream_info[type].num_offset;
  124. int num = cx->instance + cx18_first_minor + num_offset;
  125. /* These four fields are always initialized. If video_dev == NULL, then
  126. this stream is not in use. In that case no other fields but these
  127. four can be used. */
  128. s->video_dev = NULL;
  129. s->cx = cx;
  130. s->type = type;
  131. s->name = cx18_stream_info[type].name;
  132. /* Check whether the radio is supported */
  133. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  134. return 0;
  135. /* Check whether VBI is supported */
  136. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  137. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  138. return 0;
  139. /* User explicitly selected 0 buffers for these streams, so don't
  140. create them. */
  141. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  142. cx->stream_buffers[type] == 0) {
  143. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  144. return 0;
  145. }
  146. cx18_stream_init(cx, type);
  147. if (num_offset == -1)
  148. return 0;
  149. /* allocate and initialize the v4l2 video device structure */
  150. s->video_dev = video_device_alloc();
  151. if (s->video_dev == NULL) {
  152. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  153. s->name);
  154. return -ENOMEM;
  155. }
  156. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  157. cx->v4l2_dev.name, s->name);
  158. s->video_dev->num = num;
  159. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  160. s->video_dev->fops = &cx18_v4l2_enc_fops;
  161. s->video_dev->release = video_device_release;
  162. s->video_dev->tvnorms = V4L2_STD_ALL;
  163. cx18_set_funcs(s->video_dev);
  164. return 0;
  165. }
  166. /* Initialize v4l2 variables and register v4l2 devices */
  167. int cx18_streams_setup(struct cx18 *cx)
  168. {
  169. int type, ret;
  170. /* Setup V4L2 Devices */
  171. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  172. /* Prepare device */
  173. ret = cx18_prep_dev(cx, type);
  174. if (ret < 0)
  175. break;
  176. /* Allocate Stream */
  177. ret = cx18_stream_alloc(&cx->streams[type]);
  178. if (ret < 0)
  179. break;
  180. }
  181. if (type == CX18_MAX_STREAMS)
  182. return 0;
  183. /* One or more streams could not be initialized. Clean 'em all up. */
  184. cx18_streams_cleanup(cx, 0);
  185. return ret;
  186. }
  187. static int cx18_reg_dev(struct cx18 *cx, int type)
  188. {
  189. struct cx18_stream *s = &cx->streams[type];
  190. int vfl_type = cx18_stream_info[type].vfl_type;
  191. int num, ret;
  192. /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
  193. * We need a VFL_TYPE_TS defined.
  194. */
  195. if (strcmp("TS", s->name) == 0) {
  196. /* just return if no DVB is supported */
  197. if ((cx->card->hw_all & CX18_HW_DVB) == 0)
  198. return 0;
  199. ret = cx18_dvb_register(s);
  200. if (ret < 0) {
  201. CX18_ERR("DVB failed to register\n");
  202. return ret;
  203. }
  204. }
  205. if (s->video_dev == NULL)
  206. return 0;
  207. num = s->video_dev->num;
  208. /* card number + user defined offset + device offset */
  209. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  210. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  211. if (s_mpg->video_dev)
  212. num = s_mpg->video_dev->num
  213. + cx18_stream_info[type].num_offset;
  214. }
  215. video_set_drvdata(s->video_dev, s);
  216. /* Register device. First try the desired minor, then any free one. */
  217. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  218. if (ret < 0) {
  219. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  220. s->name, num);
  221. video_device_release(s->video_dev);
  222. s->video_dev = NULL;
  223. return ret;
  224. }
  225. num = s->video_dev->num;
  226. switch (vfl_type) {
  227. case VFL_TYPE_GRABBER:
  228. CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
  229. num, s->name, cx->stream_buffers[type],
  230. cx->stream_buf_size[type]/1024);
  231. break;
  232. case VFL_TYPE_RADIO:
  233. CX18_INFO("Registered device radio%d for %s\n",
  234. num, s->name);
  235. break;
  236. case VFL_TYPE_VBI:
  237. if (cx->stream_buffers[type])
  238. CX18_INFO("Registered device vbi%d for %s "
  239. "(%d x %d bytes)\n",
  240. num, s->name, cx->stream_buffers[type],
  241. cx->stream_buf_size[type]);
  242. else
  243. CX18_INFO("Registered device vbi%d for %s\n",
  244. num, s->name);
  245. break;
  246. }
  247. return 0;
  248. }
  249. /* Register v4l2 devices */
  250. int cx18_streams_register(struct cx18 *cx)
  251. {
  252. int type;
  253. int err;
  254. int ret = 0;
  255. /* Register V4L2 devices */
  256. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  257. err = cx18_reg_dev(cx, type);
  258. if (err && ret == 0)
  259. ret = err;
  260. }
  261. if (ret == 0)
  262. return 0;
  263. /* One or more streams could not be initialized. Clean 'em all up. */
  264. cx18_streams_cleanup(cx, 1);
  265. return ret;
  266. }
  267. /* Unregister v4l2 devices */
  268. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  269. {
  270. struct video_device *vdev;
  271. int type;
  272. /* Teardown all streams */
  273. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  274. if (cx->streams[type].dvb.enabled) {
  275. cx18_dvb_unregister(&cx->streams[type]);
  276. cx->streams[type].dvb.enabled = false;
  277. }
  278. vdev = cx->streams[type].video_dev;
  279. cx->streams[type].video_dev = NULL;
  280. if (vdev == NULL)
  281. continue;
  282. cx18_stream_free(&cx->streams[type]);
  283. /* Unregister or release device */
  284. if (unregister)
  285. video_unregister_device(vdev);
  286. else
  287. video_device_release(vdev);
  288. }
  289. }
  290. static void cx18_vbi_setup(struct cx18_stream *s)
  291. {
  292. struct cx18 *cx = s->cx;
  293. int raw = cx18_raw_vbi(cx);
  294. u32 data[CX2341X_MBOX_MAX_DATA];
  295. int lines;
  296. if (cx->is_60hz) {
  297. cx->vbi.count = 12;
  298. cx->vbi.start[0] = 10;
  299. cx->vbi.start[1] = 273;
  300. } else { /* PAL/SECAM */
  301. cx->vbi.count = 18;
  302. cx->vbi.start[0] = 6;
  303. cx->vbi.start[1] = 318;
  304. }
  305. /* setup VBI registers */
  306. v4l2_subdev_call(cx->sd_av, video, s_fmt, &cx->vbi.in);
  307. /*
  308. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  309. * VBI when the first analog capture channel starts, as once it starts
  310. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  311. * (i.e. for the VBI capture channels). We also send it for each
  312. * analog capture channel anyway just to make sure we get the proper
  313. * behavior
  314. */
  315. if (raw) {
  316. lines = cx->vbi.count * 2;
  317. } else {
  318. /*
  319. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  320. * The EAV RP code's Field bit toggles on line 4, a few lines
  321. * after the Vertcal Blank bit has already toggled.
  322. * Tell the encoder to capture 21-4+1=18 lines per field,
  323. * since we want lines 10 through 21.
  324. *
  325. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  326. * The EAV RP code's Field bit toggles on line 1, a few lines
  327. * after the Vertcal Blank bit has already toggled.
  328. * (We've actually set the digitizer so that the Field bit
  329. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  330. * lines per field, since we want lines 6 through 23.
  331. */
  332. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  333. }
  334. data[0] = s->handle;
  335. /* Lines per field */
  336. data[1] = (lines / 2) | ((lines / 2) << 16);
  337. /* bytes per line */
  338. data[2] = (raw ? vbi_active_samples
  339. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  340. : vbi_hblank_samples_50Hz));
  341. /* Every X number of frames a VBI interrupt arrives
  342. (frames as in 25 or 30 fps) */
  343. data[3] = 1;
  344. /*
  345. * Set the SAV/EAV RP codes to look for as start/stop points
  346. * when in VIP-1.1 mode
  347. */
  348. if (raw) {
  349. /*
  350. * Start codes for beginning of "active" line in vertical blank
  351. * 0x20 ( VerticalBlank )
  352. * 0x60 ( EvenField VerticalBlank )
  353. */
  354. data[4] = 0x20602060;
  355. /*
  356. * End codes for end of "active" raw lines and regular lines
  357. * 0x30 ( VerticalBlank HorizontalBlank)
  358. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  359. * 0x90 (Task HorizontalBlank)
  360. * 0xd0 (Task EvenField HorizontalBlank)
  361. */
  362. data[5] = 0x307090d0;
  363. } else {
  364. /*
  365. * End codes for active video, we want data in the hblank region
  366. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  367. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  368. *
  369. * Since the V bit is only allowed to toggle in the EAV RP code,
  370. * just before the first active region line, these two
  371. * are problematic:
  372. * 0x90 (Task HorizontalBlank)
  373. * 0xd0 (Task EvenField HorizontalBlank)
  374. *
  375. * We have set the digitzer such that we don't have to worry
  376. * about these problem codes.
  377. */
  378. data[4] = 0xB0F0B0F0;
  379. /*
  380. * Start codes for beginning of active line in vertical blank
  381. * 0xa0 (Task VerticalBlank )
  382. * 0xe0 (Task EvenField VerticalBlank )
  383. */
  384. data[5] = 0xA0E0A0E0;
  385. }
  386. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  387. data[0], data[1], data[2], data[3], data[4], data[5]);
  388. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  389. }
  390. static
  391. struct cx18_queue *_cx18_stream_put_buf_fw(struct cx18_stream *s,
  392. struct cx18_buffer *buf)
  393. {
  394. struct cx18 *cx = s->cx;
  395. struct cx18_queue *q;
  396. /* Don't give it to the firmware, if we're not running a capture */
  397. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  398. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  399. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  400. return cx18_enqueue(s, buf, &s->q_free);
  401. q = cx18_enqueue(s, buf, &s->q_busy);
  402. if (q != &s->q_busy)
  403. return q; /* The firmware has the max buffers it can handle */
  404. cx18_buf_sync_for_device(s, buf);
  405. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  406. (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
  407. 1, buf->id, s->buf_size);
  408. return q;
  409. }
  410. static
  411. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  412. {
  413. struct cx18_queue *q;
  414. struct cx18_buffer *buf;
  415. if (atomic_read(&s->q_free.buffers) == 0 ||
  416. atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
  417. return;
  418. /* Move from q_free to q_busy notifying the firmware, until the limit */
  419. do {
  420. buf = cx18_dequeue(s, &s->q_free);
  421. if (buf == NULL)
  422. break;
  423. q = _cx18_stream_put_buf_fw(s, buf);
  424. } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
  425. && q == &s->q_busy);
  426. }
  427. void cx18_out_work_handler(struct work_struct *work)
  428. {
  429. struct cx18_stream *s =
  430. container_of(work, struct cx18_stream, out_work_order);
  431. _cx18_stream_load_fw_queue(s);
  432. }
  433. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  434. {
  435. u32 data[MAX_MB_ARGUMENTS];
  436. struct cx18 *cx = s->cx;
  437. struct cx18_buffer *buf;
  438. int captype = 0;
  439. struct cx18_api_func_private priv;
  440. if (s->video_dev == NULL && s->dvb.enabled == 0)
  441. return -EINVAL;
  442. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  443. switch (s->type) {
  444. case CX18_ENC_STREAM_TYPE_MPG:
  445. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  446. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  447. cx->dualwatch_jiffies = jiffies;
  448. cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
  449. cx->search_pack_header = 0;
  450. break;
  451. case CX18_ENC_STREAM_TYPE_TS:
  452. captype = CAPTURE_CHANNEL_TYPE_TS;
  453. break;
  454. case CX18_ENC_STREAM_TYPE_YUV:
  455. captype = CAPTURE_CHANNEL_TYPE_YUV;
  456. break;
  457. case CX18_ENC_STREAM_TYPE_PCM:
  458. captype = CAPTURE_CHANNEL_TYPE_PCM;
  459. break;
  460. case CX18_ENC_STREAM_TYPE_VBI:
  461. #ifdef CX18_ENCODER_PARSES_SLICED
  462. captype = cx18_raw_vbi(cx) ?
  463. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  464. #else
  465. /*
  466. * Currently we set things up so that Sliced VBI from the
  467. * digitizer is handled as Raw VBI by the encoder
  468. */
  469. captype = CAPTURE_CHANNEL_TYPE_VBI;
  470. #endif
  471. cx->vbi.frame = 0;
  472. cx->vbi.inserted_frame = 0;
  473. memset(cx->vbi.sliced_mpeg_size,
  474. 0, sizeof(cx->vbi.sliced_mpeg_size));
  475. break;
  476. default:
  477. return -EINVAL;
  478. }
  479. /* Clear Streamoff flags in case left from last capture */
  480. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  481. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  482. s->handle = data[0];
  483. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  484. /*
  485. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  486. * set up all the parameters, as it is not obvious which parameters the
  487. * firmware shares across capture channel types and which it does not.
  488. *
  489. * Some of the cx18_vapi() calls below apply to only certain capture
  490. * channel types. We're hoping there's no harm in calling most of them
  491. * anyway, as long as the values are all consistent. Setting some
  492. * shared parameters will have no effect once an analog capture channel
  493. * has started streaming.
  494. */
  495. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  496. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  497. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  498. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  499. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  500. /*
  501. * Audio related reset according to
  502. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  503. */
  504. if (atomic_read(&cx->ana_capturing) == 0)
  505. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  506. s->handle, 12);
  507. /*
  508. * Number of lines for Field 1 & Field 2 according to
  509. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  510. * Field 1 is 312 for 625 line systems in BT.656
  511. * Field 2 is 313 for 625 line systems in BT.656
  512. */
  513. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  514. s->handle, 312, 313);
  515. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  516. cx18_vbi_setup(s);
  517. /*
  518. * assign program index info.
  519. * Mask 7: select I/P/B, Num_req: 400 max
  520. * FIXME - currently we have this hardcoded as disabled
  521. */
  522. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
  523. /* Call out to the common CX2341x API setup for user controls */
  524. priv.cx = cx;
  525. priv.s = s;
  526. cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
  527. /*
  528. * When starting a capture and we're set for radio,
  529. * ensure the video is muted, despite the user control.
  530. */
  531. if (!cx->params.video_mute &&
  532. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  533. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  534. (cx->params.video_mute_yuv << 8) | 1);
  535. }
  536. if (atomic_read(&cx->tot_capturing) == 0) {
  537. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  538. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  539. }
  540. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  541. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  542. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  543. /* Init all the cpu_mdls for this stream */
  544. cx18_flush_queues(s);
  545. spin_lock(&s->q_free.lock);
  546. list_for_each_entry(buf, &s->q_free.list, list) {
  547. cx18_writel(cx, buf->dma_handle,
  548. &cx->scb->cpu_mdl[buf->id].paddr);
  549. cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
  550. }
  551. spin_unlock(&s->q_free.lock);
  552. _cx18_stream_load_fw_queue(s);
  553. /* begin_capture */
  554. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  555. CX18_DEBUG_WARN("Error starting capture!\n");
  556. /* Ensure we're really not capturing before releasing MDLs */
  557. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  558. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  559. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  560. else
  561. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  562. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  563. /* FIXME - CX18_F_S_STREAMOFF as well? */
  564. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  565. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  566. s->handle = CX18_INVALID_TASK_HANDLE;
  567. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  568. if (atomic_read(&cx->tot_capturing) == 0) {
  569. set_bit(CX18_F_I_EOS, &cx->i_flags);
  570. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  571. }
  572. return -EINVAL;
  573. }
  574. /* you're live! sit back and await interrupts :) */
  575. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  576. atomic_inc(&cx->ana_capturing);
  577. atomic_inc(&cx->tot_capturing);
  578. return 0;
  579. }
  580. void cx18_stop_all_captures(struct cx18 *cx)
  581. {
  582. int i;
  583. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  584. struct cx18_stream *s = &cx->streams[i];
  585. if (s->video_dev == NULL && s->dvb.enabled == 0)
  586. continue;
  587. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  588. cx18_stop_v4l2_encode_stream(s, 0);
  589. }
  590. }
  591. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  592. {
  593. struct cx18 *cx = s->cx;
  594. unsigned long then;
  595. if (s->video_dev == NULL && s->dvb.enabled == 0)
  596. return -EINVAL;
  597. /* This function assumes that you are allowed to stop the capture
  598. and that we are actually capturing */
  599. CX18_DEBUG_INFO("Stop Capture\n");
  600. if (atomic_read(&cx->tot_capturing) == 0)
  601. return 0;
  602. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  603. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  604. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  605. else
  606. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  607. then = jiffies;
  608. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  609. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  610. }
  611. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  612. atomic_dec(&cx->ana_capturing);
  613. atomic_dec(&cx->tot_capturing);
  614. /* Clear capture and no-read bits */
  615. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  616. /* Tell the CX23418 it can't use our buffers anymore */
  617. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  618. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  619. s->handle = CX18_INVALID_TASK_HANDLE;
  620. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  621. if (atomic_read(&cx->tot_capturing) > 0)
  622. return 0;
  623. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  624. wake_up(&s->waitq);
  625. return 0;
  626. }
  627. u32 cx18_find_handle(struct cx18 *cx)
  628. {
  629. int i;
  630. /* find first available handle to be used for global settings */
  631. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  632. struct cx18_stream *s = &cx->streams[i];
  633. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  634. return s->handle;
  635. }
  636. return CX18_INVALID_TASK_HANDLE;
  637. }
  638. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  639. {
  640. int i;
  641. struct cx18_stream *s;
  642. if (handle == CX18_INVALID_TASK_HANDLE)
  643. return NULL;
  644. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  645. s = &cx->streams[i];
  646. if (s->handle != handle)
  647. continue;
  648. if (s->video_dev || s->dvb.enabled)
  649. return s;
  650. }
  651. return NULL;
  652. }