drm_edid.c 42 KB

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  1. /*
  2. * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3. * Copyright (c) 2007-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  7. * FB layer.
  8. * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the
  18. * next paragraph) shall be included in all copies or substantial portions
  19. * of the Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  24. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  25. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  26. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27. * DEALINGS IN THE SOFTWARE.
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/i2c.h>
  31. #include <linux/i2c-algo-bit.h>
  32. #include "drmP.h"
  33. #include "drm_edid.h"
  34. /*
  35. * TODO:
  36. * - support EDID 1.4 (incl. CE blocks)
  37. */
  38. /*
  39. * EDID blocks out in the wild have a variety of bugs, try to collect
  40. * them here (note that userspace may work around broken monitors first,
  41. * but fixes should make their way here so that the kernel "just works"
  42. * on as many displays as possible).
  43. */
  44. /* First detailed mode wrong, use largest 60Hz mode */
  45. #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
  46. /* Reported 135MHz pixel clock is too high, needs adjustment */
  47. #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
  48. /* Prefer the largest mode at 75 Hz */
  49. #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
  50. /* Detail timing is in cm not mm */
  51. #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
  52. /* Detailed timing descriptors have bogus size values, so just take the
  53. * maximum size and use that.
  54. */
  55. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
  56. /* Monitor forgot to set the first detailed is preferred bit. */
  57. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
  58. /* use +hsync +vsync for detailed mode */
  59. #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
  60. /* define the number of Extension EDID block */
  61. #define MAX_EDID_EXT_NUM 4
  62. #define LEVEL_DMT 0
  63. #define LEVEL_GTF 1
  64. #define LEVEL_CVT 2
  65. static struct edid_quirk {
  66. char *vendor;
  67. int product_id;
  68. u32 quirks;
  69. } edid_quirk_list[] = {
  70. /* Acer AL1706 */
  71. { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  72. /* Acer F51 */
  73. { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  74. /* Unknown Acer */
  75. { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  76. /* Belinea 10 15 55 */
  77. { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  78. { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  79. /* Envision Peripherals, Inc. EN-7100e */
  80. { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  81. /* Funai Electronics PM36B */
  82. { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  83. EDID_QUIRK_DETAILED_IN_CM },
  84. /* LG Philips LCD LP154W01-A5 */
  85. { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  86. { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  87. /* Philips 107p5 CRT */
  88. { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  89. /* Proview AY765C */
  90. { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  91. /* Samsung SyncMaster 205BW. Note: irony */
  92. { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  93. /* Samsung SyncMaster 22[5-6]BW */
  94. { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  95. { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  96. };
  97. /* Valid EDID header has these bytes */
  98. static const u8 edid_header[] = {
  99. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  100. };
  101. /**
  102. * edid_is_valid - sanity check EDID data
  103. * @edid: EDID data
  104. *
  105. * Sanity check the EDID block by looking at the header, the version number
  106. * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
  107. * valid.
  108. */
  109. static bool edid_is_valid(struct edid *edid)
  110. {
  111. int i;
  112. u8 csum = 0;
  113. u8 *raw_edid = (u8 *)edid;
  114. if (memcmp(edid->header, edid_header, sizeof(edid_header)))
  115. goto bad;
  116. if (edid->version != 1) {
  117. DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  118. goto bad;
  119. }
  120. if (edid->revision > 4)
  121. DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  122. for (i = 0; i < EDID_LENGTH; i++)
  123. csum += raw_edid[i];
  124. if (csum) {
  125. DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  126. goto bad;
  127. }
  128. return 1;
  129. bad:
  130. if (raw_edid) {
  131. DRM_ERROR("Raw EDID:\n");
  132. print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  133. printk("\n");
  134. }
  135. return 0;
  136. }
  137. /**
  138. * edid_vendor - match a string against EDID's obfuscated vendor field
  139. * @edid: EDID to match
  140. * @vendor: vendor string
  141. *
  142. * Returns true if @vendor is in @edid, false otherwise
  143. */
  144. static bool edid_vendor(struct edid *edid, char *vendor)
  145. {
  146. char edid_vendor[3];
  147. edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  148. edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  149. ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  150. edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  151. return !strncmp(edid_vendor, vendor, 3);
  152. }
  153. /**
  154. * edid_get_quirks - return quirk flags for a given EDID
  155. * @edid: EDID to process
  156. *
  157. * This tells subsequent routines what fixes they need to apply.
  158. */
  159. static u32 edid_get_quirks(struct edid *edid)
  160. {
  161. struct edid_quirk *quirk;
  162. int i;
  163. for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  164. quirk = &edid_quirk_list[i];
  165. if (edid_vendor(edid, quirk->vendor) &&
  166. (EDID_PRODUCT_ID(edid) == quirk->product_id))
  167. return quirk->quirks;
  168. }
  169. return 0;
  170. }
  171. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  172. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  173. /**
  174. * edid_fixup_preferred - set preferred modes based on quirk list
  175. * @connector: has mode list to fix up
  176. * @quirks: quirks list
  177. *
  178. * Walk the mode list for @connector, clearing the preferred status
  179. * on existing modes and setting it anew for the right mode ala @quirks.
  180. */
  181. static void edid_fixup_preferred(struct drm_connector *connector,
  182. u32 quirks)
  183. {
  184. struct drm_display_mode *t, *cur_mode, *preferred_mode;
  185. int target_refresh = 0;
  186. if (list_empty(&connector->probed_modes))
  187. return;
  188. if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  189. target_refresh = 60;
  190. if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  191. target_refresh = 75;
  192. preferred_mode = list_first_entry(&connector->probed_modes,
  193. struct drm_display_mode, head);
  194. list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  195. cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  196. if (cur_mode == preferred_mode)
  197. continue;
  198. /* Largest mode is preferred */
  199. if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  200. preferred_mode = cur_mode;
  201. /* At a given size, try to get closest to target refresh */
  202. if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  203. MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  204. MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  205. preferred_mode = cur_mode;
  206. }
  207. }
  208. preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  209. }
  210. /*
  211. * Add the Autogenerated from the DMT spec.
  212. * This table is copied from xfree86/modes/xf86EdidModes.c.
  213. * But the mode with Reduced blank feature is deleted.
  214. */
  215. static struct drm_display_mode drm_dmt_modes[] = {
  216. /* 640x350@85Hz */
  217. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  218. 736, 832, 0, 350, 382, 385, 445, 0,
  219. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  220. /* 640x400@85Hz */
  221. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  222. 736, 832, 0, 400, 401, 404, 445, 0,
  223. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  224. /* 720x400@85Hz */
  225. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  226. 828, 936, 0, 400, 401, 404, 446, 0,
  227. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  228. /* 640x480@60Hz */
  229. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  230. 752, 800, 0, 480, 489, 492, 525, 0,
  231. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  232. /* 640x480@72Hz */
  233. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  234. 704, 832, 0, 480, 489, 492, 520, 0,
  235. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  236. /* 640x480@75Hz */
  237. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  238. 720, 840, 0, 480, 481, 484, 500, 0,
  239. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  240. /* 640x480@85Hz */
  241. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  242. 752, 832, 0, 480, 481, 484, 509, 0,
  243. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  244. /* 800x600@56Hz */
  245. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  246. 896, 1024, 0, 600, 601, 603, 625, 0,
  247. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  248. /* 800x600@60Hz */
  249. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  250. 968, 1056, 0, 600, 601, 605, 628, 0,
  251. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  252. /* 800x600@72Hz */
  253. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  254. 976, 1040, 0, 600, 637, 643, 666, 0,
  255. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  256. /* 800x600@75Hz */
  257. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  258. 896, 1056, 0, 600, 601, 604, 625, 0,
  259. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  260. /* 800x600@85Hz */
  261. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  262. 896, 1048, 0, 600, 601, 604, 631, 0,
  263. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  264. /* 848x480@60Hz */
  265. { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  266. 976, 1088, 0, 480, 486, 494, 517, 0,
  267. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  268. /* 1024x768@43Hz, interlace */
  269. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  270. 1208, 1264, 0, 768, 768, 772, 817, 0,
  271. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  272. DRM_MODE_FLAG_INTERLACE) },
  273. /* 1024x768@60Hz */
  274. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  275. 1184, 1344, 0, 768, 771, 777, 806, 0,
  276. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  277. /* 1024x768@70Hz */
  278. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  279. 1184, 1328, 0, 768, 771, 777, 806, 0,
  280. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  281. /* 1024x768@75Hz */
  282. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  283. 1136, 1312, 0, 768, 769, 772, 800, 0,
  284. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  285. /* 1024x768@85Hz */
  286. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  287. 1072, 1376, 0, 768, 769, 772, 808, 0,
  288. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  289. /* 1152x864@75Hz */
  290. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  291. 1344, 1600, 0, 864, 865, 868, 900, 0,
  292. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  293. /* 1280x768@60Hz */
  294. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  295. 1472, 1664, 0, 768, 771, 778, 798, 0,
  296. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  297. /* 1280x768@75Hz */
  298. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  299. 1488, 1696, 0, 768, 771, 778, 805, 0,
  300. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  301. /* 1280x768@85Hz */
  302. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  303. 1496, 1712, 0, 768, 771, 778, 809, 0,
  304. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  305. /* 1280x800@60Hz */
  306. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  307. 1480, 1680, 0, 800, 803, 809, 831, 0,
  308. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  309. /* 1280x800@75Hz */
  310. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  311. 1488, 1696, 0, 800, 803, 809, 838, 0,
  312. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  313. /* 1280x800@85Hz */
  314. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  315. 1496, 1712, 0, 800, 803, 809, 843, 0,
  316. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  317. /* 1280x960@60Hz */
  318. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  319. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  320. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  321. /* 1280x960@85Hz */
  322. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  323. 1504, 1728, 0, 960, 961, 964, 1011, 0,
  324. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  325. /* 1280x1024@60Hz */
  326. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  327. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  328. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  329. /* 1280x1024@75Hz */
  330. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  331. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  332. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  333. /* 1280x1024@85Hz */
  334. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  335. 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  336. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  337. /* 1360x768@60Hz */
  338. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  339. 1536, 1792, 0, 768, 771, 777, 795, 0,
  340. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  341. /* 1440x1050@60Hz */
  342. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  343. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  344. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  345. /* 1440x1050@75Hz */
  346. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  347. 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  348. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  349. /* 1440x1050@85Hz */
  350. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  351. 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  352. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  353. /* 1440x900@60Hz */
  354. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  355. 1672, 1904, 0, 900, 903, 909, 934, 0,
  356. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  357. /* 1440x900@75Hz */
  358. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  359. 1688, 1936, 0, 900, 903, 909, 942, 0,
  360. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  361. /* 1440x900@85Hz */
  362. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  363. 1696, 1952, 0, 900, 903, 909, 948, 0,
  364. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  365. /* 1600x1200@60Hz */
  366. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  367. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  368. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  369. /* 1600x1200@65Hz */
  370. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  371. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  372. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  373. /* 1600x1200@70Hz */
  374. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  375. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  376. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  377. /* 1600x1200@75Hz */
  378. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  379. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  380. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  381. /* 1600x1200@85Hz */
  382. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  383. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  384. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  385. /* 1680x1050@60Hz */
  386. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  387. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  388. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  389. /* 1680x1050@75Hz */
  390. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  391. 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  392. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  393. /* 1680x1050@85Hz */
  394. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  395. 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  396. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  397. /* 1792x1344@60Hz */
  398. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  399. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  400. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  401. /* 1729x1344@75Hz */
  402. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  403. 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  404. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  405. /* 1853x1392@60Hz */
  406. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  407. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  408. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  409. /* 1856x1392@75Hz */
  410. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  411. 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  412. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  413. /* 1920x1200@60Hz */
  414. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  415. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  416. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  417. /* 1920x1200@75Hz */
  418. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  419. 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  420. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  421. /* 1920x1200@85Hz */
  422. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  423. 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  424. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  425. /* 1920x1440@60Hz */
  426. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  427. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  428. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  429. /* 1920x1440@75Hz */
  430. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  431. 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  432. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  433. /* 2560x1600@60Hz */
  434. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  435. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  436. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  437. /* 2560x1600@75HZ */
  438. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  439. 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  440. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  441. /* 2560x1600@85HZ */
  442. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  443. 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  444. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  445. };
  446. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  447. int hsize, int vsize, int fresh)
  448. {
  449. int i, count;
  450. struct drm_display_mode *ptr, *mode;
  451. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  452. mode = NULL;
  453. for (i = 0; i < count; i++) {
  454. ptr = &drm_dmt_modes[i];
  455. if (hsize == ptr->hdisplay &&
  456. vsize == ptr->vdisplay &&
  457. fresh == drm_mode_vrefresh(ptr)) {
  458. /* get the expected default mode */
  459. mode = drm_mode_duplicate(dev, ptr);
  460. break;
  461. }
  462. }
  463. return mode;
  464. }
  465. /*
  466. * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
  467. * monitors fill with ascii space (0x20) instead.
  468. */
  469. static int
  470. bad_std_timing(u8 a, u8 b)
  471. {
  472. return (a == 0x00 && b == 0x00) ||
  473. (a == 0x01 && b == 0x01) ||
  474. (a == 0x20 && b == 0x20);
  475. }
  476. /**
  477. * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  478. * @t: standard timing params
  479. * @timing_level: standard timing level
  480. *
  481. * Take the standard timing params (in this case width, aspect, and refresh)
  482. * and convert them into a real mode using CVT/GTF/DMT.
  483. *
  484. * Punts for now, but should eventually use the FB layer's CVT based mode
  485. * generation code.
  486. */
  487. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  488. struct std_timing *t,
  489. int revision,
  490. int timing_level)
  491. {
  492. struct drm_display_mode *mode;
  493. int hsize, vsize;
  494. int vrefresh_rate;
  495. unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  496. >> EDID_TIMING_ASPECT_SHIFT;
  497. unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  498. >> EDID_TIMING_VFREQ_SHIFT;
  499. if (bad_std_timing(t->hsize, t->vfreq_aspect))
  500. return NULL;
  501. /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  502. hsize = t->hsize * 8 + 248;
  503. /* vrefresh_rate = vfreq + 60 */
  504. vrefresh_rate = vfreq + 60;
  505. /* the vdisplay is calculated based on the aspect ratio */
  506. if (aspect_ratio == 0) {
  507. if (revision < 3)
  508. vsize = hsize;
  509. else
  510. vsize = (hsize * 10) / 16;
  511. } else if (aspect_ratio == 1)
  512. vsize = (hsize * 3) / 4;
  513. else if (aspect_ratio == 2)
  514. vsize = (hsize * 4) / 5;
  515. else
  516. vsize = (hsize * 9) / 16;
  517. /* HDTV hack */
  518. if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  519. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  520. false);
  521. mode->hdisplay = 1366;
  522. mode->vsync_start = mode->vsync_start - 1;
  523. mode->vsync_end = mode->vsync_end - 1;
  524. return mode;
  525. }
  526. mode = NULL;
  527. /* check whether it can be found in default mode table */
  528. mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  529. if (mode)
  530. return mode;
  531. switch (timing_level) {
  532. case LEVEL_DMT:
  533. break;
  534. case LEVEL_GTF:
  535. mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  536. break;
  537. case LEVEL_CVT:
  538. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  539. false);
  540. break;
  541. }
  542. return mode;
  543. }
  544. /**
  545. * drm_mode_detailed - create a new mode from an EDID detailed timing section
  546. * @dev: DRM device (needed to create new mode)
  547. * @edid: EDID block
  548. * @timing: EDID detailed timing info
  549. * @quirks: quirks to apply
  550. *
  551. * An EDID detailed timing block contains enough info for us to create and
  552. * return a new struct drm_display_mode.
  553. */
  554. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  555. struct edid *edid,
  556. struct detailed_timing *timing,
  557. u32 quirks)
  558. {
  559. struct drm_display_mode *mode;
  560. struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  561. unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  562. unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  563. unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  564. unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  565. unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  566. unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  567. unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  568. unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  569. /* ignore tiny modes */
  570. if (hactive < 64 || vactive < 64)
  571. return NULL;
  572. if (pt->misc & DRM_EDID_PT_STEREO) {
  573. printk(KERN_WARNING "stereo mode not supported\n");
  574. return NULL;
  575. }
  576. if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  577. printk(KERN_WARNING "integrated sync not supported\n");
  578. return NULL;
  579. }
  580. /* it is incorrect if hsync/vsync width is zero */
  581. if (!hsync_pulse_width || !vsync_pulse_width) {
  582. DRM_DEBUG_KMS("Incorrect Detailed timing. "
  583. "Wrong Hsync/Vsync pulse width\n");
  584. return NULL;
  585. }
  586. mode = drm_mode_create(dev);
  587. if (!mode)
  588. return NULL;
  589. mode->type = DRM_MODE_TYPE_DRIVER;
  590. if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  591. timing->pixel_clock = cpu_to_le16(1088);
  592. mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  593. mode->hdisplay = hactive;
  594. mode->hsync_start = mode->hdisplay + hsync_offset;
  595. mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  596. mode->htotal = mode->hdisplay + hblank;
  597. mode->vdisplay = vactive;
  598. mode->vsync_start = mode->vdisplay + vsync_offset;
  599. mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  600. mode->vtotal = mode->vdisplay + vblank;
  601. /* perform the basic check for the detailed timing */
  602. if (mode->hsync_end > mode->htotal ||
  603. mode->vsync_end > mode->vtotal) {
  604. drm_mode_destroy(dev, mode);
  605. DRM_DEBUG_KMS("Incorrect detailed timing. "
  606. "Sync is beyond the blank.\n");
  607. return NULL;
  608. }
  609. drm_mode_set_name(mode);
  610. if (pt->misc & DRM_EDID_PT_INTERLACED)
  611. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  612. if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  613. pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  614. }
  615. mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  616. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  617. mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  618. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  619. mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  620. mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  621. if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  622. mode->width_mm *= 10;
  623. mode->height_mm *= 10;
  624. }
  625. if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  626. mode->width_mm = edid->width_cm * 10;
  627. mode->height_mm = edid->height_cm * 10;
  628. }
  629. return mode;
  630. }
  631. /*
  632. * Detailed mode info for the EDID "established modes" data to use.
  633. */
  634. static struct drm_display_mode edid_est_modes[] = {
  635. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  636. 968, 1056, 0, 600, 601, 605, 628, 0,
  637. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  638. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  639. 896, 1024, 0, 600, 601, 603, 625, 0,
  640. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  641. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  642. 720, 840, 0, 480, 481, 484, 500, 0,
  643. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  644. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  645. 704, 832, 0, 480, 489, 491, 520, 0,
  646. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  647. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  648. 768, 864, 0, 480, 483, 486, 525, 0,
  649. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  650. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  651. 752, 800, 0, 480, 490, 492, 525, 0,
  652. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  653. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  654. 846, 900, 0, 400, 421, 423, 449, 0,
  655. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  656. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  657. 846, 900, 0, 400, 412, 414, 449, 0,
  658. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  659. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  660. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  661. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  662. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  663. 1136, 1312, 0, 768, 769, 772, 800, 0,
  664. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  665. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  666. 1184, 1328, 0, 768, 771, 777, 806, 0,
  667. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  668. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  669. 1184, 1344, 0, 768, 771, 777, 806, 0,
  670. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  671. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  672. 1208, 1264, 0, 768, 768, 776, 817, 0,
  673. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  674. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  675. 928, 1152, 0, 624, 625, 628, 667, 0,
  676. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  677. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  678. 896, 1056, 0, 600, 601, 604, 625, 0,
  679. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  680. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  681. 976, 1040, 0, 600, 637, 643, 666, 0,
  682. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  683. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  684. 1344, 1600, 0, 864, 865, 868, 900, 0,
  685. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  686. };
  687. #define EDID_EST_TIMINGS 16
  688. #define EDID_STD_TIMINGS 8
  689. #define EDID_DETAILED_TIMINGS 4
  690. /**
  691. * add_established_modes - get est. modes from EDID and add them
  692. * @edid: EDID block to scan
  693. *
  694. * Each EDID block contains a bitmap of the supported "established modes" list
  695. * (defined above). Tease them out and add them to the global modes list.
  696. */
  697. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  698. {
  699. struct drm_device *dev = connector->dev;
  700. unsigned long est_bits = edid->established_timings.t1 |
  701. (edid->established_timings.t2 << 8) |
  702. ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  703. int i, modes = 0;
  704. for (i = 0; i <= EDID_EST_TIMINGS; i++)
  705. if (est_bits & (1<<i)) {
  706. struct drm_display_mode *newmode;
  707. newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  708. if (newmode) {
  709. drm_mode_probed_add(connector, newmode);
  710. modes++;
  711. }
  712. }
  713. return modes;
  714. }
  715. /**
  716. * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  717. * @edid: EDID block to scan
  718. */
  719. static int standard_timing_level(struct edid *edid)
  720. {
  721. if (edid->revision >= 2) {
  722. if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  723. return LEVEL_CVT;
  724. return LEVEL_GTF;
  725. }
  726. return LEVEL_DMT;
  727. }
  728. /**
  729. * add_standard_modes - get std. modes from EDID and add them
  730. * @edid: EDID block to scan
  731. *
  732. * Standard modes can be calculated using the CVT standard. Grab them from
  733. * @edid, calculate them, and add them to the list.
  734. */
  735. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  736. {
  737. struct drm_device *dev = connector->dev;
  738. int i, modes = 0;
  739. int timing_level;
  740. timing_level = standard_timing_level(edid);
  741. for (i = 0; i < EDID_STD_TIMINGS; i++) {
  742. struct std_timing *t = &edid->standard_timings[i];
  743. struct drm_display_mode *newmode;
  744. /* If std timings bytes are 1, 1 it's empty */
  745. if (t->hsize == 1 && t->vfreq_aspect == 1)
  746. continue;
  747. newmode = drm_mode_std(dev, &edid->standard_timings[i],
  748. edid->revision, timing_level);
  749. if (newmode) {
  750. drm_mode_probed_add(connector, newmode);
  751. modes++;
  752. }
  753. }
  754. return modes;
  755. }
  756. /**
  757. * add_detailed_modes - get detailed mode info from EDID data
  758. * @connector: attached connector
  759. * @edid: EDID block to scan
  760. * @quirks: quirks to apply
  761. *
  762. * Some of the detailed timing sections may contain mode information. Grab
  763. * it and add it to the list.
  764. */
  765. static int add_detailed_info(struct drm_connector *connector,
  766. struct edid *edid, u32 quirks)
  767. {
  768. struct drm_device *dev = connector->dev;
  769. int i, j, modes = 0;
  770. int timing_level;
  771. timing_level = standard_timing_level(edid);
  772. for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  773. struct detailed_timing *timing = &edid->detailed_timings[i];
  774. struct detailed_non_pixel *data = &timing->data.other_data;
  775. struct drm_display_mode *newmode;
  776. /* X server check is version 1.1 or higher */
  777. if (edid->version == 1 && edid->revision >= 1 &&
  778. !timing->pixel_clock) {
  779. /* Other timing or info */
  780. switch (data->type) {
  781. case EDID_DETAIL_MONITOR_SERIAL:
  782. break;
  783. case EDID_DETAIL_MONITOR_STRING:
  784. break;
  785. case EDID_DETAIL_MONITOR_RANGE:
  786. /* Get monitor range data */
  787. break;
  788. case EDID_DETAIL_MONITOR_NAME:
  789. break;
  790. case EDID_DETAIL_MONITOR_CPDATA:
  791. break;
  792. case EDID_DETAIL_STD_MODES:
  793. for (j = 0; j < 6; i++) {
  794. struct std_timing *std;
  795. struct drm_display_mode *newmode;
  796. std = &data->data.timings[j];
  797. newmode = drm_mode_std(dev, std,
  798. edid->revision,
  799. timing_level);
  800. if (newmode) {
  801. drm_mode_probed_add(connector, newmode);
  802. modes++;
  803. }
  804. }
  805. break;
  806. default:
  807. break;
  808. }
  809. } else {
  810. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  811. if (!newmode)
  812. continue;
  813. /* First detailed mode is preferred */
  814. if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING))
  815. newmode->type |= DRM_MODE_TYPE_PREFERRED;
  816. drm_mode_probed_add(connector, newmode);
  817. modes++;
  818. }
  819. }
  820. return modes;
  821. }
  822. /**
  823. * add_detailed_mode_eedid - get detailed mode info from addtional timing
  824. * EDID block
  825. * @connector: attached connector
  826. * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  827. * @quirks: quirks to apply
  828. *
  829. * Some of the detailed timing sections may contain mode information. Grab
  830. * it and add it to the list.
  831. */
  832. static int add_detailed_info_eedid(struct drm_connector *connector,
  833. struct edid *edid, u32 quirks)
  834. {
  835. struct drm_device *dev = connector->dev;
  836. int i, j, modes = 0;
  837. char *edid_ext = NULL;
  838. struct detailed_timing *timing;
  839. struct detailed_non_pixel *data;
  840. struct drm_display_mode *newmode;
  841. int edid_ext_num;
  842. int start_offset, end_offset;
  843. int timing_level;
  844. if (edid->version == 1 && edid->revision < 3) {
  845. /* If the EDID version is less than 1.3, there is no
  846. * extension EDID.
  847. */
  848. return 0;
  849. }
  850. if (!edid->extensions) {
  851. /* if there is no extension EDID, it is unnecessary to
  852. * parse the E-EDID to get detailed info
  853. */
  854. return 0;
  855. }
  856. /* Chose real EDID extension number */
  857. edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  858. MAX_EDID_EXT_NUM : edid->extensions;
  859. /* Find CEA extension */
  860. for (i = 0; i < edid_ext_num; i++) {
  861. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  862. /* This block is CEA extension */
  863. if (edid_ext[0] == 0x02)
  864. break;
  865. }
  866. if (i == edid_ext_num) {
  867. /* if there is no additional timing EDID block, return */
  868. return 0;
  869. }
  870. /* Get the start offset of detailed timing block */
  871. start_offset = edid_ext[2];
  872. if (start_offset == 0) {
  873. /* If the start_offset is zero, it means that neither detailed
  874. * info nor data block exist. In such case it is also
  875. * unnecessary to parse the detailed timing info.
  876. */
  877. return 0;
  878. }
  879. timing_level = standard_timing_level(edid);
  880. end_offset = EDID_LENGTH;
  881. end_offset -= sizeof(struct detailed_timing);
  882. for (i = start_offset; i < end_offset;
  883. i += sizeof(struct detailed_timing)) {
  884. timing = (struct detailed_timing *)(edid_ext + i);
  885. data = &timing->data.other_data;
  886. /* Detailed mode timing */
  887. if (timing->pixel_clock) {
  888. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  889. if (!newmode)
  890. continue;
  891. drm_mode_probed_add(connector, newmode);
  892. modes++;
  893. continue;
  894. }
  895. /* Other timing or info */
  896. switch (data->type) {
  897. case EDID_DETAIL_MONITOR_SERIAL:
  898. break;
  899. case EDID_DETAIL_MONITOR_STRING:
  900. break;
  901. case EDID_DETAIL_MONITOR_RANGE:
  902. /* Get monitor range data */
  903. break;
  904. case EDID_DETAIL_MONITOR_NAME:
  905. break;
  906. case EDID_DETAIL_MONITOR_CPDATA:
  907. break;
  908. case EDID_DETAIL_STD_MODES:
  909. /* Five modes per detailed section */
  910. for (j = 0; j < 5; i++) {
  911. struct std_timing *std;
  912. struct drm_display_mode *newmode;
  913. std = &data->data.timings[j];
  914. newmode = drm_mode_std(dev, std,
  915. edid->revision,
  916. timing_level);
  917. if (newmode) {
  918. drm_mode_probed_add(connector, newmode);
  919. modes++;
  920. }
  921. }
  922. break;
  923. default:
  924. break;
  925. }
  926. }
  927. return modes;
  928. }
  929. #define DDC_ADDR 0x50
  930. /**
  931. * Get EDID information via I2C.
  932. *
  933. * \param adapter : i2c device adaptor
  934. * \param buf : EDID data buffer to be filled
  935. * \param len : EDID data buffer length
  936. * \return 0 on success or -1 on failure.
  937. *
  938. * Try to fetch EDID information by calling i2c driver function.
  939. */
  940. int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
  941. unsigned char *buf, int len)
  942. {
  943. unsigned char start = 0x0;
  944. struct i2c_msg msgs[] = {
  945. {
  946. .addr = DDC_ADDR,
  947. .flags = 0,
  948. .len = 1,
  949. .buf = &start,
  950. }, {
  951. .addr = DDC_ADDR,
  952. .flags = I2C_M_RD,
  953. .len = len,
  954. .buf = buf,
  955. }
  956. };
  957. if (i2c_transfer(adapter, msgs, 2) == 2)
  958. return 0;
  959. return -1;
  960. }
  961. EXPORT_SYMBOL(drm_do_probe_ddc_edid);
  962. static int drm_ddc_read_edid(struct drm_connector *connector,
  963. struct i2c_adapter *adapter,
  964. char *buf, int len)
  965. {
  966. int ret;
  967. ret = drm_do_probe_ddc_edid(adapter, buf, len);
  968. if (ret != 0) {
  969. goto end;
  970. }
  971. if (!edid_is_valid((struct edid *)buf)) {
  972. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  973. drm_get_connector_name(connector));
  974. ret = -1;
  975. }
  976. end:
  977. return ret;
  978. }
  979. /**
  980. * drm_get_edid - get EDID data, if available
  981. * @connector: connector we're probing
  982. * @adapter: i2c adapter to use for DDC
  983. *
  984. * Poke the given connector's i2c channel to grab EDID data if possible.
  985. *
  986. * Return edid data or NULL if we couldn't find any.
  987. */
  988. struct edid *drm_get_edid(struct drm_connector *connector,
  989. struct i2c_adapter *adapter)
  990. {
  991. int ret;
  992. struct edid *edid;
  993. edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
  994. GFP_KERNEL);
  995. if (edid == NULL) {
  996. dev_warn(&connector->dev->pdev->dev,
  997. "Failed to allocate EDID\n");
  998. goto end;
  999. }
  1000. /* Read first EDID block */
  1001. ret = drm_ddc_read_edid(connector, adapter,
  1002. (unsigned char *)edid, EDID_LENGTH);
  1003. if (ret != 0)
  1004. goto clean_up;
  1005. /* There are EDID extensions to be read */
  1006. if (edid->extensions != 0) {
  1007. int edid_ext_num = edid->extensions;
  1008. if (edid_ext_num > MAX_EDID_EXT_NUM) {
  1009. dev_warn(&connector->dev->pdev->dev,
  1010. "The number of extension(%d) is "
  1011. "over max (%d), actually read number (%d)\n",
  1012. edid_ext_num, MAX_EDID_EXT_NUM,
  1013. MAX_EDID_EXT_NUM);
  1014. /* Reset EDID extension number to be read */
  1015. edid_ext_num = MAX_EDID_EXT_NUM;
  1016. }
  1017. /* Read EDID including extensions too */
  1018. ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
  1019. EDID_LENGTH * (edid_ext_num + 1));
  1020. if (ret != 0)
  1021. goto clean_up;
  1022. }
  1023. connector->display_info.raw_edid = (char *)edid;
  1024. goto end;
  1025. clean_up:
  1026. kfree(edid);
  1027. edid = NULL;
  1028. end:
  1029. return edid;
  1030. }
  1031. EXPORT_SYMBOL(drm_get_edid);
  1032. #define HDMI_IDENTIFIER 0x000C03
  1033. #define VENDOR_BLOCK 0x03
  1034. /**
  1035. * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1036. * @edid: monitor EDID information
  1037. *
  1038. * Parse the CEA extension according to CEA-861-B.
  1039. * Return true if HDMI, false if not or unknown.
  1040. */
  1041. bool drm_detect_hdmi_monitor(struct edid *edid)
  1042. {
  1043. char *edid_ext = NULL;
  1044. int i, hdmi_id, edid_ext_num;
  1045. int start_offset, end_offset;
  1046. bool is_hdmi = false;
  1047. /* No EDID or EDID extensions */
  1048. if (edid == NULL || edid->extensions == 0)
  1049. goto end;
  1050. /* Chose real EDID extension number */
  1051. edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  1052. MAX_EDID_EXT_NUM : edid->extensions;
  1053. /* Find CEA extension */
  1054. for (i = 0; i < edid_ext_num; i++) {
  1055. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1056. /* This block is CEA extension */
  1057. if (edid_ext[0] == 0x02)
  1058. break;
  1059. }
  1060. if (i == edid_ext_num)
  1061. goto end;
  1062. /* Data block offset in CEA extension block */
  1063. start_offset = 4;
  1064. end_offset = edid_ext[2];
  1065. /*
  1066. * Because HDMI identifier is in Vendor Specific Block,
  1067. * search it from all data blocks of CEA extension.
  1068. */
  1069. for (i = start_offset; i < end_offset;
  1070. /* Increased by data block len */
  1071. i += ((edid_ext[i] & 0x1f) + 1)) {
  1072. /* Find vendor specific block */
  1073. if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1074. hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1075. edid_ext[i + 3] << 16;
  1076. /* Find HDMI identifier */
  1077. if (hdmi_id == HDMI_IDENTIFIER)
  1078. is_hdmi = true;
  1079. break;
  1080. }
  1081. }
  1082. end:
  1083. return is_hdmi;
  1084. }
  1085. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1086. /**
  1087. * drm_add_edid_modes - add modes from EDID data, if available
  1088. * @connector: connector we're probing
  1089. * @edid: edid data
  1090. *
  1091. * Add the specified modes to the connector's mode list.
  1092. *
  1093. * Return number of modes added or 0 if we couldn't find any.
  1094. */
  1095. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1096. {
  1097. int num_modes = 0;
  1098. u32 quirks;
  1099. if (edid == NULL) {
  1100. return 0;
  1101. }
  1102. if (!edid_is_valid(edid)) {
  1103. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1104. drm_get_connector_name(connector));
  1105. return 0;
  1106. }
  1107. quirks = edid_get_quirks(edid);
  1108. num_modes += add_established_modes(connector, edid);
  1109. num_modes += add_standard_modes(connector, edid);
  1110. num_modes += add_detailed_info(connector, edid, quirks);
  1111. num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1112. if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1113. edid_fixup_preferred(connector, quirks);
  1114. connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1115. connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1116. connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1117. connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1118. connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1119. connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1120. connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1121. connector->display_info.width_mm = edid->width_cm * 10;
  1122. connector->display_info.height_mm = edid->height_cm * 10;
  1123. connector->display_info.gamma = edid->gamma;
  1124. connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1125. connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1126. connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1127. connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1128. connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1129. connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1130. connector->display_info.gamma = edid->gamma;
  1131. return num_modes;
  1132. }
  1133. EXPORT_SYMBOL(drm_add_edid_modes);
  1134. /**
  1135. * drm_add_modes_noedid - add modes for the connectors without EDID
  1136. * @connector: connector we're probing
  1137. * @hdisplay: the horizontal display limit
  1138. * @vdisplay: the vertical display limit
  1139. *
  1140. * Add the specified modes to the connector's mode list. Only when the
  1141. * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1142. *
  1143. * Return number of modes added or 0 if we couldn't find any.
  1144. */
  1145. int drm_add_modes_noedid(struct drm_connector *connector,
  1146. int hdisplay, int vdisplay)
  1147. {
  1148. int i, count, num_modes = 0;
  1149. struct drm_display_mode *mode, *ptr;
  1150. struct drm_device *dev = connector->dev;
  1151. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1152. if (hdisplay < 0)
  1153. hdisplay = 0;
  1154. if (vdisplay < 0)
  1155. vdisplay = 0;
  1156. for (i = 0; i < count; i++) {
  1157. ptr = &drm_dmt_modes[i];
  1158. if (hdisplay && vdisplay) {
  1159. /*
  1160. * Only when two are valid, they will be used to check
  1161. * whether the mode should be added to the mode list of
  1162. * the connector.
  1163. */
  1164. if (ptr->hdisplay > hdisplay ||
  1165. ptr->vdisplay > vdisplay)
  1166. continue;
  1167. }
  1168. mode = drm_mode_duplicate(dev, ptr);
  1169. if (mode) {
  1170. drm_mode_probed_add(connector, mode);
  1171. num_modes++;
  1172. }
  1173. }
  1174. return num_modes;
  1175. }
  1176. EXPORT_SYMBOL(drm_add_modes_noedid);