async_tx.c 7.8 KB

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  1. /*
  2. * core routines for the asynchronous memory transfer/transform api
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/rculist.h>
  27. #include <linux/kernel.h>
  28. #include <linux/async_tx.h>
  29. #ifdef CONFIG_DMA_ENGINE
  30. static int __init async_tx_init(void)
  31. {
  32. async_dmaengine_get();
  33. printk(KERN_INFO "async_tx: api initialized (async)\n");
  34. return 0;
  35. }
  36. static void __exit async_tx_exit(void)
  37. {
  38. async_dmaengine_put();
  39. }
  40. module_init(async_tx_init);
  41. module_exit(async_tx_exit);
  42. /**
  43. * __async_tx_find_channel - find a channel to carry out the operation or let
  44. * the transaction execute synchronously
  45. * @submit: transaction dependency and submission modifiers
  46. * @tx_type: transaction type
  47. */
  48. struct dma_chan *
  49. __async_tx_find_channel(struct async_submit_ctl *submit,
  50. enum dma_transaction_type tx_type)
  51. {
  52. struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
  53. /* see if we can keep the chain on one channel */
  54. if (depend_tx &&
  55. dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
  56. return depend_tx->chan;
  57. return async_dma_find_channel(tx_type);
  58. }
  59. EXPORT_SYMBOL_GPL(__async_tx_find_channel);
  60. #endif
  61. /**
  62. * async_tx_channel_switch - queue an interrupt descriptor with a dependency
  63. * pre-attached.
  64. * @depend_tx: the operation that must finish before the new operation runs
  65. * @tx: the new operation
  66. */
  67. static void
  68. async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
  69. struct dma_async_tx_descriptor *tx)
  70. {
  71. struct dma_chan *chan = depend_tx->chan;
  72. struct dma_device *device = chan->device;
  73. struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
  74. #ifdef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH
  75. BUG();
  76. #endif
  77. /* first check to see if we can still append to depend_tx */
  78. spin_lock_bh(&depend_tx->lock);
  79. if (depend_tx->parent && depend_tx->chan == tx->chan) {
  80. tx->parent = depend_tx;
  81. depend_tx->next = tx;
  82. intr_tx = NULL;
  83. }
  84. spin_unlock_bh(&depend_tx->lock);
  85. /* attached dependency, flush the parent channel */
  86. if (!intr_tx) {
  87. device->device_issue_pending(chan);
  88. return;
  89. }
  90. /* see if we can schedule an interrupt
  91. * otherwise poll for completion
  92. */
  93. if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  94. intr_tx = device->device_prep_dma_interrupt(chan, 0);
  95. else
  96. intr_tx = NULL;
  97. if (intr_tx) {
  98. intr_tx->callback = NULL;
  99. intr_tx->callback_param = NULL;
  100. tx->parent = intr_tx;
  101. /* safe to set ->next outside the lock since we know we are
  102. * not submitted yet
  103. */
  104. intr_tx->next = tx;
  105. /* check if we need to append */
  106. spin_lock_bh(&depend_tx->lock);
  107. if (depend_tx->parent) {
  108. intr_tx->parent = depend_tx;
  109. depend_tx->next = intr_tx;
  110. async_tx_ack(intr_tx);
  111. intr_tx = NULL;
  112. }
  113. spin_unlock_bh(&depend_tx->lock);
  114. if (intr_tx) {
  115. intr_tx->parent = NULL;
  116. intr_tx->tx_submit(intr_tx);
  117. async_tx_ack(intr_tx);
  118. }
  119. device->device_issue_pending(chan);
  120. } else {
  121. if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
  122. panic("%s: DMA_ERROR waiting for depend_tx\n",
  123. __func__);
  124. tx->tx_submit(tx);
  125. }
  126. }
  127. /**
  128. * submit_disposition - flags for routing an incoming operation
  129. * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
  130. * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
  131. * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
  132. *
  133. * while holding depend_tx->lock we must avoid submitting new operations
  134. * to prevent a circular locking dependency with drivers that already
  135. * hold a channel lock when calling async_tx_run_dependencies.
  136. */
  137. enum submit_disposition {
  138. ASYNC_TX_SUBMITTED,
  139. ASYNC_TX_CHANNEL_SWITCH,
  140. ASYNC_TX_DIRECT_SUBMIT,
  141. };
  142. void
  143. async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
  144. struct async_submit_ctl *submit)
  145. {
  146. struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
  147. tx->callback = submit->cb_fn;
  148. tx->callback_param = submit->cb_param;
  149. if (depend_tx) {
  150. enum submit_disposition s;
  151. /* sanity check the dependency chain:
  152. * 1/ if ack is already set then we cannot be sure
  153. * we are referring to the correct operation
  154. * 2/ dependencies are 1:1 i.e. two transactions can
  155. * not depend on the same parent
  156. */
  157. BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
  158. tx->parent);
  159. /* the lock prevents async_tx_run_dependencies from missing
  160. * the setting of ->next when ->parent != NULL
  161. */
  162. spin_lock_bh(&depend_tx->lock);
  163. if (depend_tx->parent) {
  164. /* we have a parent so we can not submit directly
  165. * if we are staying on the same channel: append
  166. * else: channel switch
  167. */
  168. if (depend_tx->chan == chan) {
  169. tx->parent = depend_tx;
  170. depend_tx->next = tx;
  171. s = ASYNC_TX_SUBMITTED;
  172. } else
  173. s = ASYNC_TX_CHANNEL_SWITCH;
  174. } else {
  175. /* we do not have a parent so we may be able to submit
  176. * directly if we are staying on the same channel
  177. */
  178. if (depend_tx->chan == chan)
  179. s = ASYNC_TX_DIRECT_SUBMIT;
  180. else
  181. s = ASYNC_TX_CHANNEL_SWITCH;
  182. }
  183. spin_unlock_bh(&depend_tx->lock);
  184. switch (s) {
  185. case ASYNC_TX_SUBMITTED:
  186. break;
  187. case ASYNC_TX_CHANNEL_SWITCH:
  188. async_tx_channel_switch(depend_tx, tx);
  189. break;
  190. case ASYNC_TX_DIRECT_SUBMIT:
  191. tx->parent = NULL;
  192. tx->tx_submit(tx);
  193. break;
  194. }
  195. } else {
  196. tx->parent = NULL;
  197. tx->tx_submit(tx);
  198. }
  199. if (submit->flags & ASYNC_TX_ACK)
  200. async_tx_ack(tx);
  201. if (depend_tx)
  202. async_tx_ack(depend_tx);
  203. }
  204. EXPORT_SYMBOL_GPL(async_tx_submit);
  205. /**
  206. * async_trigger_callback - schedules the callback function to be run
  207. * @submit: submission and completion parameters
  208. *
  209. * honored flags: ASYNC_TX_ACK
  210. *
  211. * The callback is run after any dependent operations have completed.
  212. */
  213. struct dma_async_tx_descriptor *
  214. async_trigger_callback(struct async_submit_ctl *submit)
  215. {
  216. struct dma_chan *chan;
  217. struct dma_device *device;
  218. struct dma_async_tx_descriptor *tx;
  219. struct dma_async_tx_descriptor *depend_tx = submit->depend_tx;
  220. if (depend_tx) {
  221. chan = depend_tx->chan;
  222. device = chan->device;
  223. /* see if we can schedule an interrupt
  224. * otherwise poll for completion
  225. */
  226. if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  227. device = NULL;
  228. tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
  229. } else
  230. tx = NULL;
  231. if (tx) {
  232. pr_debug("%s: (async)\n", __func__);
  233. async_tx_submit(chan, tx, submit);
  234. } else {
  235. pr_debug("%s: (sync)\n", __func__);
  236. /* wait for any prerequisite operations */
  237. async_tx_quiesce(&submit->depend_tx);
  238. async_tx_sync_epilog(submit);
  239. }
  240. return tx;
  241. }
  242. EXPORT_SYMBOL_GPL(async_trigger_callback);
  243. /**
  244. * async_tx_quiesce - ensure tx is complete and freeable upon return
  245. * @tx - transaction to quiesce
  246. */
  247. void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
  248. {
  249. if (*tx) {
  250. /* if ack is already set then we cannot be sure
  251. * we are referring to the correct operation
  252. */
  253. BUG_ON(async_tx_test_ack(*tx));
  254. if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
  255. panic("DMA_ERROR waiting for transaction\n");
  256. async_tx_ack(*tx);
  257. *tx = NULL;
  258. }
  259. }
  260. EXPORT_SYMBOL_GPL(async_tx_quiesce);
  261. MODULE_AUTHOR("Intel Corporation");
  262. MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
  263. MODULE_LICENSE("GPL");