mpparse.c 25 KB

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  1. /*
  2. * Intel Multiprocessor Specification 1.1 and 1.4
  3. * compliant MP-table parsing routines.
  4. *
  5. * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
  6. * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
  7. * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
  8. */
  9. #include <linux/mm.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/kernel_stat.h>
  14. #include <linux/mc146818rtc.h>
  15. #include <linux/bitops.h>
  16. #include <linux/acpi.h>
  17. #include <linux/module.h>
  18. #include <linux/smp.h>
  19. #include <linux/pci.h>
  20. #include <asm/mtrr.h>
  21. #include <asm/mpspec.h>
  22. #include <asm/pgalloc.h>
  23. #include <asm/io_apic.h>
  24. #include <asm/proto.h>
  25. #include <asm/bios_ebda.h>
  26. #include <asm/e820.h>
  27. #include <asm/trampoline.h>
  28. #include <asm/setup.h>
  29. #include <asm/smp.h>
  30. #include <asm/apic.h>
  31. /*
  32. * Checksum an MP configuration block.
  33. */
  34. static int __init mpf_checksum(unsigned char *mp, int len)
  35. {
  36. int sum = 0;
  37. while (len--)
  38. sum += *mp++;
  39. return sum & 0xFF;
  40. }
  41. int __init default_mpc_apic_id(struct mpc_cpu *m)
  42. {
  43. return m->apicid;
  44. }
  45. static void __init MP_processor_info(struct mpc_cpu *m)
  46. {
  47. int apicid;
  48. char *bootup_cpu = "";
  49. if (!(m->cpuflag & CPU_ENABLED)) {
  50. disabled_cpus++;
  51. return;
  52. }
  53. apicid = x86_init.mpparse.mpc_apic_id(m);
  54. if (m->cpuflag & CPU_BOOTPROCESSOR) {
  55. bootup_cpu = " (Bootup-CPU)";
  56. boot_cpu_physical_apicid = m->apicid;
  57. }
  58. printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
  59. generic_processor_info(apicid, m->apicver);
  60. }
  61. #ifdef CONFIG_X86_IO_APIC
  62. void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
  63. {
  64. memcpy(str, m->bustype, 6);
  65. str[6] = 0;
  66. apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
  67. }
  68. static void __init MP_bus_info(struct mpc_bus *m)
  69. {
  70. char str[7];
  71. x86_init.mpparse.mpc_oem_bus_info(m, str);
  72. #if MAX_MP_BUSSES < 256
  73. if (m->busid >= MAX_MP_BUSSES) {
  74. printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
  75. " is too large, max. supported is %d\n",
  76. m->busid, str, MAX_MP_BUSSES - 1);
  77. return;
  78. }
  79. #endif
  80. if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
  81. set_bit(m->busid, mp_bus_not_pci);
  82. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  83. mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
  84. #endif
  85. } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
  86. if (x86_init.mpparse.mpc_oem_pci_bus)
  87. x86_init.mpparse.mpc_oem_pci_bus(m);
  88. clear_bit(m->busid, mp_bus_not_pci);
  89. #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
  90. mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
  91. } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
  92. mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
  93. } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
  94. mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
  95. #endif
  96. } else
  97. printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
  98. }
  99. static int bad_ioapic(unsigned long address)
  100. {
  101. if (nr_ioapics >= MAX_IO_APICS) {
  102. printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
  103. "(found %d)\n", MAX_IO_APICS, nr_ioapics);
  104. panic("Recompile kernel with bigger MAX_IO_APICS!\n");
  105. }
  106. if (!address) {
  107. printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
  108. " found in table, skipping!\n");
  109. return 1;
  110. }
  111. return 0;
  112. }
  113. static void __init MP_ioapic_info(struct mpc_ioapic *m)
  114. {
  115. if (!(m->flags & MPC_APIC_USABLE))
  116. return;
  117. printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
  118. m->apicid, m->apicver, m->apicaddr);
  119. if (bad_ioapic(m->apicaddr))
  120. return;
  121. mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
  122. mp_ioapics[nr_ioapics].apicid = m->apicid;
  123. mp_ioapics[nr_ioapics].type = m->type;
  124. mp_ioapics[nr_ioapics].apicver = m->apicver;
  125. mp_ioapics[nr_ioapics].flags = m->flags;
  126. nr_ioapics++;
  127. }
  128. static void print_MP_intsrc_info(struct mpc_intsrc *m)
  129. {
  130. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  131. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  132. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
  133. m->srcbusirq, m->dstapic, m->dstirq);
  134. }
  135. static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
  136. {
  137. apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
  138. " IRQ %02x, APIC ID %x, APIC INT %02x\n",
  139. mp_irq->irqtype, mp_irq->irqflag & 3,
  140. (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
  141. mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
  142. }
  143. static void __init assign_to_mp_irq(struct mpc_intsrc *m,
  144. struct mpc_intsrc *mp_irq)
  145. {
  146. mp_irq->dstapic = m->dstapic;
  147. mp_irq->type = m->type;
  148. mp_irq->irqtype = m->irqtype;
  149. mp_irq->irqflag = m->irqflag;
  150. mp_irq->srcbus = m->srcbus;
  151. mp_irq->srcbusirq = m->srcbusirq;
  152. mp_irq->dstirq = m->dstirq;
  153. }
  154. static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
  155. struct mpc_intsrc *m)
  156. {
  157. m->dstapic = mp_irq->dstapic;
  158. m->type = mp_irq->type;
  159. m->irqtype = mp_irq->irqtype;
  160. m->irqflag = mp_irq->irqflag;
  161. m->srcbus = mp_irq->srcbus;
  162. m->srcbusirq = mp_irq->srcbusirq;
  163. m->dstirq = mp_irq->dstirq;
  164. }
  165. static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
  166. struct mpc_intsrc *m)
  167. {
  168. if (mp_irq->dstapic != m->dstapic)
  169. return 1;
  170. if (mp_irq->type != m->type)
  171. return 2;
  172. if (mp_irq->irqtype != m->irqtype)
  173. return 3;
  174. if (mp_irq->irqflag != m->irqflag)
  175. return 4;
  176. if (mp_irq->srcbus != m->srcbus)
  177. return 5;
  178. if (mp_irq->srcbusirq != m->srcbusirq)
  179. return 6;
  180. if (mp_irq->dstirq != m->dstirq)
  181. return 7;
  182. return 0;
  183. }
  184. static void __init MP_intsrc_info(struct mpc_intsrc *m)
  185. {
  186. int i;
  187. print_MP_intsrc_info(m);
  188. for (i = 0; i < mp_irq_entries; i++) {
  189. if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
  190. return;
  191. }
  192. assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
  193. if (++mp_irq_entries == MAX_IRQ_SOURCES)
  194. panic("Max # of irq sources exceeded!!\n");
  195. }
  196. #else /* CONFIG_X86_IO_APIC */
  197. static inline void __init MP_bus_info(struct mpc_bus *m) {}
  198. static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
  199. static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
  200. #endif /* CONFIG_X86_IO_APIC */
  201. static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
  202. {
  203. apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
  204. " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
  205. m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
  206. m->srcbusirq, m->destapic, m->destapiclint);
  207. }
  208. /*
  209. * Read/parse the MPC
  210. */
  211. static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
  212. {
  213. if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
  214. printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
  215. mpc->signature[0], mpc->signature[1],
  216. mpc->signature[2], mpc->signature[3]);
  217. return 0;
  218. }
  219. if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
  220. printk(KERN_ERR "MPTABLE: checksum error!\n");
  221. return 0;
  222. }
  223. if (mpc->spec != 0x01 && mpc->spec != 0x04) {
  224. printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
  225. mpc->spec);
  226. return 0;
  227. }
  228. if (!mpc->lapic) {
  229. printk(KERN_ERR "MPTABLE: null local APIC address!\n");
  230. return 0;
  231. }
  232. memcpy(oem, mpc->oem, 8);
  233. oem[8] = 0;
  234. printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
  235. memcpy(str, mpc->productid, 12);
  236. str[12] = 0;
  237. printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
  238. printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
  239. return 1;
  240. }
  241. static void skip_entry(unsigned char **ptr, int *count, int size)
  242. {
  243. *ptr += size;
  244. *count += size;
  245. }
  246. static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
  247. {
  248. printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
  249. "type %x\n", *mpt);
  250. print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
  251. 1, mpc, mpc->length, 1);
  252. }
  253. void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
  254. static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
  255. {
  256. char str[16];
  257. char oem[10];
  258. int count = sizeof(*mpc);
  259. unsigned char *mpt = ((unsigned char *)mpc) + count;
  260. if (!smp_check_mpc(mpc, oem, str))
  261. return 0;
  262. #ifdef CONFIG_X86_32
  263. generic_mps_oem_check(mpc, oem, str);
  264. #endif
  265. /* save the local APIC address, it might be non-default */
  266. if (!acpi_lapic)
  267. mp_lapic_addr = mpc->lapic;
  268. if (early)
  269. return 1;
  270. if (mpc->oemptr)
  271. x86_init.mpparse.smp_read_mpc_oem(mpc);
  272. /*
  273. * Now process the configuration blocks.
  274. */
  275. x86_init.mpparse.mpc_record(0);
  276. while (count < mpc->length) {
  277. switch (*mpt) {
  278. case MP_PROCESSOR:
  279. /* ACPI may have already provided this data */
  280. if (!acpi_lapic)
  281. MP_processor_info((struct mpc_cpu *)mpt);
  282. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  283. break;
  284. case MP_BUS:
  285. MP_bus_info((struct mpc_bus *)mpt);
  286. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  287. break;
  288. case MP_IOAPIC:
  289. MP_ioapic_info((struct mpc_ioapic *)mpt);
  290. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  291. break;
  292. case MP_INTSRC:
  293. MP_intsrc_info((struct mpc_intsrc *)mpt);
  294. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  295. break;
  296. case MP_LINTSRC:
  297. MP_lintsrc_info((struct mpc_lintsrc *)mpt);
  298. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  299. break;
  300. default:
  301. /* wrong mptable */
  302. smp_dump_mptable(mpc, mpt);
  303. count = mpc->length;
  304. break;
  305. }
  306. x86_init.mpparse.mpc_record(1);
  307. }
  308. #ifdef CONFIG_X86_BIGSMP
  309. generic_bigsmp_probe();
  310. #endif
  311. if (apic->setup_apic_routing)
  312. apic->setup_apic_routing();
  313. if (!num_processors)
  314. printk(KERN_ERR "MPTABLE: no processors registered!\n");
  315. return num_processors;
  316. }
  317. #ifdef CONFIG_X86_IO_APIC
  318. static int __init ELCR_trigger(unsigned int irq)
  319. {
  320. unsigned int port;
  321. port = 0x4d0 + (irq >> 3);
  322. return (inb(port) >> (irq & 7)) & 1;
  323. }
  324. static void __init construct_default_ioirq_mptable(int mpc_default_type)
  325. {
  326. struct mpc_intsrc intsrc;
  327. int i;
  328. int ELCR_fallback = 0;
  329. intsrc.type = MP_INTSRC;
  330. intsrc.irqflag = 0; /* conforming */
  331. intsrc.srcbus = 0;
  332. intsrc.dstapic = mp_ioapics[0].apicid;
  333. intsrc.irqtype = mp_INT;
  334. /*
  335. * If true, we have an ISA/PCI system with no IRQ entries
  336. * in the MP table. To prevent the PCI interrupts from being set up
  337. * incorrectly, we try to use the ELCR. The sanity check to see if
  338. * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
  339. * never be level sensitive, so we simply see if the ELCR agrees.
  340. * If it does, we assume it's valid.
  341. */
  342. if (mpc_default_type == 5) {
  343. printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
  344. "falling back to ELCR\n");
  345. if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
  346. ELCR_trigger(13))
  347. printk(KERN_ERR "ELCR contains invalid data... "
  348. "not using ELCR\n");
  349. else {
  350. printk(KERN_INFO
  351. "Using ELCR to identify PCI interrupts\n");
  352. ELCR_fallback = 1;
  353. }
  354. }
  355. for (i = 0; i < 16; i++) {
  356. switch (mpc_default_type) {
  357. case 2:
  358. if (i == 0 || i == 13)
  359. continue; /* IRQ0 & IRQ13 not connected */
  360. /* fall through */
  361. default:
  362. if (i == 2)
  363. continue; /* IRQ2 is never connected */
  364. }
  365. if (ELCR_fallback) {
  366. /*
  367. * If the ELCR indicates a level-sensitive interrupt, we
  368. * copy that information over to the MP table in the
  369. * irqflag field (level sensitive, active high polarity).
  370. */
  371. if (ELCR_trigger(i))
  372. intsrc.irqflag = 13;
  373. else
  374. intsrc.irqflag = 0;
  375. }
  376. intsrc.srcbusirq = i;
  377. intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
  378. MP_intsrc_info(&intsrc);
  379. }
  380. intsrc.irqtype = mp_ExtINT;
  381. intsrc.srcbusirq = 0;
  382. intsrc.dstirq = 0; /* 8259A to INTIN0 */
  383. MP_intsrc_info(&intsrc);
  384. }
  385. static void __init construct_ioapic_table(int mpc_default_type)
  386. {
  387. struct mpc_ioapic ioapic;
  388. struct mpc_bus bus;
  389. bus.type = MP_BUS;
  390. bus.busid = 0;
  391. switch (mpc_default_type) {
  392. default:
  393. printk(KERN_ERR "???\nUnknown standard configuration %d\n",
  394. mpc_default_type);
  395. /* fall through */
  396. case 1:
  397. case 5:
  398. memcpy(bus.bustype, "ISA ", 6);
  399. break;
  400. case 2:
  401. case 6:
  402. case 3:
  403. memcpy(bus.bustype, "EISA ", 6);
  404. break;
  405. case 4:
  406. case 7:
  407. memcpy(bus.bustype, "MCA ", 6);
  408. }
  409. MP_bus_info(&bus);
  410. if (mpc_default_type > 4) {
  411. bus.busid = 1;
  412. memcpy(bus.bustype, "PCI ", 6);
  413. MP_bus_info(&bus);
  414. }
  415. ioapic.type = MP_IOAPIC;
  416. ioapic.apicid = 2;
  417. ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  418. ioapic.flags = MPC_APIC_USABLE;
  419. ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
  420. MP_ioapic_info(&ioapic);
  421. /*
  422. * We set up most of the low 16 IO-APIC pins according to MPS rules.
  423. */
  424. construct_default_ioirq_mptable(mpc_default_type);
  425. }
  426. #else
  427. static inline void __init construct_ioapic_table(int mpc_default_type) { }
  428. #endif
  429. static inline void __init construct_default_ISA_mptable(int mpc_default_type)
  430. {
  431. struct mpc_cpu processor;
  432. struct mpc_lintsrc lintsrc;
  433. int linttypes[2] = { mp_ExtINT, mp_NMI };
  434. int i;
  435. /*
  436. * local APIC has default address
  437. */
  438. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  439. /*
  440. * 2 CPUs, numbered 0 & 1.
  441. */
  442. processor.type = MP_PROCESSOR;
  443. /* Either an integrated APIC or a discrete 82489DX. */
  444. processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
  445. processor.cpuflag = CPU_ENABLED;
  446. processor.cpufeature = (boot_cpu_data.x86 << 8) |
  447. (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
  448. processor.featureflag = boot_cpu_data.x86_capability[0];
  449. processor.reserved[0] = 0;
  450. processor.reserved[1] = 0;
  451. for (i = 0; i < 2; i++) {
  452. processor.apicid = i;
  453. MP_processor_info(&processor);
  454. }
  455. construct_ioapic_table(mpc_default_type);
  456. lintsrc.type = MP_LINTSRC;
  457. lintsrc.irqflag = 0; /* conforming */
  458. lintsrc.srcbusid = 0;
  459. lintsrc.srcbusirq = 0;
  460. lintsrc.destapic = MP_APIC_ALL;
  461. for (i = 0; i < 2; i++) {
  462. lintsrc.irqtype = linttypes[i];
  463. lintsrc.destapiclint = i;
  464. MP_lintsrc_info(&lintsrc);
  465. }
  466. }
  467. static struct mpf_intel *mpf_found;
  468. static unsigned long __init get_mpc_size(unsigned long physptr)
  469. {
  470. struct mpc_table *mpc;
  471. unsigned long size;
  472. mpc = early_ioremap(physptr, PAGE_SIZE);
  473. size = mpc->length;
  474. early_iounmap(mpc, PAGE_SIZE);
  475. apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
  476. return size;
  477. }
  478. static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
  479. {
  480. struct mpc_table *mpc;
  481. unsigned long size;
  482. size = get_mpc_size(mpf->physptr);
  483. mpc = early_ioremap(mpf->physptr, size);
  484. /*
  485. * Read the physical hardware table. Anything here will
  486. * override the defaults.
  487. */
  488. if (!smp_read_mpc(mpc, early)) {
  489. #ifdef CONFIG_X86_LOCAL_APIC
  490. smp_found_config = 0;
  491. #endif
  492. printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
  493. "... disabling SMP support. (tell your hw vendor)\n");
  494. early_iounmap(mpc, size);
  495. return -1;
  496. }
  497. early_iounmap(mpc, size);
  498. if (early)
  499. return -1;
  500. #ifdef CONFIG_X86_IO_APIC
  501. /*
  502. * If there are no explicit MP IRQ entries, then we are
  503. * broken. We set up most of the low 16 IO-APIC pins to
  504. * ISA defaults and hope it will work.
  505. */
  506. if (!mp_irq_entries) {
  507. struct mpc_bus bus;
  508. printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
  509. "using default mptable. (tell your hw vendor)\n");
  510. bus.type = MP_BUS;
  511. bus.busid = 0;
  512. memcpy(bus.bustype, "ISA ", 6);
  513. MP_bus_info(&bus);
  514. construct_default_ioirq_mptable(0);
  515. }
  516. #endif
  517. return 0;
  518. }
  519. /*
  520. * Scan the memory blocks for an SMP configuration block.
  521. */
  522. void __init default_get_smp_config(unsigned int early)
  523. {
  524. struct mpf_intel *mpf = mpf_found;
  525. if (!mpf)
  526. return;
  527. if (acpi_lapic && early)
  528. return;
  529. /*
  530. * MPS doesn't support hyperthreading, aka only have
  531. * thread 0 apic id in MPS table
  532. */
  533. if (acpi_lapic && acpi_ioapic)
  534. return;
  535. printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
  536. mpf->specification);
  537. #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
  538. if (mpf->feature2 & (1 << 7)) {
  539. printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
  540. pic_mode = 1;
  541. } else {
  542. printk(KERN_INFO " Virtual Wire compatibility mode.\n");
  543. pic_mode = 0;
  544. }
  545. #endif
  546. /*
  547. * Now see if we need to read further.
  548. */
  549. if (mpf->feature1 != 0) {
  550. if (early) {
  551. /*
  552. * local APIC has default address
  553. */
  554. mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
  555. return;
  556. }
  557. printk(KERN_INFO "Default MP configuration #%d\n",
  558. mpf->feature1);
  559. construct_default_ISA_mptable(mpf->feature1);
  560. } else if (mpf->physptr) {
  561. if (check_physptr(mpf, early))
  562. return;
  563. } else
  564. BUG();
  565. if (!early)
  566. printk(KERN_INFO "Processors: %d\n", num_processors);
  567. /*
  568. * Only use the first configuration found.
  569. */
  570. }
  571. static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
  572. {
  573. unsigned long size = get_mpc_size(mpf->physptr);
  574. #ifdef CONFIG_X86_32
  575. /*
  576. * We cannot access to MPC table to compute table size yet,
  577. * as only few megabytes from the bottom is mapped now.
  578. * PC-9800's MPC table places on the very last of physical
  579. * memory; so that simply reserving PAGE_SIZE from mpf->physptr
  580. * yields BUG() in reserve_bootmem.
  581. * also need to make sure physptr is below than max_low_pfn
  582. * we don't need reserve the area above max_low_pfn
  583. */
  584. unsigned long end = max_low_pfn * PAGE_SIZE;
  585. if (mpf->physptr < end) {
  586. if (mpf->physptr + size > end)
  587. size = end - mpf->physptr;
  588. reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
  589. }
  590. #else
  591. reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
  592. #endif
  593. }
  594. static int __init smp_scan_config(unsigned long base, unsigned long length,
  595. unsigned reserve)
  596. {
  597. unsigned int *bp = phys_to_virt(base);
  598. struct mpf_intel *mpf;
  599. apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
  600. bp, length);
  601. BUILD_BUG_ON(sizeof(*mpf) != 16);
  602. while (length > 0) {
  603. mpf = (struct mpf_intel *)bp;
  604. if ((*bp == SMP_MAGIC_IDENT) &&
  605. (mpf->length == 1) &&
  606. !mpf_checksum((unsigned char *)bp, 16) &&
  607. ((mpf->specification == 1)
  608. || (mpf->specification == 4))) {
  609. #ifdef CONFIG_X86_LOCAL_APIC
  610. smp_found_config = 1;
  611. #endif
  612. mpf_found = mpf;
  613. printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
  614. mpf, (u64)virt_to_phys(mpf));
  615. if (!reserve)
  616. return 1;
  617. reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
  618. BOOTMEM_DEFAULT);
  619. if (mpf->physptr)
  620. smp_reserve_bootmem(mpf);
  621. return 1;
  622. }
  623. bp += 4;
  624. length -= 16;
  625. }
  626. return 0;
  627. }
  628. void __init default_find_smp_config(unsigned int reserve)
  629. {
  630. unsigned int address;
  631. /*
  632. * FIXME: Linux assumes you have 640K of base ram..
  633. * this continues the error...
  634. *
  635. * 1) Scan the bottom 1K for a signature
  636. * 2) Scan the top 1K of base RAM
  637. * 3) Scan the 64K of bios
  638. */
  639. if (smp_scan_config(0x0, 0x400, reserve) ||
  640. smp_scan_config(639 * 0x400, 0x400, reserve) ||
  641. smp_scan_config(0xF0000, 0x10000, reserve))
  642. return;
  643. /*
  644. * If it is an SMP machine we should know now, unless the
  645. * configuration is in an EISA/MCA bus machine with an
  646. * extended bios data area.
  647. *
  648. * there is a real-mode segmented pointer pointing to the
  649. * 4K EBDA area at 0x40E, calculate and scan it here.
  650. *
  651. * NOTE! There are Linux loaders that will corrupt the EBDA
  652. * area, and as such this kind of SMP config may be less
  653. * trustworthy, simply because the SMP table may have been
  654. * stomped on during early boot. These loaders are buggy and
  655. * should be fixed.
  656. *
  657. * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
  658. */
  659. address = get_bios_ebda();
  660. if (address)
  661. smp_scan_config(address, 0x400, reserve);
  662. }
  663. #ifdef CONFIG_X86_IO_APIC
  664. static u8 __initdata irq_used[MAX_IRQ_SOURCES];
  665. static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
  666. {
  667. int i;
  668. if (m->irqtype != mp_INT)
  669. return 0;
  670. if (m->irqflag != 0x0f)
  671. return 0;
  672. /* not legacy */
  673. for (i = 0; i < mp_irq_entries; i++) {
  674. if (mp_irqs[i].irqtype != mp_INT)
  675. continue;
  676. if (mp_irqs[i].irqflag != 0x0f)
  677. continue;
  678. if (mp_irqs[i].srcbus != m->srcbus)
  679. continue;
  680. if (mp_irqs[i].srcbusirq != m->srcbusirq)
  681. continue;
  682. if (irq_used[i]) {
  683. /* already claimed */
  684. return -2;
  685. }
  686. irq_used[i] = 1;
  687. return i;
  688. }
  689. /* not found */
  690. return -1;
  691. }
  692. #define SPARE_SLOT_NUM 20
  693. static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
  694. static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
  695. {
  696. int i;
  697. apic_printk(APIC_VERBOSE, "OLD ");
  698. print_MP_intsrc_info(m);
  699. i = get_MP_intsrc_index(m);
  700. if (i > 0) {
  701. assign_to_mpc_intsrc(&mp_irqs[i], m);
  702. apic_printk(APIC_VERBOSE, "NEW ");
  703. print_mp_irq_info(&mp_irqs[i]);
  704. return;
  705. }
  706. if (!i) {
  707. /* legacy, do nothing */
  708. return;
  709. }
  710. if (*nr_m_spare < SPARE_SLOT_NUM) {
  711. /*
  712. * not found (-1), or duplicated (-2) are invalid entries,
  713. * we need to use the slot later
  714. */
  715. m_spare[*nr_m_spare] = m;
  716. *nr_m_spare += 1;
  717. }
  718. }
  719. #else /* CONFIG_X86_IO_APIC */
  720. static
  721. inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
  722. #endif /* CONFIG_X86_IO_APIC */
  723. static int
  724. check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
  725. {
  726. int ret = 0;
  727. if (!mpc_new_phys || count <= mpc_new_length) {
  728. WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
  729. return -1;
  730. }
  731. return ret;
  732. }
  733. static int __init replace_intsrc_all(struct mpc_table *mpc,
  734. unsigned long mpc_new_phys,
  735. unsigned long mpc_new_length)
  736. {
  737. #ifdef CONFIG_X86_IO_APIC
  738. int i;
  739. #endif
  740. int count = sizeof(*mpc);
  741. int nr_m_spare = 0;
  742. unsigned char *mpt = ((unsigned char *)mpc) + count;
  743. printk(KERN_INFO "mpc_length %x\n", mpc->length);
  744. while (count < mpc->length) {
  745. switch (*mpt) {
  746. case MP_PROCESSOR:
  747. skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
  748. break;
  749. case MP_BUS:
  750. skip_entry(&mpt, &count, sizeof(struct mpc_bus));
  751. break;
  752. case MP_IOAPIC:
  753. skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
  754. break;
  755. case MP_INTSRC:
  756. check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
  757. skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
  758. break;
  759. case MP_LINTSRC:
  760. skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
  761. break;
  762. default:
  763. /* wrong mptable */
  764. smp_dump_mptable(mpc, mpt);
  765. goto out;
  766. }
  767. }
  768. #ifdef CONFIG_X86_IO_APIC
  769. for (i = 0; i < mp_irq_entries; i++) {
  770. if (irq_used[i])
  771. continue;
  772. if (mp_irqs[i].irqtype != mp_INT)
  773. continue;
  774. if (mp_irqs[i].irqflag != 0x0f)
  775. continue;
  776. if (nr_m_spare > 0) {
  777. apic_printk(APIC_VERBOSE, "*NEW* found\n");
  778. nr_m_spare--;
  779. assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
  780. m_spare[nr_m_spare] = NULL;
  781. } else {
  782. struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
  783. count += sizeof(struct mpc_intsrc);
  784. if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
  785. goto out;
  786. assign_to_mpc_intsrc(&mp_irqs[i], m);
  787. mpc->length = count;
  788. mpt += sizeof(struct mpc_intsrc);
  789. }
  790. print_mp_irq_info(&mp_irqs[i]);
  791. }
  792. #endif
  793. out:
  794. /* update checksum */
  795. mpc->checksum = 0;
  796. mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
  797. return 0;
  798. }
  799. int enable_update_mptable;
  800. static int __init update_mptable_setup(char *str)
  801. {
  802. enable_update_mptable = 1;
  803. #ifdef CONFIG_PCI
  804. pci_routeirq = 1;
  805. #endif
  806. return 0;
  807. }
  808. early_param("update_mptable", update_mptable_setup);
  809. static unsigned long __initdata mpc_new_phys;
  810. static unsigned long mpc_new_length __initdata = 4096;
  811. /* alloc_mptable or alloc_mptable=4k */
  812. static int __initdata alloc_mptable;
  813. static int __init parse_alloc_mptable_opt(char *p)
  814. {
  815. enable_update_mptable = 1;
  816. #ifdef CONFIG_PCI
  817. pci_routeirq = 1;
  818. #endif
  819. alloc_mptable = 1;
  820. if (!p)
  821. return 0;
  822. mpc_new_length = memparse(p, &p);
  823. return 0;
  824. }
  825. early_param("alloc_mptable", parse_alloc_mptable_opt);
  826. void __init early_reserve_e820_mpc_new(void)
  827. {
  828. if (enable_update_mptable && alloc_mptable) {
  829. u64 startt = 0;
  830. #ifdef CONFIG_X86_TRAMPOLINE
  831. startt = TRAMPOLINE_BASE;
  832. #endif
  833. mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
  834. }
  835. }
  836. static int __init update_mp_table(void)
  837. {
  838. char str[16];
  839. char oem[10];
  840. struct mpf_intel *mpf;
  841. struct mpc_table *mpc, *mpc_new;
  842. if (!enable_update_mptable)
  843. return 0;
  844. mpf = mpf_found;
  845. if (!mpf)
  846. return 0;
  847. /*
  848. * Now see if we need to go further.
  849. */
  850. if (mpf->feature1 != 0)
  851. return 0;
  852. if (!mpf->physptr)
  853. return 0;
  854. mpc = phys_to_virt(mpf->physptr);
  855. if (!smp_check_mpc(mpc, oem, str))
  856. return 0;
  857. printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
  858. printk(KERN_INFO "physptr: %x\n", mpf->physptr);
  859. if (mpc_new_phys && mpc->length > mpc_new_length) {
  860. mpc_new_phys = 0;
  861. printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
  862. mpc_new_length);
  863. }
  864. if (!mpc_new_phys) {
  865. unsigned char old, new;
  866. /* check if we can change the postion */
  867. mpc->checksum = 0;
  868. old = mpf_checksum((unsigned char *)mpc, mpc->length);
  869. mpc->checksum = 0xff;
  870. new = mpf_checksum((unsigned char *)mpc, mpc->length);
  871. if (old == new) {
  872. printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
  873. return 0;
  874. }
  875. printk(KERN_INFO "use in-positon replacing\n");
  876. } else {
  877. mpf->physptr = mpc_new_phys;
  878. mpc_new = phys_to_virt(mpc_new_phys);
  879. memcpy(mpc_new, mpc, mpc->length);
  880. mpc = mpc_new;
  881. /* check if we can modify that */
  882. if (mpc_new_phys - mpf->physptr) {
  883. struct mpf_intel *mpf_new;
  884. /* steal 16 bytes from [0, 1k) */
  885. printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
  886. mpf_new = phys_to_virt(0x400 - 16);
  887. memcpy(mpf_new, mpf, 16);
  888. mpf = mpf_new;
  889. mpf->physptr = mpc_new_phys;
  890. }
  891. mpf->checksum = 0;
  892. mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
  893. printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
  894. }
  895. /*
  896. * only replace the one with mp_INT and
  897. * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
  898. * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
  899. * may need pci=routeirq for all coverage
  900. */
  901. replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
  902. return 0;
  903. }
  904. late_initcall(update_mp_table);