pci_64.h 3.2 KB

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  1. #ifndef __SPARC64_PCI_H
  2. #define __SPARC64_PCI_H
  3. #ifdef __KERNEL__
  4. #include <linux/dma-mapping.h>
  5. /* Can be used to override the logic in pci_scan_bus for skipping
  6. * already-configured bus numbers - to be used for buggy BIOSes
  7. * or architectures with incomplete PCI setup by the loader.
  8. */
  9. #define pcibios_assign_all_busses() 0
  10. #define PCIBIOS_MIN_IO 0UL
  11. #define PCIBIOS_MIN_MEM 0UL
  12. #define PCI_IRQ_NONE 0xffffffff
  13. #define PCI_CACHE_LINE_BYTES 64
  14. static inline void pcibios_set_master(struct pci_dev *dev)
  15. {
  16. /* No special bus mastering setup handling */
  17. }
  18. static inline void pcibios_penalize_isa_irq(int irq, int active)
  19. {
  20. /* We don't do dynamic PCI IRQ allocation */
  21. }
  22. /* The PCI address space does not equal the physical memory
  23. * address space. The networking and block device layers use
  24. * this boolean for bounce buffer decisions.
  25. */
  26. #define PCI_DMA_BUS_IS_PHYS (0)
  27. /* pci_unmap_{single,page} is not a nop, thus... */
  28. #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
  29. dma_addr_t ADDR_NAME;
  30. #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
  31. __u32 LEN_NAME;
  32. #define pci_unmap_addr(PTR, ADDR_NAME) \
  33. ((PTR)->ADDR_NAME)
  34. #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
  35. (((PTR)->ADDR_NAME) = (VAL))
  36. #define pci_unmap_len(PTR, LEN_NAME) \
  37. ((PTR)->LEN_NAME)
  38. #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
  39. (((PTR)->LEN_NAME) = (VAL))
  40. /* PCI IOMMU mapping bypass support. */
  41. /* PCI 64-bit addressing works for all slots on all controller
  42. * types on sparc64. However, it requires that the device
  43. * can drive enough of the 64 bits.
  44. */
  45. #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
  46. #define PCI64_ADDR_BASE 0xfffc000000000000UL
  47. #ifdef CONFIG_PCI
  48. static inline void pci_dma_burst_advice(struct pci_dev *pdev,
  49. enum pci_dma_burst_strategy *strat,
  50. unsigned long *strategy_parameter)
  51. {
  52. unsigned long cacheline_size;
  53. u8 byte;
  54. pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
  55. if (byte == 0)
  56. cacheline_size = 1024;
  57. else
  58. cacheline_size = (int) byte * 4;
  59. *strat = PCI_DMA_BURST_BOUNDARY;
  60. *strategy_parameter = cacheline_size;
  61. }
  62. #endif
  63. /* Return the index of the PCI controller for device PDEV. */
  64. extern int pci_domain_nr(struct pci_bus *bus);
  65. static inline int pci_proc_domain(struct pci_bus *bus)
  66. {
  67. return 1;
  68. }
  69. /* Platform support for /proc/bus/pci/X/Y mmap()s. */
  70. #define HAVE_PCI_MMAP
  71. #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
  72. #define get_pci_unmapped_area get_fb_unmapped_area
  73. extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
  74. enum pci_mmap_state mmap_state,
  75. int write_combine);
  76. extern void
  77. pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
  78. struct resource *res);
  79. extern void
  80. pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
  81. struct pci_bus_region *region);
  82. static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
  83. {
  84. return PCI_IRQ_NONE;
  85. }
  86. struct device_node;
  87. extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev);
  88. #define HAVE_ARCH_PCI_RESOURCE_TO_USER
  89. extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
  90. const struct resource *rsrc,
  91. resource_size_t *start, resource_size_t *end);
  92. #endif /* __KERNEL__ */
  93. #endif /* __SPARC64_PCI_H */