dma-mapping.h 6.0 KB

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  1. #ifndef __ASM_SH_DMA_MAPPING_H
  2. #define __ASM_SH_DMA_MAPPING_H
  3. #include <linux/mm.h>
  4. #include <linux/scatterlist.h>
  5. #include <linux/dma-debug.h>
  6. #include <asm/cacheflush.h>
  7. #include <asm/io.h>
  8. #include <asm-generic/dma-coherent.h>
  9. extern struct bus_type pci_bus_type;
  10. #define dma_supported(dev, mask) (1)
  11. static inline int dma_set_mask(struct device *dev, u64 mask)
  12. {
  13. if (!dev->dma_mask || !dma_supported(dev, mask))
  14. return -EIO;
  15. *dev->dma_mask = mask;
  16. return 0;
  17. }
  18. void *dma_alloc_coherent(struct device *dev, size_t size,
  19. dma_addr_t *dma_handle, gfp_t flag);
  20. void dma_free_coherent(struct device *dev, size_t size,
  21. void *vaddr, dma_addr_t dma_handle);
  22. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  23. enum dma_data_direction dir);
  24. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  25. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  26. #define dma_is_consistent(d, h) (1)
  27. static inline dma_addr_t dma_map_single(struct device *dev,
  28. void *ptr, size_t size,
  29. enum dma_data_direction dir)
  30. {
  31. dma_addr_t addr = virt_to_phys(ptr);
  32. #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  33. if (dev->bus == &pci_bus_type)
  34. return addr;
  35. #endif
  36. dma_cache_sync(dev, ptr, size, dir);
  37. debug_dma_map_page(dev, virt_to_page(ptr),
  38. (unsigned long)ptr & ~PAGE_MASK, size,
  39. dir, addr, true);
  40. return addr;
  41. }
  42. static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
  43. size_t size, enum dma_data_direction dir)
  44. {
  45. debug_dma_unmap_page(dev, addr, size, dir, true);
  46. }
  47. static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  48. int nents, enum dma_data_direction dir)
  49. {
  50. int i;
  51. for (i = 0; i < nents; i++) {
  52. #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  53. dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
  54. #endif
  55. sg[i].dma_address = sg_phys(&sg[i]);
  56. sg[i].dma_length = sg[i].length;
  57. }
  58. debug_dma_map_sg(dev, sg, nents, i, dir);
  59. return nents;
  60. }
  61. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  62. int nents, enum dma_data_direction dir)
  63. {
  64. debug_dma_unmap_sg(dev, sg, nents, dir);
  65. }
  66. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  67. unsigned long offset, size_t size,
  68. enum dma_data_direction dir)
  69. {
  70. return dma_map_single(dev, page_address(page) + offset, size, dir);
  71. }
  72. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  73. size_t size, enum dma_data_direction dir)
  74. {
  75. dma_unmap_single(dev, dma_address, size, dir);
  76. }
  77. static inline void __dma_sync_single(struct device *dev, dma_addr_t dma_handle,
  78. size_t size, enum dma_data_direction dir)
  79. {
  80. #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  81. if (dev->bus == &pci_bus_type)
  82. return;
  83. #endif
  84. dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
  85. }
  86. static inline void dma_sync_single_range(struct device *dev,
  87. dma_addr_t dma_handle,
  88. unsigned long offset, size_t size,
  89. enum dma_data_direction dir)
  90. {
  91. #if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  92. if (dev->bus == &pci_bus_type)
  93. return;
  94. #endif
  95. dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
  96. }
  97. static inline void __dma_sync_sg(struct device *dev, struct scatterlist *sg,
  98. int nelems, enum dma_data_direction dir)
  99. {
  100. int i;
  101. for (i = 0; i < nelems; i++) {
  102. #if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
  103. dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
  104. #endif
  105. sg[i].dma_address = sg_phys(&sg[i]);
  106. sg[i].dma_length = sg[i].length;
  107. }
  108. }
  109. static inline void dma_sync_single_for_cpu(struct device *dev,
  110. dma_addr_t dma_handle, size_t size,
  111. enum dma_data_direction dir)
  112. {
  113. __dma_sync_single(dev, dma_handle, size, dir);
  114. debug_dma_sync_single_for_cpu(dev, dma_handle, size, dir);
  115. }
  116. static inline void dma_sync_single_for_device(struct device *dev,
  117. dma_addr_t dma_handle,
  118. size_t size,
  119. enum dma_data_direction dir)
  120. {
  121. __dma_sync_single(dev, dma_handle, size, dir);
  122. debug_dma_sync_single_for_device(dev, dma_handle, size, dir);
  123. }
  124. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  125. dma_addr_t dma_handle,
  126. unsigned long offset,
  127. size_t size,
  128. enum dma_data_direction direction)
  129. {
  130. dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
  131. debug_dma_sync_single_range_for_cpu(dev, dma_handle,
  132. offset, size, direction);
  133. }
  134. static inline void dma_sync_single_range_for_device(struct device *dev,
  135. dma_addr_t dma_handle,
  136. unsigned long offset,
  137. size_t size,
  138. enum dma_data_direction direction)
  139. {
  140. dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
  141. debug_dma_sync_single_range_for_device(dev, dma_handle,
  142. offset, size, direction);
  143. }
  144. static inline void dma_sync_sg_for_cpu(struct device *dev,
  145. struct scatterlist *sg, int nelems,
  146. enum dma_data_direction dir)
  147. {
  148. __dma_sync_sg(dev, sg, nelems, dir);
  149. debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
  150. }
  151. static inline void dma_sync_sg_for_device(struct device *dev,
  152. struct scatterlist *sg, int nelems,
  153. enum dma_data_direction dir)
  154. {
  155. __dma_sync_sg(dev, sg, nelems, dir);
  156. debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
  157. }
  158. static inline int dma_get_cache_alignment(void)
  159. {
  160. /*
  161. * Each processor family will define its own L1_CACHE_SHIFT,
  162. * L1_CACHE_BYTES wraps to this, so this is always safe.
  163. */
  164. return L1_CACHE_BYTES;
  165. }
  166. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  167. {
  168. return dma_addr == 0;
  169. }
  170. #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
  171. extern int
  172. dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  173. dma_addr_t device_addr, size_t size, int flags);
  174. extern void
  175. dma_release_declared_memory(struct device *dev);
  176. extern void *
  177. dma_mark_declared_memory_occupied(struct device *dev,
  178. dma_addr_t device_addr, size_t size);
  179. #endif /* __ASM_SH_DMA_MAPPING_H */