ops-sh5.c 1.5 KB

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  1. /*
  2. * Support functions for the SH5 PCI hardware.
  3. *
  4. * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
  5. * Copyright (C) 2003, 2004 Paul Mundt
  6. * Copyright (C) 2004 Richard Curnow
  7. *
  8. * May be copied or modified under the terms of the GNU General Public
  9. * License. See linux/COPYING for more information.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/rwsem.h>
  13. #include <linux/smp.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/init.h>
  16. #include <linux/errno.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/types.h>
  20. #include <linux/irq.h>
  21. #include <asm/pci.h>
  22. #include <asm/io.h>
  23. #include "pci-sh5.h"
  24. static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  25. int size, u32 *val)
  26. {
  27. SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  28. switch (size) {
  29. case 1:
  30. *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
  31. break;
  32. case 2:
  33. *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
  34. break;
  35. case 4:
  36. *val = SH5PCI_READ(PDR);
  37. break;
  38. }
  39. return PCIBIOS_SUCCESSFUL;
  40. }
  41. static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  42. int size, u32 val)
  43. {
  44. SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
  45. switch (size) {
  46. case 1:
  47. SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
  48. break;
  49. case 2:
  50. SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
  51. break;
  52. case 4:
  53. SH5PCI_WRITE(PDR, val);
  54. break;
  55. }
  56. return PCIBIOS_SUCCESSFUL;
  57. }
  58. struct pci_ops sh5_pci_ops = {
  59. .read = sh5pci_read,
  60. .write = sh5pci_write,
  61. };