hd64461.c 2.4 KB

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  1. /*
  2. * Copyright (C) 2000 YAEGASHI Takeshi
  3. * Hitachi HD64461 companion chip support
  4. */
  5. #include <linux/sched.h>
  6. #include <linux/module.h>
  7. #include <linux/kernel.h>
  8. #include <linux/param.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/init.h>
  11. #include <linux/irq.h>
  12. #include <linux/io.h>
  13. #include <asm/irq.h>
  14. #include <asm/hd64461.h>
  15. /* This belongs in cpu specific */
  16. #define INTC_ICR1 0xA4140010UL
  17. static void hd64461_mask_irq(unsigned int irq)
  18. {
  19. unsigned short nimr;
  20. unsigned short mask = 1 << (irq - HD64461_IRQBASE);
  21. nimr = __raw_readw(HD64461_NIMR);
  22. nimr |= mask;
  23. __raw_writew(nimr, HD64461_NIMR);
  24. }
  25. static void hd64461_unmask_irq(unsigned int irq)
  26. {
  27. unsigned short nimr;
  28. unsigned short mask = 1 << (irq - HD64461_IRQBASE);
  29. nimr = __raw_readw(HD64461_NIMR);
  30. nimr &= ~mask;
  31. __raw_writew(nimr, HD64461_NIMR);
  32. }
  33. static void hd64461_mask_and_ack_irq(unsigned int irq)
  34. {
  35. hd64461_mask_irq(irq);
  36. #ifdef CONFIG_HD64461_ENABLER
  37. if (irq == HD64461_IRQBASE + 13)
  38. __raw_writeb(0x00, HD64461_PCC1CSCR);
  39. #endif
  40. }
  41. static struct irq_chip hd64461_irq_chip = {
  42. .name = "HD64461-IRQ",
  43. .mask = hd64461_mask_irq,
  44. .mask_ack = hd64461_mask_and_ack_irq,
  45. .unmask = hd64461_unmask_irq,
  46. };
  47. static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
  48. {
  49. unsigned short intv = ctrl_inw(HD64461_NIRR);
  50. struct irq_desc *ext_desc;
  51. unsigned int ext_irq = HD64461_IRQBASE;
  52. intv &= (1 << HD64461_IRQ_NUM) - 1;
  53. while (intv) {
  54. if (intv & 1) {
  55. ext_desc = irq_desc + ext_irq;
  56. handle_level_irq(ext_irq, ext_desc);
  57. }
  58. intv >>= 1;
  59. ext_irq++;
  60. }
  61. }
  62. int __init setup_hd64461(void)
  63. {
  64. int i;
  65. if (!MACH_HD64461)
  66. return 0;
  67. printk(KERN_INFO
  68. "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
  69. HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
  70. HD64461_IRQBASE + 15);
  71. /* Should be at processor specific part.. */
  72. #if defined(CONFIG_CPU_SUBTYPE_SH7709)
  73. __raw_writew(0x2240, INTC_ICR1);
  74. #endif
  75. __raw_writew(0xffff, HD64461_NIMR);
  76. /* IRQ 80 -> 95 belongs to HD64461 */
  77. for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
  78. set_irq_chip_and_handler(i, &hd64461_irq_chip,
  79. handle_level_irq);
  80. set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
  81. set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
  82. #ifdef CONFIG_HD64461_ENABLER
  83. printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
  84. __raw_writeb(0x4c, HD64461_PCC1CSCIER);
  85. __raw_writeb(0x00, HD64461_PCC1CSCR);
  86. #endif
  87. return 0;
  88. }
  89. module_init(setup_hd64461);