irq.c 1.9 KB

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  1. /*
  2. * linux/arch/sh/boards/se/7780/irq.c
  3. *
  4. * Copyright (C) 2006,2007 Nobuhiro Iwamatsu
  5. *
  6. * Hitachi UL SolutionEngine 7780 Support.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/irq.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <mach-se/mach/se7780.h>
  17. #define INTC_BASE 0xffd00000
  18. #define INTC_ICR1 (INTC_BASE+0x1c)
  19. /*
  20. * Initialize IRQ setting
  21. */
  22. void __init init_se7780_IRQ(void)
  23. {
  24. /* enable all interrupt at FPGA */
  25. ctrl_outw(0, FPGA_INTMSK1);
  26. /* mask SM501 interrupt */
  27. ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
  28. /* enable all interrupt at FPGA */
  29. ctrl_outw(0, FPGA_INTMSK2);
  30. /* set FPGA INTSEL register */
  31. /* FPGA + 0x06 */
  32. ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
  33. (IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
  34. /* FPGA + 0x08 */
  35. ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
  36. (IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
  37. (IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
  38. (IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
  39. /* FPGA + 0x0A */
  40. ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
  41. plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
  42. /* ICR1: detect low level(for 2ndcut) */
  43. ctrl_outl(0xAAAA0000, INTC_ICR1);
  44. /*
  45. * FPGA PCISEL register initialize
  46. *
  47. * CPU || SLOT1 | SLOT2 | S-ATA | USB
  48. * -------------------------------------
  49. * INTA || INTA | INTD | -- | INTB
  50. * -------------------------------------
  51. * INTB || INTB | INTA | -- | INTC
  52. * -------------------------------------
  53. * INTC || INTC | INTB | INTA | --
  54. * -------------------------------------
  55. * INTD || INTD | INTC | -- | INTA
  56. * -------------------------------------
  57. */
  58. ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
  59. ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
  60. }