time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. /*
  51. * Create a small time difference between the timer interrupts
  52. * on the different cpus to avoid lock contention.
  53. */
  54. #define CPU_DEVIATION (smp_processor_id() << 12)
  55. #define TICK_SIZE tick
  56. u64 sched_clock_base_cc = -1; /* Force to data section. */
  57. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  58. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  59. /*
  60. * Scheduler clock - returns current time in nanosec units.
  61. */
  62. unsigned long long notrace sched_clock(void)
  63. {
  64. return (get_clock_monotonic() * 125) >> 9;
  65. }
  66. /*
  67. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  68. */
  69. unsigned long long monotonic_clock(void)
  70. {
  71. return sched_clock();
  72. }
  73. EXPORT_SYMBOL(monotonic_clock);
  74. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  75. {
  76. unsigned long long sec;
  77. sec = todval >> 12;
  78. do_div(sec, 1000000);
  79. xtime->tv_sec = sec;
  80. todval -= (sec * 1000000) << 12;
  81. xtime->tv_nsec = ((todval * 1000) >> 12);
  82. }
  83. EXPORT_SYMBOL(tod_to_timeval);
  84. void clock_comparator_work(void)
  85. {
  86. struct clock_event_device *cd;
  87. S390_lowcore.clock_comparator = -1ULL;
  88. set_clock_comparator(S390_lowcore.clock_comparator);
  89. cd = &__get_cpu_var(comparators);
  90. cd->event_handler(cd);
  91. }
  92. /*
  93. * Fixup the clock comparator.
  94. */
  95. static void fixup_clock_comparator(unsigned long long delta)
  96. {
  97. /* If nobody is waiting there's nothing to fix. */
  98. if (S390_lowcore.clock_comparator == -1ULL)
  99. return;
  100. S390_lowcore.clock_comparator += delta;
  101. set_clock_comparator(S390_lowcore.clock_comparator);
  102. }
  103. static int s390_next_event(unsigned long delta,
  104. struct clock_event_device *evt)
  105. {
  106. S390_lowcore.clock_comparator = get_clock() + delta;
  107. set_clock_comparator(S390_lowcore.clock_comparator);
  108. return 0;
  109. }
  110. static void s390_set_mode(enum clock_event_mode mode,
  111. struct clock_event_device *evt)
  112. {
  113. }
  114. /*
  115. * Set up lowcore and control register of the current cpu to
  116. * enable TOD clock and clock comparator interrupts.
  117. */
  118. void init_cpu_timer(void)
  119. {
  120. struct clock_event_device *cd;
  121. int cpu;
  122. S390_lowcore.clock_comparator = -1ULL;
  123. set_clock_comparator(S390_lowcore.clock_comparator);
  124. cpu = smp_processor_id();
  125. cd = &per_cpu(comparators, cpu);
  126. cd->name = "comparator";
  127. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  128. cd->mult = 16777;
  129. cd->shift = 12;
  130. cd->min_delta_ns = 1;
  131. cd->max_delta_ns = LONG_MAX;
  132. cd->rating = 400;
  133. cd->cpumask = cpumask_of(cpu);
  134. cd->set_next_event = s390_next_event;
  135. cd->set_mode = s390_set_mode;
  136. clockevents_register_device(cd);
  137. /* Enable clock comparator timer interrupt. */
  138. __ctl_set_bit(0,11);
  139. /* Always allow the timing alert external interrupt. */
  140. __ctl_set_bit(0, 4);
  141. }
  142. static void clock_comparator_interrupt(__u16 code)
  143. {
  144. if (S390_lowcore.clock_comparator == -1ULL)
  145. set_clock_comparator(S390_lowcore.clock_comparator);
  146. }
  147. static void etr_timing_alert(struct etr_irq_parm *);
  148. static void stp_timing_alert(struct stp_irq_parm *);
  149. static void timing_alert_interrupt(__u16 code)
  150. {
  151. if (S390_lowcore.ext_params & 0x00c40000)
  152. etr_timing_alert((struct etr_irq_parm *)
  153. &S390_lowcore.ext_params);
  154. if (S390_lowcore.ext_params & 0x00038000)
  155. stp_timing_alert((struct stp_irq_parm *)
  156. &S390_lowcore.ext_params);
  157. }
  158. static void etr_reset(void);
  159. static void stp_reset(void);
  160. void read_persistent_clock(struct timespec *ts)
  161. {
  162. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  163. }
  164. void read_boot_clock(struct timespec *ts)
  165. {
  166. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  167. }
  168. static cycle_t read_tod_clock(struct clocksource *cs)
  169. {
  170. return get_clock();
  171. }
  172. static struct clocksource clocksource_tod = {
  173. .name = "tod",
  174. .rating = 400,
  175. .read = read_tod_clock,
  176. .mask = -1ULL,
  177. .mult = 1000,
  178. .shift = 12,
  179. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  180. };
  181. struct clocksource * __init clocksource_default_clock(void)
  182. {
  183. return &clocksource_tod;
  184. }
  185. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  186. {
  187. if (clock != &clocksource_tod)
  188. return;
  189. /* Make userspace gettimeofday spin until we're done. */
  190. ++vdso_data->tb_update_count;
  191. smp_wmb();
  192. vdso_data->xtime_tod_stamp = clock->cycle_last;
  193. vdso_data->xtime_clock_sec = xtime.tv_sec;
  194. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  195. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  196. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  197. smp_wmb();
  198. ++vdso_data->tb_update_count;
  199. }
  200. extern struct timezone sys_tz;
  201. void update_vsyscall_tz(void)
  202. {
  203. /* Make userspace gettimeofday spin until we're done. */
  204. ++vdso_data->tb_update_count;
  205. smp_wmb();
  206. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  207. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  208. smp_wmb();
  209. ++vdso_data->tb_update_count;
  210. }
  211. /*
  212. * Initialize the TOD clock and the CPU timer of
  213. * the boot cpu.
  214. */
  215. void __init time_init(void)
  216. {
  217. /* Reset time synchronization interfaces. */
  218. etr_reset();
  219. stp_reset();
  220. /* request the clock comparator external interrupt */
  221. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  222. panic("Couldn't request external interrupt 0x1004");
  223. /* request the timing alert external interrupt */
  224. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  225. panic("Couldn't request external interrupt 0x1406");
  226. if (clocksource_register(&clocksource_tod) != 0)
  227. panic("Could not register TOD clock source");
  228. /* Enable TOD clock interrupts on the boot cpu. */
  229. init_cpu_timer();
  230. /* Enable cpu timer interrupts on the boot cpu. */
  231. vtime_init();
  232. }
  233. /*
  234. * The time is "clock". old is what we think the time is.
  235. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  236. * "delay" is an approximation how long the synchronization took. If
  237. * the time correction is positive, then "delay" is subtracted from
  238. * the time difference and only the remaining part is passed to ntp.
  239. */
  240. static unsigned long long adjust_time(unsigned long long old,
  241. unsigned long long clock,
  242. unsigned long long delay)
  243. {
  244. unsigned long long delta, ticks;
  245. struct timex adjust;
  246. if (clock > old) {
  247. /* It is later than we thought. */
  248. delta = ticks = clock - old;
  249. delta = ticks = (delta < delay) ? 0 : delta - delay;
  250. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  251. adjust.offset = ticks * (1000000 / HZ);
  252. } else {
  253. /* It is earlier than we thought. */
  254. delta = ticks = old - clock;
  255. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  256. delta = -delta;
  257. adjust.offset = -ticks * (1000000 / HZ);
  258. }
  259. sched_clock_base_cc += delta;
  260. if (adjust.offset != 0) {
  261. pr_notice("The ETR interface has adjusted the clock "
  262. "by %li microseconds\n", adjust.offset);
  263. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  264. do_adjtimex(&adjust);
  265. }
  266. return delta;
  267. }
  268. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  269. static DEFINE_MUTEX(clock_sync_mutex);
  270. static unsigned long clock_sync_flags;
  271. #define CLOCK_SYNC_HAS_ETR 0
  272. #define CLOCK_SYNC_HAS_STP 1
  273. #define CLOCK_SYNC_ETR 2
  274. #define CLOCK_SYNC_STP 3
  275. /*
  276. * The synchronous get_clock function. It will write the current clock
  277. * value to the clock pointer and return 0 if the clock is in sync with
  278. * the external time source. If the clock mode is local it will return
  279. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  280. * reference.
  281. */
  282. int get_sync_clock(unsigned long long *clock)
  283. {
  284. atomic_t *sw_ptr;
  285. unsigned int sw0, sw1;
  286. sw_ptr = &get_cpu_var(clock_sync_word);
  287. sw0 = atomic_read(sw_ptr);
  288. *clock = get_clock();
  289. sw1 = atomic_read(sw_ptr);
  290. put_cpu_var(clock_sync_sync);
  291. if (sw0 == sw1 && (sw0 & 0x80000000U))
  292. /* Success: time is in sync. */
  293. return 0;
  294. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  295. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  296. return -ENOSYS;
  297. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  298. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  299. return -EACCES;
  300. return -EAGAIN;
  301. }
  302. EXPORT_SYMBOL(get_sync_clock);
  303. /*
  304. * Make get_sync_clock return -EAGAIN.
  305. */
  306. static void disable_sync_clock(void *dummy)
  307. {
  308. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  309. /*
  310. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  311. * fail until the sync bit is turned back on. In addition
  312. * increase the "sequence" counter to avoid the race of an
  313. * etr event and the complete recovery against get_sync_clock.
  314. */
  315. atomic_clear_mask(0x80000000, sw_ptr);
  316. atomic_inc(sw_ptr);
  317. }
  318. /*
  319. * Make get_sync_clock return 0 again.
  320. * Needs to be called from a context disabled for preemption.
  321. */
  322. static void enable_sync_clock(void)
  323. {
  324. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  325. atomic_set_mask(0x80000000, sw_ptr);
  326. }
  327. /*
  328. * Function to check if the clock is in sync.
  329. */
  330. static inline int check_sync_clock(void)
  331. {
  332. atomic_t *sw_ptr;
  333. int rc;
  334. sw_ptr = &get_cpu_var(clock_sync_word);
  335. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  336. put_cpu_var(clock_sync_sync);
  337. return rc;
  338. }
  339. /* Single threaded workqueue used for etr and stp sync events */
  340. static struct workqueue_struct *time_sync_wq;
  341. static void __init time_init_wq(void)
  342. {
  343. if (time_sync_wq)
  344. return;
  345. time_sync_wq = create_singlethread_workqueue("timesync");
  346. stop_machine_create();
  347. }
  348. /*
  349. * External Time Reference (ETR) code.
  350. */
  351. static int etr_port0_online;
  352. static int etr_port1_online;
  353. static int etr_steai_available;
  354. static int __init early_parse_etr(char *p)
  355. {
  356. if (strncmp(p, "off", 3) == 0)
  357. etr_port0_online = etr_port1_online = 0;
  358. else if (strncmp(p, "port0", 5) == 0)
  359. etr_port0_online = 1;
  360. else if (strncmp(p, "port1", 5) == 0)
  361. etr_port1_online = 1;
  362. else if (strncmp(p, "on", 2) == 0)
  363. etr_port0_online = etr_port1_online = 1;
  364. return 0;
  365. }
  366. early_param("etr", early_parse_etr);
  367. enum etr_event {
  368. ETR_EVENT_PORT0_CHANGE,
  369. ETR_EVENT_PORT1_CHANGE,
  370. ETR_EVENT_PORT_ALERT,
  371. ETR_EVENT_SYNC_CHECK,
  372. ETR_EVENT_SWITCH_LOCAL,
  373. ETR_EVENT_UPDATE,
  374. };
  375. /*
  376. * Valid bit combinations of the eacr register are (x = don't care):
  377. * e0 e1 dp p0 p1 ea es sl
  378. * 0 0 x 0 0 0 0 0 initial, disabled state
  379. * 0 0 x 0 1 1 0 0 port 1 online
  380. * 0 0 x 1 0 1 0 0 port 0 online
  381. * 0 0 x 1 1 1 0 0 both ports online
  382. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  383. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  384. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  385. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  386. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  387. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  388. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  389. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  390. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  391. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  392. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  393. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  394. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  395. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  396. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  397. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  398. */
  399. static struct etr_eacr etr_eacr;
  400. static u64 etr_tolec; /* time of last eacr update */
  401. static struct etr_aib etr_port0;
  402. static int etr_port0_uptodate;
  403. static struct etr_aib etr_port1;
  404. static int etr_port1_uptodate;
  405. static unsigned long etr_events;
  406. static struct timer_list etr_timer;
  407. static void etr_timeout(unsigned long dummy);
  408. static void etr_work_fn(struct work_struct *work);
  409. static DEFINE_MUTEX(etr_work_mutex);
  410. static DECLARE_WORK(etr_work, etr_work_fn);
  411. /*
  412. * Reset ETR attachment.
  413. */
  414. static void etr_reset(void)
  415. {
  416. etr_eacr = (struct etr_eacr) {
  417. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  418. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  419. .es = 0, .sl = 0 };
  420. if (etr_setr(&etr_eacr) == 0) {
  421. etr_tolec = get_clock();
  422. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  423. if (etr_port0_online && etr_port1_online)
  424. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  425. } else if (etr_port0_online || etr_port1_online) {
  426. pr_warning("The real or virtual hardware system does "
  427. "not provide an ETR interface\n");
  428. etr_port0_online = etr_port1_online = 0;
  429. }
  430. }
  431. static int __init etr_init(void)
  432. {
  433. struct etr_aib aib;
  434. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  435. return 0;
  436. time_init_wq();
  437. /* Check if this machine has the steai instruction. */
  438. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  439. etr_steai_available = 1;
  440. setup_timer(&etr_timer, etr_timeout, 0UL);
  441. if (etr_port0_online) {
  442. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  443. queue_work(time_sync_wq, &etr_work);
  444. }
  445. if (etr_port1_online) {
  446. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  447. queue_work(time_sync_wq, &etr_work);
  448. }
  449. return 0;
  450. }
  451. arch_initcall(etr_init);
  452. /*
  453. * Two sorts of ETR machine checks. The architecture reads:
  454. * "When a machine-check niterruption occurs and if a switch-to-local or
  455. * ETR-sync-check interrupt request is pending but disabled, this pending
  456. * disabled interruption request is indicated and is cleared".
  457. * Which means that we can get etr_switch_to_local events from the machine
  458. * check handler although the interruption condition is disabled. Lovely..
  459. */
  460. /*
  461. * Switch to local machine check. This is called when the last usable
  462. * ETR port goes inactive. After switch to local the clock is not in sync.
  463. */
  464. void etr_switch_to_local(void)
  465. {
  466. if (!etr_eacr.sl)
  467. return;
  468. disable_sync_clock(NULL);
  469. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  470. queue_work(time_sync_wq, &etr_work);
  471. }
  472. /*
  473. * ETR sync check machine check. This is called when the ETR OTE and the
  474. * local clock OTE are farther apart than the ETR sync check tolerance.
  475. * After a ETR sync check the clock is not in sync. The machine check
  476. * is broadcasted to all cpus at the same time.
  477. */
  478. void etr_sync_check(void)
  479. {
  480. if (!etr_eacr.es)
  481. return;
  482. disable_sync_clock(NULL);
  483. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  484. queue_work(time_sync_wq, &etr_work);
  485. }
  486. /*
  487. * ETR timing alert. There are two causes:
  488. * 1) port state change, check the usability of the port
  489. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  490. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  491. * or ETR-data word 4 (edf4) has changed.
  492. */
  493. static void etr_timing_alert(struct etr_irq_parm *intparm)
  494. {
  495. if (intparm->pc0)
  496. /* ETR port 0 state change. */
  497. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  498. if (intparm->pc1)
  499. /* ETR port 1 state change. */
  500. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  501. if (intparm->eai)
  502. /*
  503. * ETR port alert on either port 0, 1 or both.
  504. * Both ports are not up-to-date now.
  505. */
  506. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  507. queue_work(time_sync_wq, &etr_work);
  508. }
  509. static void etr_timeout(unsigned long dummy)
  510. {
  511. set_bit(ETR_EVENT_UPDATE, &etr_events);
  512. queue_work(time_sync_wq, &etr_work);
  513. }
  514. /*
  515. * Check if the etr mode is pss.
  516. */
  517. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  518. {
  519. return eacr.es && !eacr.sl;
  520. }
  521. /*
  522. * Check if the etr mode is etr.
  523. */
  524. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  525. {
  526. return eacr.es && eacr.sl;
  527. }
  528. /*
  529. * Check if the port can be used for TOD synchronization.
  530. * For PPS mode the port has to receive OTEs. For ETR mode
  531. * the port has to receive OTEs, the ETR stepping bit has to
  532. * be zero and the validity bits for data frame 1, 2, and 3
  533. * have to be 1.
  534. */
  535. static int etr_port_valid(struct etr_aib *aib, int port)
  536. {
  537. unsigned int psc;
  538. /* Check that this port is receiving OTEs. */
  539. if (aib->tsp == 0)
  540. return 0;
  541. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  542. if (psc == etr_lpsc_pps_mode)
  543. return 1;
  544. if (psc == etr_lpsc_operational_step)
  545. return !aib->esw.y && aib->slsw.v1 &&
  546. aib->slsw.v2 && aib->slsw.v3;
  547. return 0;
  548. }
  549. /*
  550. * Check if two ports are on the same network.
  551. */
  552. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  553. {
  554. // FIXME: any other fields we have to compare?
  555. return aib1->edf1.net_id == aib2->edf1.net_id;
  556. }
  557. /*
  558. * Wrapper for etr_stei that converts physical port states
  559. * to logical port states to be consistent with the output
  560. * of stetr (see etr_psc vs. etr_lpsc).
  561. */
  562. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  563. {
  564. BUG_ON(etr_steai(aib, func) != 0);
  565. /* Convert port state to logical port state. */
  566. if (aib->esw.psc0 == 1)
  567. aib->esw.psc0 = 2;
  568. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  569. aib->esw.psc0 = 1;
  570. if (aib->esw.psc1 == 1)
  571. aib->esw.psc1 = 2;
  572. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  573. aib->esw.psc1 = 1;
  574. }
  575. /*
  576. * Check if the aib a2 is still connected to the same attachment as
  577. * aib a1, the etv values differ by one and a2 is valid.
  578. */
  579. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  580. {
  581. int state_a1, state_a2;
  582. /* Paranoia check: e0/e1 should better be the same. */
  583. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  584. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  585. return 0;
  586. /* Still connected to the same etr ? */
  587. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  588. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  589. if (state_a1 == etr_lpsc_operational_step) {
  590. if (state_a2 != etr_lpsc_operational_step ||
  591. a1->edf1.net_id != a2->edf1.net_id ||
  592. a1->edf1.etr_id != a2->edf1.etr_id ||
  593. a1->edf1.etr_pn != a2->edf1.etr_pn)
  594. return 0;
  595. } else if (state_a2 != etr_lpsc_pps_mode)
  596. return 0;
  597. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  598. if (a1->edf2.etv + 1 != a2->edf2.etv)
  599. return 0;
  600. if (!etr_port_valid(a2, p))
  601. return 0;
  602. return 1;
  603. }
  604. struct clock_sync_data {
  605. atomic_t cpus;
  606. int in_sync;
  607. unsigned long long fixup_cc;
  608. int etr_port;
  609. struct etr_aib *etr_aib;
  610. };
  611. static void clock_sync_cpu(struct clock_sync_data *sync)
  612. {
  613. atomic_dec(&sync->cpus);
  614. enable_sync_clock();
  615. /*
  616. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  617. * is called on all other cpus while the TOD clocks is stopped.
  618. * __udelay will stop the cpu on an enabled wait psw until the
  619. * TOD is running again.
  620. */
  621. while (sync->in_sync == 0) {
  622. __udelay(1);
  623. /*
  624. * A different cpu changes *in_sync. Therefore use
  625. * barrier() to force memory access.
  626. */
  627. barrier();
  628. }
  629. if (sync->in_sync != 1)
  630. /* Didn't work. Clear per-cpu in sync bit again. */
  631. disable_sync_clock(NULL);
  632. /*
  633. * This round of TOD syncing is done. Set the clock comparator
  634. * to the next tick and let the processor continue.
  635. */
  636. fixup_clock_comparator(sync->fixup_cc);
  637. }
  638. /*
  639. * Sync the TOD clock using the port refered to by aibp. This port
  640. * has to be enabled and the other port has to be disabled. The
  641. * last eacr update has to be more than 1.6 seconds in the past.
  642. */
  643. static int etr_sync_clock(void *data)
  644. {
  645. static int first;
  646. unsigned long long clock, old_clock, delay, delta;
  647. struct clock_sync_data *etr_sync;
  648. struct etr_aib *sync_port, *aib;
  649. int port;
  650. int rc;
  651. etr_sync = data;
  652. if (xchg(&first, 1) == 1) {
  653. /* Slave */
  654. clock_sync_cpu(etr_sync);
  655. return 0;
  656. }
  657. /* Wait until all other cpus entered the sync function. */
  658. while (atomic_read(&etr_sync->cpus) != 0)
  659. cpu_relax();
  660. port = etr_sync->etr_port;
  661. aib = etr_sync->etr_aib;
  662. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  663. enable_sync_clock();
  664. /* Set clock to next OTE. */
  665. __ctl_set_bit(14, 21);
  666. __ctl_set_bit(0, 29);
  667. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  668. old_clock = get_clock();
  669. if (set_clock(clock) == 0) {
  670. __udelay(1); /* Wait for the clock to start. */
  671. __ctl_clear_bit(0, 29);
  672. __ctl_clear_bit(14, 21);
  673. etr_stetr(aib);
  674. /* Adjust Linux timing variables. */
  675. delay = (unsigned long long)
  676. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  677. delta = adjust_time(old_clock, clock, delay);
  678. etr_sync->fixup_cc = delta;
  679. fixup_clock_comparator(delta);
  680. /* Verify that the clock is properly set. */
  681. if (!etr_aib_follows(sync_port, aib, port)) {
  682. /* Didn't work. */
  683. disable_sync_clock(NULL);
  684. etr_sync->in_sync = -EAGAIN;
  685. rc = -EAGAIN;
  686. } else {
  687. etr_sync->in_sync = 1;
  688. rc = 0;
  689. }
  690. } else {
  691. /* Could not set the clock ?!? */
  692. __ctl_clear_bit(0, 29);
  693. __ctl_clear_bit(14, 21);
  694. disable_sync_clock(NULL);
  695. etr_sync->in_sync = -EAGAIN;
  696. rc = -EAGAIN;
  697. }
  698. xchg(&first, 0);
  699. return rc;
  700. }
  701. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  702. {
  703. struct clock_sync_data etr_sync;
  704. struct etr_aib *sync_port;
  705. int follows;
  706. int rc;
  707. /* Check if the current aib is adjacent to the sync port aib. */
  708. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  709. follows = etr_aib_follows(sync_port, aib, port);
  710. memcpy(sync_port, aib, sizeof(*aib));
  711. if (!follows)
  712. return -EAGAIN;
  713. memset(&etr_sync, 0, sizeof(etr_sync));
  714. etr_sync.etr_aib = aib;
  715. etr_sync.etr_port = port;
  716. get_online_cpus();
  717. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  718. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  719. put_online_cpus();
  720. return rc;
  721. }
  722. /*
  723. * Handle the immediate effects of the different events.
  724. * The port change event is used for online/offline changes.
  725. */
  726. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  727. {
  728. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  729. eacr.es = 0;
  730. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  731. eacr.es = eacr.sl = 0;
  732. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  733. etr_port0_uptodate = etr_port1_uptodate = 0;
  734. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  735. if (eacr.e0)
  736. /*
  737. * Port change of an enabled port. We have to
  738. * assume that this can have caused an stepping
  739. * port switch.
  740. */
  741. etr_tolec = get_clock();
  742. eacr.p0 = etr_port0_online;
  743. if (!eacr.p0)
  744. eacr.e0 = 0;
  745. etr_port0_uptodate = 0;
  746. }
  747. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  748. if (eacr.e1)
  749. /*
  750. * Port change of an enabled port. We have to
  751. * assume that this can have caused an stepping
  752. * port switch.
  753. */
  754. etr_tolec = get_clock();
  755. eacr.p1 = etr_port1_online;
  756. if (!eacr.p1)
  757. eacr.e1 = 0;
  758. etr_port1_uptodate = 0;
  759. }
  760. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  761. return eacr;
  762. }
  763. /*
  764. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  765. * one of the ports needs an update.
  766. */
  767. static void etr_set_tolec_timeout(unsigned long long now)
  768. {
  769. unsigned long micros;
  770. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  771. (!etr_eacr.p1 || etr_port1_uptodate))
  772. return;
  773. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  774. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  775. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  776. }
  777. /*
  778. * Set up a time that expires after 1/2 second.
  779. */
  780. static void etr_set_sync_timeout(void)
  781. {
  782. mod_timer(&etr_timer, jiffies + HZ/2);
  783. }
  784. /*
  785. * Update the aib information for one or both ports.
  786. */
  787. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  788. struct etr_eacr eacr)
  789. {
  790. /* With both ports disabled the aib information is useless. */
  791. if (!eacr.e0 && !eacr.e1)
  792. return eacr;
  793. /* Update port0 or port1 with aib stored in etr_work_fn. */
  794. if (aib->esw.q == 0) {
  795. /* Information for port 0 stored. */
  796. if (eacr.p0 && !etr_port0_uptodate) {
  797. etr_port0 = *aib;
  798. if (etr_port0_online)
  799. etr_port0_uptodate = 1;
  800. }
  801. } else {
  802. /* Information for port 1 stored. */
  803. if (eacr.p1 && !etr_port1_uptodate) {
  804. etr_port1 = *aib;
  805. if (etr_port0_online)
  806. etr_port1_uptodate = 1;
  807. }
  808. }
  809. /*
  810. * Do not try to get the alternate port aib if the clock
  811. * is not in sync yet.
  812. */
  813. if (!check_sync_clock())
  814. return eacr;
  815. /*
  816. * If steai is available we can get the information about
  817. * the other port immediately. If only stetr is available the
  818. * data-port bit toggle has to be used.
  819. */
  820. if (etr_steai_available) {
  821. if (eacr.p0 && !etr_port0_uptodate) {
  822. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  823. etr_port0_uptodate = 1;
  824. }
  825. if (eacr.p1 && !etr_port1_uptodate) {
  826. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  827. etr_port1_uptodate = 1;
  828. }
  829. } else {
  830. /*
  831. * One port was updated above, if the other
  832. * port is not uptodate toggle dp bit.
  833. */
  834. if ((eacr.p0 && !etr_port0_uptodate) ||
  835. (eacr.p1 && !etr_port1_uptodate))
  836. eacr.dp ^= 1;
  837. else
  838. eacr.dp = 0;
  839. }
  840. return eacr;
  841. }
  842. /*
  843. * Write new etr control register if it differs from the current one.
  844. * Return 1 if etr_tolec has been updated as well.
  845. */
  846. static void etr_update_eacr(struct etr_eacr eacr)
  847. {
  848. int dp_changed;
  849. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  850. /* No change, return. */
  851. return;
  852. /*
  853. * The disable of an active port of the change of the data port
  854. * bit can/will cause a change in the data port.
  855. */
  856. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  857. (etr_eacr.dp ^ eacr.dp) != 0;
  858. etr_eacr = eacr;
  859. etr_setr(&etr_eacr);
  860. if (dp_changed)
  861. etr_tolec = get_clock();
  862. }
  863. /*
  864. * ETR work. In this function you'll find the main logic. In
  865. * particular this is the only function that calls etr_update_eacr(),
  866. * it "controls" the etr control register.
  867. */
  868. static void etr_work_fn(struct work_struct *work)
  869. {
  870. unsigned long long now;
  871. struct etr_eacr eacr;
  872. struct etr_aib aib;
  873. int sync_port;
  874. /* prevent multiple execution. */
  875. mutex_lock(&etr_work_mutex);
  876. /* Create working copy of etr_eacr. */
  877. eacr = etr_eacr;
  878. /* Check for the different events and their immediate effects. */
  879. eacr = etr_handle_events(eacr);
  880. /* Check if ETR is supposed to be active. */
  881. eacr.ea = eacr.p0 || eacr.p1;
  882. if (!eacr.ea) {
  883. /* Both ports offline. Reset everything. */
  884. eacr.dp = eacr.es = eacr.sl = 0;
  885. on_each_cpu(disable_sync_clock, NULL, 1);
  886. del_timer_sync(&etr_timer);
  887. etr_update_eacr(eacr);
  888. goto out_unlock;
  889. }
  890. /* Store aib to get the current ETR status word. */
  891. BUG_ON(etr_stetr(&aib) != 0);
  892. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  893. now = get_clock();
  894. /*
  895. * Update the port information if the last stepping port change
  896. * or data port change is older than 1.6 seconds.
  897. */
  898. if (now >= etr_tolec + (1600000 << 12))
  899. eacr = etr_handle_update(&aib, eacr);
  900. /*
  901. * Select ports to enable. The prefered synchronization mode is PPS.
  902. * If a port can be enabled depends on a number of things:
  903. * 1) The port needs to be online and uptodate. A port is not
  904. * disabled just because it is not uptodate, but it is only
  905. * enabled if it is uptodate.
  906. * 2) The port needs to have the same mode (pps / etr).
  907. * 3) The port needs to be usable -> etr_port_valid() == 1
  908. * 4) To enable the second port the clock needs to be in sync.
  909. * 5) If both ports are useable and are ETR ports, the network id
  910. * has to be the same.
  911. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  912. */
  913. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  914. eacr.sl = 0;
  915. eacr.e0 = 1;
  916. if (!etr_mode_is_pps(etr_eacr))
  917. eacr.es = 0;
  918. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  919. eacr.e1 = 0;
  920. // FIXME: uptodate checks ?
  921. else if (etr_port0_uptodate && etr_port1_uptodate)
  922. eacr.e1 = 1;
  923. sync_port = (etr_port0_uptodate &&
  924. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  925. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  926. eacr.sl = 0;
  927. eacr.e0 = 0;
  928. eacr.e1 = 1;
  929. if (!etr_mode_is_pps(etr_eacr))
  930. eacr.es = 0;
  931. sync_port = (etr_port1_uptodate &&
  932. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  933. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  934. eacr.sl = 1;
  935. eacr.e0 = 1;
  936. if (!etr_mode_is_etr(etr_eacr))
  937. eacr.es = 0;
  938. if (!eacr.es || !eacr.p1 ||
  939. aib.esw.psc1 != etr_lpsc_operational_alt)
  940. eacr.e1 = 0;
  941. else if (etr_port0_uptodate && etr_port1_uptodate &&
  942. etr_compare_network(&etr_port0, &etr_port1))
  943. eacr.e1 = 1;
  944. sync_port = (etr_port0_uptodate &&
  945. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  946. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  947. eacr.sl = 1;
  948. eacr.e0 = 0;
  949. eacr.e1 = 1;
  950. if (!etr_mode_is_etr(etr_eacr))
  951. eacr.es = 0;
  952. sync_port = (etr_port1_uptodate &&
  953. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  954. } else {
  955. /* Both ports not usable. */
  956. eacr.es = eacr.sl = 0;
  957. sync_port = -1;
  958. }
  959. /*
  960. * If the clock is in sync just update the eacr and return.
  961. * If there is no valid sync port wait for a port update.
  962. */
  963. if (check_sync_clock() || sync_port < 0) {
  964. etr_update_eacr(eacr);
  965. etr_set_tolec_timeout(now);
  966. goto out_unlock;
  967. }
  968. /*
  969. * Prepare control register for clock syncing
  970. * (reset data port bit, set sync check control.
  971. */
  972. eacr.dp = 0;
  973. eacr.es = 1;
  974. /*
  975. * Update eacr and try to synchronize the clock. If the update
  976. * of eacr caused a stepping port switch (or if we have to
  977. * assume that a stepping port switch has occured) or the
  978. * clock syncing failed, reset the sync check control bit
  979. * and set up a timer to try again after 0.5 seconds
  980. */
  981. etr_update_eacr(eacr);
  982. if (now < etr_tolec + (1600000 << 12) ||
  983. etr_sync_clock_stop(&aib, sync_port) != 0) {
  984. /* Sync failed. Try again in 1/2 second. */
  985. eacr.es = 0;
  986. etr_update_eacr(eacr);
  987. etr_set_sync_timeout();
  988. } else
  989. etr_set_tolec_timeout(now);
  990. out_unlock:
  991. mutex_unlock(&etr_work_mutex);
  992. }
  993. /*
  994. * Sysfs interface functions
  995. */
  996. static struct sysdev_class etr_sysclass = {
  997. .name = "etr",
  998. };
  999. static struct sys_device etr_port0_dev = {
  1000. .id = 0,
  1001. .cls = &etr_sysclass,
  1002. };
  1003. static struct sys_device etr_port1_dev = {
  1004. .id = 1,
  1005. .cls = &etr_sysclass,
  1006. };
  1007. /*
  1008. * ETR class attributes
  1009. */
  1010. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1011. {
  1012. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1013. }
  1014. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1015. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1016. {
  1017. char *mode_str;
  1018. if (etr_mode_is_pps(etr_eacr))
  1019. mode_str = "pps";
  1020. else if (etr_mode_is_etr(etr_eacr))
  1021. mode_str = "etr";
  1022. else
  1023. mode_str = "local";
  1024. return sprintf(buf, "%s\n", mode_str);
  1025. }
  1026. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1027. /*
  1028. * ETR port attributes
  1029. */
  1030. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1031. {
  1032. if (dev == &etr_port0_dev)
  1033. return etr_port0_online ? &etr_port0 : NULL;
  1034. else
  1035. return etr_port1_online ? &etr_port1 : NULL;
  1036. }
  1037. static ssize_t etr_online_show(struct sys_device *dev,
  1038. struct sysdev_attribute *attr,
  1039. char *buf)
  1040. {
  1041. unsigned int online;
  1042. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1043. return sprintf(buf, "%i\n", online);
  1044. }
  1045. static ssize_t etr_online_store(struct sys_device *dev,
  1046. struct sysdev_attribute *attr,
  1047. const char *buf, size_t count)
  1048. {
  1049. unsigned int value;
  1050. value = simple_strtoul(buf, NULL, 0);
  1051. if (value != 0 && value != 1)
  1052. return -EINVAL;
  1053. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1054. return -EOPNOTSUPP;
  1055. mutex_lock(&clock_sync_mutex);
  1056. if (dev == &etr_port0_dev) {
  1057. if (etr_port0_online == value)
  1058. goto out; /* Nothing to do. */
  1059. etr_port0_online = value;
  1060. if (etr_port0_online && etr_port1_online)
  1061. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1062. else
  1063. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1064. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1065. queue_work(time_sync_wq, &etr_work);
  1066. } else {
  1067. if (etr_port1_online == value)
  1068. goto out; /* Nothing to do. */
  1069. etr_port1_online = value;
  1070. if (etr_port0_online && etr_port1_online)
  1071. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1072. else
  1073. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1074. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1075. queue_work(time_sync_wq, &etr_work);
  1076. }
  1077. out:
  1078. mutex_unlock(&clock_sync_mutex);
  1079. return count;
  1080. }
  1081. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1082. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1083. struct sysdev_attribute *attr,
  1084. char *buf)
  1085. {
  1086. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1087. etr_eacr.e0 : etr_eacr.e1);
  1088. }
  1089. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1090. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1091. struct sysdev_attribute *attr, char *buf)
  1092. {
  1093. if (!etr_port0_online && !etr_port1_online)
  1094. /* Status word is not uptodate if both ports are offline. */
  1095. return -ENODATA;
  1096. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1097. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1098. }
  1099. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1100. static ssize_t etr_untuned_show(struct sys_device *dev,
  1101. struct sysdev_attribute *attr, char *buf)
  1102. {
  1103. struct etr_aib *aib = etr_aib_from_dev(dev);
  1104. if (!aib || !aib->slsw.v1)
  1105. return -ENODATA;
  1106. return sprintf(buf, "%i\n", aib->edf1.u);
  1107. }
  1108. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1109. static ssize_t etr_network_id_show(struct sys_device *dev,
  1110. struct sysdev_attribute *attr, char *buf)
  1111. {
  1112. struct etr_aib *aib = etr_aib_from_dev(dev);
  1113. if (!aib || !aib->slsw.v1)
  1114. return -ENODATA;
  1115. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1116. }
  1117. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1118. static ssize_t etr_id_show(struct sys_device *dev,
  1119. struct sysdev_attribute *attr, char *buf)
  1120. {
  1121. struct etr_aib *aib = etr_aib_from_dev(dev);
  1122. if (!aib || !aib->slsw.v1)
  1123. return -ENODATA;
  1124. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1125. }
  1126. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1127. static ssize_t etr_port_number_show(struct sys_device *dev,
  1128. struct sysdev_attribute *attr, char *buf)
  1129. {
  1130. struct etr_aib *aib = etr_aib_from_dev(dev);
  1131. if (!aib || !aib->slsw.v1)
  1132. return -ENODATA;
  1133. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1134. }
  1135. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1136. static ssize_t etr_coupled_show(struct sys_device *dev,
  1137. struct sysdev_attribute *attr, char *buf)
  1138. {
  1139. struct etr_aib *aib = etr_aib_from_dev(dev);
  1140. if (!aib || !aib->slsw.v3)
  1141. return -ENODATA;
  1142. return sprintf(buf, "%i\n", aib->edf3.c);
  1143. }
  1144. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1145. static ssize_t etr_local_time_show(struct sys_device *dev,
  1146. struct sysdev_attribute *attr, char *buf)
  1147. {
  1148. struct etr_aib *aib = etr_aib_from_dev(dev);
  1149. if (!aib || !aib->slsw.v3)
  1150. return -ENODATA;
  1151. return sprintf(buf, "%i\n", aib->edf3.blto);
  1152. }
  1153. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1154. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1155. struct sysdev_attribute *attr, char *buf)
  1156. {
  1157. struct etr_aib *aib = etr_aib_from_dev(dev);
  1158. if (!aib || !aib->slsw.v3)
  1159. return -ENODATA;
  1160. return sprintf(buf, "%i\n", aib->edf3.buo);
  1161. }
  1162. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1163. static struct sysdev_attribute *etr_port_attributes[] = {
  1164. &attr_online,
  1165. &attr_stepping_control,
  1166. &attr_state_code,
  1167. &attr_untuned,
  1168. &attr_network,
  1169. &attr_id,
  1170. &attr_port,
  1171. &attr_coupled,
  1172. &attr_local_time,
  1173. &attr_utc_offset,
  1174. NULL
  1175. };
  1176. static int __init etr_register_port(struct sys_device *dev)
  1177. {
  1178. struct sysdev_attribute **attr;
  1179. int rc;
  1180. rc = sysdev_register(dev);
  1181. if (rc)
  1182. goto out;
  1183. for (attr = etr_port_attributes; *attr; attr++) {
  1184. rc = sysdev_create_file(dev, *attr);
  1185. if (rc)
  1186. goto out_unreg;
  1187. }
  1188. return 0;
  1189. out_unreg:
  1190. for (; attr >= etr_port_attributes; attr--)
  1191. sysdev_remove_file(dev, *attr);
  1192. sysdev_unregister(dev);
  1193. out:
  1194. return rc;
  1195. }
  1196. static void __init etr_unregister_port(struct sys_device *dev)
  1197. {
  1198. struct sysdev_attribute **attr;
  1199. for (attr = etr_port_attributes; *attr; attr++)
  1200. sysdev_remove_file(dev, *attr);
  1201. sysdev_unregister(dev);
  1202. }
  1203. static int __init etr_init_sysfs(void)
  1204. {
  1205. int rc;
  1206. rc = sysdev_class_register(&etr_sysclass);
  1207. if (rc)
  1208. goto out;
  1209. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1210. if (rc)
  1211. goto out_unreg_class;
  1212. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1213. if (rc)
  1214. goto out_remove_stepping_port;
  1215. rc = etr_register_port(&etr_port0_dev);
  1216. if (rc)
  1217. goto out_remove_stepping_mode;
  1218. rc = etr_register_port(&etr_port1_dev);
  1219. if (rc)
  1220. goto out_remove_port0;
  1221. return 0;
  1222. out_remove_port0:
  1223. etr_unregister_port(&etr_port0_dev);
  1224. out_remove_stepping_mode:
  1225. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1226. out_remove_stepping_port:
  1227. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1228. out_unreg_class:
  1229. sysdev_class_unregister(&etr_sysclass);
  1230. out:
  1231. return rc;
  1232. }
  1233. device_initcall(etr_init_sysfs);
  1234. /*
  1235. * Server Time Protocol (STP) code.
  1236. */
  1237. static int stp_online;
  1238. static struct stp_sstpi stp_info;
  1239. static void *stp_page;
  1240. static void stp_work_fn(struct work_struct *work);
  1241. static DEFINE_MUTEX(stp_work_mutex);
  1242. static DECLARE_WORK(stp_work, stp_work_fn);
  1243. static struct timer_list stp_timer;
  1244. static int __init early_parse_stp(char *p)
  1245. {
  1246. if (strncmp(p, "off", 3) == 0)
  1247. stp_online = 0;
  1248. else if (strncmp(p, "on", 2) == 0)
  1249. stp_online = 1;
  1250. return 0;
  1251. }
  1252. early_param("stp", early_parse_stp);
  1253. /*
  1254. * Reset STP attachment.
  1255. */
  1256. static void __init stp_reset(void)
  1257. {
  1258. int rc;
  1259. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1260. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1261. if (rc == 0)
  1262. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1263. else if (stp_online) {
  1264. pr_warning("The real or virtual hardware system does "
  1265. "not provide an STP interface\n");
  1266. free_page((unsigned long) stp_page);
  1267. stp_page = NULL;
  1268. stp_online = 0;
  1269. }
  1270. }
  1271. static void stp_timeout(unsigned long dummy)
  1272. {
  1273. queue_work(time_sync_wq, &stp_work);
  1274. }
  1275. static int __init stp_init(void)
  1276. {
  1277. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1278. return 0;
  1279. setup_timer(&stp_timer, stp_timeout, 0UL);
  1280. time_init_wq();
  1281. if (!stp_online)
  1282. return 0;
  1283. queue_work(time_sync_wq, &stp_work);
  1284. return 0;
  1285. }
  1286. arch_initcall(stp_init);
  1287. /*
  1288. * STP timing alert. There are three causes:
  1289. * 1) timing status change
  1290. * 2) link availability change
  1291. * 3) time control parameter change
  1292. * In all three cases we are only interested in the clock source state.
  1293. * If a STP clock source is now available use it.
  1294. */
  1295. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1296. {
  1297. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1298. queue_work(time_sync_wq, &stp_work);
  1299. }
  1300. /*
  1301. * STP sync check machine check. This is called when the timing state
  1302. * changes from the synchronized state to the unsynchronized state.
  1303. * After a STP sync check the clock is not in sync. The machine check
  1304. * is broadcasted to all cpus at the same time.
  1305. */
  1306. void stp_sync_check(void)
  1307. {
  1308. disable_sync_clock(NULL);
  1309. queue_work(time_sync_wq, &stp_work);
  1310. }
  1311. /*
  1312. * STP island condition machine check. This is called when an attached
  1313. * server attempts to communicate over an STP link and the servers
  1314. * have matching CTN ids and have a valid stratum-1 configuration
  1315. * but the configurations do not match.
  1316. */
  1317. void stp_island_check(void)
  1318. {
  1319. disable_sync_clock(NULL);
  1320. queue_work(time_sync_wq, &stp_work);
  1321. }
  1322. static int stp_sync_clock(void *data)
  1323. {
  1324. static int first;
  1325. unsigned long long old_clock, delta;
  1326. struct clock_sync_data *stp_sync;
  1327. int rc;
  1328. stp_sync = data;
  1329. if (xchg(&first, 1) == 1) {
  1330. /* Slave */
  1331. clock_sync_cpu(stp_sync);
  1332. return 0;
  1333. }
  1334. /* Wait until all other cpus entered the sync function. */
  1335. while (atomic_read(&stp_sync->cpus) != 0)
  1336. cpu_relax();
  1337. enable_sync_clock();
  1338. rc = 0;
  1339. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1340. stp_info.todoff[2] || stp_info.todoff[3] ||
  1341. stp_info.tmd != 2) {
  1342. old_clock = get_clock();
  1343. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1344. if (rc == 0) {
  1345. delta = adjust_time(old_clock, get_clock(), 0);
  1346. fixup_clock_comparator(delta);
  1347. rc = chsc_sstpi(stp_page, &stp_info,
  1348. sizeof(struct stp_sstpi));
  1349. if (rc == 0 && stp_info.tmd != 2)
  1350. rc = -EAGAIN;
  1351. }
  1352. }
  1353. if (rc) {
  1354. disable_sync_clock(NULL);
  1355. stp_sync->in_sync = -EAGAIN;
  1356. } else
  1357. stp_sync->in_sync = 1;
  1358. xchg(&first, 0);
  1359. return 0;
  1360. }
  1361. /*
  1362. * STP work. Check for the STP state and take over the clock
  1363. * synchronization if the STP clock source is usable.
  1364. */
  1365. static void stp_work_fn(struct work_struct *work)
  1366. {
  1367. struct clock_sync_data stp_sync;
  1368. int rc;
  1369. /* prevent multiple execution. */
  1370. mutex_lock(&stp_work_mutex);
  1371. if (!stp_online) {
  1372. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1373. del_timer_sync(&stp_timer);
  1374. goto out_unlock;
  1375. }
  1376. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1377. if (rc)
  1378. goto out_unlock;
  1379. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1380. if (rc || stp_info.c == 0)
  1381. goto out_unlock;
  1382. /* Skip synchronization if the clock is already in sync. */
  1383. if (check_sync_clock())
  1384. goto out_unlock;
  1385. memset(&stp_sync, 0, sizeof(stp_sync));
  1386. get_online_cpus();
  1387. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1388. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1389. put_online_cpus();
  1390. if (!check_sync_clock())
  1391. /*
  1392. * There is a usable clock but the synchonization failed.
  1393. * Retry after a second.
  1394. */
  1395. mod_timer(&stp_timer, jiffies + HZ);
  1396. out_unlock:
  1397. mutex_unlock(&stp_work_mutex);
  1398. }
  1399. /*
  1400. * STP class sysfs interface functions
  1401. */
  1402. static struct sysdev_class stp_sysclass = {
  1403. .name = "stp",
  1404. };
  1405. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1406. {
  1407. if (!stp_online)
  1408. return -ENODATA;
  1409. return sprintf(buf, "%016llx\n",
  1410. *(unsigned long long *) stp_info.ctnid);
  1411. }
  1412. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1413. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1414. {
  1415. if (!stp_online)
  1416. return -ENODATA;
  1417. return sprintf(buf, "%i\n", stp_info.ctn);
  1418. }
  1419. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1420. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1421. {
  1422. if (!stp_online || !(stp_info.vbits & 0x2000))
  1423. return -ENODATA;
  1424. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1425. }
  1426. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1427. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1428. {
  1429. if (!stp_online || !(stp_info.vbits & 0x8000))
  1430. return -ENODATA;
  1431. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1432. }
  1433. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1434. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1435. {
  1436. if (!stp_online)
  1437. return -ENODATA;
  1438. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1439. }
  1440. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1441. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1442. {
  1443. if (!stp_online || !(stp_info.vbits & 0x0800))
  1444. return -ENODATA;
  1445. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1446. }
  1447. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1448. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1449. {
  1450. if (!stp_online || !(stp_info.vbits & 0x4000))
  1451. return -ENODATA;
  1452. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1453. }
  1454. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1455. stp_time_zone_offset_show, NULL);
  1456. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1457. {
  1458. if (!stp_online)
  1459. return -ENODATA;
  1460. return sprintf(buf, "%i\n", stp_info.tmd);
  1461. }
  1462. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1463. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1464. {
  1465. if (!stp_online)
  1466. return -ENODATA;
  1467. return sprintf(buf, "%i\n", stp_info.tst);
  1468. }
  1469. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1470. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1471. {
  1472. return sprintf(buf, "%i\n", stp_online);
  1473. }
  1474. static ssize_t stp_online_store(struct sysdev_class *class,
  1475. const char *buf, size_t count)
  1476. {
  1477. unsigned int value;
  1478. value = simple_strtoul(buf, NULL, 0);
  1479. if (value != 0 && value != 1)
  1480. return -EINVAL;
  1481. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1482. return -EOPNOTSUPP;
  1483. mutex_lock(&clock_sync_mutex);
  1484. stp_online = value;
  1485. if (stp_online)
  1486. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1487. else
  1488. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1489. queue_work(time_sync_wq, &stp_work);
  1490. mutex_unlock(&clock_sync_mutex);
  1491. return count;
  1492. }
  1493. /*
  1494. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1495. * stp/online but attr_online already exists in this file ..
  1496. */
  1497. static struct sysdev_class_attribute attr_stp_online = {
  1498. .attr = { .name = "online", .mode = 0600 },
  1499. .show = stp_online_show,
  1500. .store = stp_online_store,
  1501. };
  1502. static struct sysdev_class_attribute *stp_attributes[] = {
  1503. &attr_ctn_id,
  1504. &attr_ctn_type,
  1505. &attr_dst_offset,
  1506. &attr_leap_seconds,
  1507. &attr_stp_online,
  1508. &attr_stratum,
  1509. &attr_time_offset,
  1510. &attr_time_zone_offset,
  1511. &attr_timing_mode,
  1512. &attr_timing_state,
  1513. NULL
  1514. };
  1515. static int __init stp_init_sysfs(void)
  1516. {
  1517. struct sysdev_class_attribute **attr;
  1518. int rc;
  1519. rc = sysdev_class_register(&stp_sysclass);
  1520. if (rc)
  1521. goto out;
  1522. for (attr = stp_attributes; *attr; attr++) {
  1523. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1524. if (rc)
  1525. goto out_unreg;
  1526. }
  1527. return 0;
  1528. out_unreg:
  1529. for (; attr >= stp_attributes; attr--)
  1530. sysdev_class_remove_file(&stp_sysclass, *attr);
  1531. sysdev_class_unregister(&stp_sysclass);
  1532. out:
  1533. return rc;
  1534. }
  1535. device_initcall(stp_init_sysfs);