cpufreq_32.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/pmu.h>
  23. #include <linux/slab.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/init.h>
  26. #include <linux/sysdev.h>
  27. #include <linux/hardirq.h>
  28. #include <asm/prom.h>
  29. #include <asm/machdep.h>
  30. #include <asm/irq.h>
  31. #include <asm/pmac_feature.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/sections.h>
  34. #include <asm/cputable.h>
  35. #include <asm/time.h>
  36. #include <asm/system.h>
  37. #include <asm/mpic.h>
  38. #include <asm/keylargo.h>
  39. /* WARNING !!! This will cause calibrate_delay() to be called,
  40. * but this is an __init function ! So you MUST go edit
  41. * init/main.c to make it non-init before enabling DEBUG_FREQ
  42. */
  43. #undef DEBUG_FREQ
  44. extern void low_choose_7447a_dfs(int dfs);
  45. extern void low_choose_750fx_pll(int pll);
  46. extern void low_sleep_handler(void);
  47. /*
  48. * Currently, PowerMac cpufreq supports only high & low frequencies
  49. * that are set by the firmware
  50. */
  51. static unsigned int low_freq;
  52. static unsigned int hi_freq;
  53. static unsigned int cur_freq;
  54. static unsigned int sleep_freq;
  55. /*
  56. * Different models uses different mechanisms to switch the frequency
  57. */
  58. static int (*set_speed_proc)(int low_speed);
  59. static unsigned int (*get_speed_proc)(void);
  60. /*
  61. * Some definitions used by the various speedprocs
  62. */
  63. static u32 voltage_gpio;
  64. static u32 frequency_gpio;
  65. static u32 slew_done_gpio;
  66. static int no_schedule;
  67. static int has_cpu_l2lve;
  68. static int is_pmu_based;
  69. /* There are only two frequency states for each processor. Values
  70. * are in kHz for the time being.
  71. */
  72. #define CPUFREQ_HIGH 0
  73. #define CPUFREQ_LOW 1
  74. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  75. {CPUFREQ_HIGH, 0},
  76. {CPUFREQ_LOW, 0},
  77. {0, CPUFREQ_TABLE_END},
  78. };
  79. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  80. &cpufreq_freq_attr_scaling_available_freqs,
  81. NULL,
  82. };
  83. static inline void local_delay(unsigned long ms)
  84. {
  85. if (no_schedule)
  86. mdelay(ms);
  87. else
  88. msleep(ms);
  89. }
  90. #ifdef DEBUG_FREQ
  91. static inline void debug_calc_bogomips(void)
  92. {
  93. /* This will cause a recalc of bogomips and display the
  94. * result. We backup/restore the value to avoid affecting the
  95. * core cpufreq framework's own calculation.
  96. */
  97. unsigned long save_lpj = loops_per_jiffy;
  98. calibrate_delay();
  99. loops_per_jiffy = save_lpj;
  100. }
  101. #endif /* DEBUG_FREQ */
  102. /* Switch CPU speed under 750FX CPU control
  103. */
  104. static int cpu_750fx_cpu_speed(int low_speed)
  105. {
  106. u32 hid2;
  107. if (low_speed == 0) {
  108. /* ramping up, set voltage first */
  109. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  110. /* Make sure we sleep for at least 1ms */
  111. local_delay(10);
  112. /* tweak L2 for high voltage */
  113. if (has_cpu_l2lve) {
  114. hid2 = mfspr(SPRN_HID2);
  115. hid2 &= ~0x2000;
  116. mtspr(SPRN_HID2, hid2);
  117. }
  118. }
  119. #ifdef CONFIG_6xx
  120. low_choose_750fx_pll(low_speed);
  121. #endif
  122. if (low_speed == 1) {
  123. /* tweak L2 for low voltage */
  124. if (has_cpu_l2lve) {
  125. hid2 = mfspr(SPRN_HID2);
  126. hid2 |= 0x2000;
  127. mtspr(SPRN_HID2, hid2);
  128. }
  129. /* ramping down, set voltage last */
  130. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  131. local_delay(10);
  132. }
  133. return 0;
  134. }
  135. static unsigned int cpu_750fx_get_cpu_speed(void)
  136. {
  137. if (mfspr(SPRN_HID1) & HID1_PS)
  138. return low_freq;
  139. else
  140. return hi_freq;
  141. }
  142. /* Switch CPU speed using DFS */
  143. static int dfs_set_cpu_speed(int low_speed)
  144. {
  145. if (low_speed == 0) {
  146. /* ramping up, set voltage first */
  147. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  148. /* Make sure we sleep for at least 1ms */
  149. local_delay(1);
  150. }
  151. /* set frequency */
  152. #ifdef CONFIG_6xx
  153. low_choose_7447a_dfs(low_speed);
  154. #endif
  155. udelay(100);
  156. if (low_speed == 1) {
  157. /* ramping down, set voltage last */
  158. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  159. local_delay(1);
  160. }
  161. return 0;
  162. }
  163. static unsigned int dfs_get_cpu_speed(void)
  164. {
  165. if (mfspr(SPRN_HID1) & HID1_DFS)
  166. return low_freq;
  167. else
  168. return hi_freq;
  169. }
  170. /* Switch CPU speed using slewing GPIOs
  171. */
  172. static int gpios_set_cpu_speed(int low_speed)
  173. {
  174. int gpio, timeout = 0;
  175. /* If ramping up, set voltage first */
  176. if (low_speed == 0) {
  177. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  178. /* Delay is way too big but it's ok, we schedule */
  179. local_delay(10);
  180. }
  181. /* Set frequency */
  182. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  183. if (low_speed == ((gpio & 0x01) == 0))
  184. goto skip;
  185. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  186. low_speed ? 0x04 : 0x05);
  187. udelay(200);
  188. do {
  189. if (++timeout > 100)
  190. break;
  191. local_delay(1);
  192. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  193. } while((gpio & 0x02) == 0);
  194. skip:
  195. /* If ramping down, set voltage last */
  196. if (low_speed == 1) {
  197. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  198. /* Delay is way too big but it's ok, we schedule */
  199. local_delay(10);
  200. }
  201. #ifdef DEBUG_FREQ
  202. debug_calc_bogomips();
  203. #endif
  204. return 0;
  205. }
  206. /* Switch CPU speed under PMU control
  207. */
  208. static int pmu_set_cpu_speed(int low_speed)
  209. {
  210. struct adb_request req;
  211. unsigned long save_l2cr;
  212. unsigned long save_l3cr;
  213. unsigned int pic_prio;
  214. unsigned long flags;
  215. preempt_disable();
  216. #ifdef DEBUG_FREQ
  217. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  218. #endif
  219. pmu_suspend();
  220. /* Disable all interrupt sources on openpic */
  221. pic_prio = mpic_cpu_get_priority();
  222. mpic_cpu_set_priority(0xf);
  223. /* Make sure the decrementer won't interrupt us */
  224. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  225. /* Make sure any pending DEC interrupt occurring while we did
  226. * the above didn't re-enable the DEC */
  227. mb();
  228. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  229. /* We can now disable MSR_EE */
  230. local_irq_save(flags);
  231. /* Giveup the FPU & vec */
  232. enable_kernel_fp();
  233. #ifdef CONFIG_ALTIVEC
  234. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  235. enable_kernel_altivec();
  236. #endif /* CONFIG_ALTIVEC */
  237. /* Save & disable L2 and L3 caches */
  238. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  239. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  240. /* Send the new speed command. My assumption is that this command
  241. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  242. */
  243. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  244. while (!req.complete)
  245. pmu_poll();
  246. /* Prepare the northbridge for the speed transition */
  247. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  248. /* Call low level code to backup CPU state and recover from
  249. * hardware reset
  250. */
  251. low_sleep_handler();
  252. /* Restore the northbridge */
  253. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  254. /* Restore L2 cache */
  255. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  256. _set_L2CR(save_l2cr);
  257. /* Restore L3 cache */
  258. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  259. _set_L3CR(save_l3cr);
  260. /* Restore userland MMU context */
  261. switch_mmu_context(NULL, current->active_mm);
  262. #ifdef DEBUG_FREQ
  263. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  264. #endif
  265. /* Restore low level PMU operations */
  266. pmu_unlock();
  267. /* Restore decrementer */
  268. wakeup_decrementer();
  269. /* Restore interrupts */
  270. mpic_cpu_set_priority(pic_prio);
  271. /* Let interrupts flow again ... */
  272. local_irq_restore(flags);
  273. #ifdef DEBUG_FREQ
  274. debug_calc_bogomips();
  275. #endif
  276. pmu_resume();
  277. preempt_enable();
  278. return 0;
  279. }
  280. static int do_set_cpu_speed(int speed_mode, int notify)
  281. {
  282. struct cpufreq_freqs freqs;
  283. unsigned long l3cr;
  284. static unsigned long prev_l3cr;
  285. freqs.old = cur_freq;
  286. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  287. freqs.cpu = smp_processor_id();
  288. if (freqs.old == freqs.new)
  289. return 0;
  290. if (notify)
  291. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  292. if (speed_mode == CPUFREQ_LOW &&
  293. cpu_has_feature(CPU_FTR_L3CR)) {
  294. l3cr = _get_L3CR();
  295. if (l3cr & L3CR_L3E) {
  296. prev_l3cr = l3cr;
  297. _set_L3CR(0);
  298. }
  299. }
  300. set_speed_proc(speed_mode == CPUFREQ_LOW);
  301. if (speed_mode == CPUFREQ_HIGH &&
  302. cpu_has_feature(CPU_FTR_L3CR)) {
  303. l3cr = _get_L3CR();
  304. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  305. _set_L3CR(prev_l3cr);
  306. }
  307. if (notify)
  308. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  309. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  310. return 0;
  311. }
  312. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  313. {
  314. return cur_freq;
  315. }
  316. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  317. {
  318. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  319. }
  320. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  321. unsigned int target_freq,
  322. unsigned int relation)
  323. {
  324. unsigned int newstate = 0;
  325. int rc;
  326. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  327. target_freq, relation, &newstate))
  328. return -EINVAL;
  329. rc = do_set_cpu_speed(newstate, 1);
  330. ppc_proc_freq = cur_freq * 1000ul;
  331. return rc;
  332. }
  333. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  334. {
  335. if (policy->cpu != 0)
  336. return -ENODEV;
  337. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  338. policy->cur = cur_freq;
  339. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  340. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  341. }
  342. static u32 read_gpio(struct device_node *np)
  343. {
  344. const u32 *reg = of_get_property(np, "reg", NULL);
  345. u32 offset;
  346. if (reg == NULL)
  347. return 0;
  348. /* That works for all keylargos but shall be fixed properly
  349. * some day... The problem is that it seems we can't rely
  350. * on the "reg" property of the GPIO nodes, they are either
  351. * relative to the base of KeyLargo or to the base of the
  352. * GPIO space, and the device-tree doesn't help.
  353. */
  354. offset = *reg;
  355. if (offset < KEYLARGO_GPIO_LEVELS0)
  356. offset += KEYLARGO_GPIO_LEVELS0;
  357. return offset;
  358. }
  359. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  360. {
  361. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  362. * always force a speed change to high speed before sleep, to make sure
  363. * we have appropriate voltage and/or bus speed for the wakeup process,
  364. * and to make sure our loops_per_jiffies are "good enough", that is will
  365. * not cause too short delays if we sleep in low speed and wake in high
  366. * speed..
  367. */
  368. no_schedule = 1;
  369. sleep_freq = cur_freq;
  370. if (cur_freq == low_freq && !is_pmu_based)
  371. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  372. return 0;
  373. }
  374. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  375. {
  376. /* If we resume, first check if we have a get() function */
  377. if (get_speed_proc)
  378. cur_freq = get_speed_proc();
  379. else
  380. cur_freq = 0;
  381. /* We don't, hrm... we don't really know our speed here, best
  382. * is that we force a switch to whatever it was, which is
  383. * probably high speed due to our suspend() routine
  384. */
  385. do_set_cpu_speed(sleep_freq == low_freq ?
  386. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  387. ppc_proc_freq = cur_freq * 1000ul;
  388. no_schedule = 0;
  389. return 0;
  390. }
  391. static struct cpufreq_driver pmac_cpufreq_driver = {
  392. .verify = pmac_cpufreq_verify,
  393. .target = pmac_cpufreq_target,
  394. .get = pmac_cpufreq_get_speed,
  395. .init = pmac_cpufreq_cpu_init,
  396. .suspend = pmac_cpufreq_suspend,
  397. .resume = pmac_cpufreq_resume,
  398. .flags = CPUFREQ_PM_NO_WARN,
  399. .attr = pmac_cpu_freqs_attr,
  400. .name = "powermac",
  401. .owner = THIS_MODULE,
  402. };
  403. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  404. {
  405. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  406. "voltage-gpio");
  407. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  408. "frequency-gpio");
  409. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  410. "slewing-done");
  411. const u32 *value;
  412. /*
  413. * Check to see if it's GPIO driven or PMU only
  414. *
  415. * The way we extract the GPIO address is slightly hackish, but it
  416. * works well enough for now. We need to abstract the whole GPIO
  417. * stuff sooner or later anyway
  418. */
  419. if (volt_gpio_np)
  420. voltage_gpio = read_gpio(volt_gpio_np);
  421. if (freq_gpio_np)
  422. frequency_gpio = read_gpio(freq_gpio_np);
  423. if (slew_done_gpio_np)
  424. slew_done_gpio = read_gpio(slew_done_gpio_np);
  425. /* If we use the frequency GPIOs, calculate the min/max speeds based
  426. * on the bus frequencies
  427. */
  428. if (frequency_gpio && slew_done_gpio) {
  429. int lenp, rc;
  430. const u32 *freqs, *ratio;
  431. freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
  432. lenp /= sizeof(u32);
  433. if (freqs == NULL || lenp != 2) {
  434. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  435. return 1;
  436. }
  437. ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
  438. NULL);
  439. if (ratio == NULL) {
  440. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  441. return 1;
  442. }
  443. /* Get the min/max bus frequencies */
  444. low_freq = min(freqs[0], freqs[1]);
  445. hi_freq = max(freqs[0], freqs[1]);
  446. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  447. * frequency, it claims it to be around 84Mhz on some models while
  448. * it appears to be approx. 101Mhz on all. Let's hack around here...
  449. * fortunately, we don't need to be too precise
  450. */
  451. if (low_freq < 98000000)
  452. low_freq = 101000000;
  453. /* Convert those to CPU core clocks */
  454. low_freq = (low_freq * (*ratio)) / 2000;
  455. hi_freq = (hi_freq * (*ratio)) / 2000;
  456. /* Now we get the frequencies, we read the GPIO to see what is out current
  457. * speed
  458. */
  459. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  460. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  461. set_speed_proc = gpios_set_cpu_speed;
  462. return 1;
  463. }
  464. /* If we use the PMU, look for the min & max frequencies in the
  465. * device-tree
  466. */
  467. value = of_get_property(cpunode, "min-clock-frequency", NULL);
  468. if (!value)
  469. return 1;
  470. low_freq = (*value) / 1000;
  471. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  472. * here */
  473. if (low_freq < 100000)
  474. low_freq *= 10;
  475. value = of_get_property(cpunode, "max-clock-frequency", NULL);
  476. if (!value)
  477. return 1;
  478. hi_freq = (*value) / 1000;
  479. set_speed_proc = pmu_set_cpu_speed;
  480. is_pmu_based = 1;
  481. return 0;
  482. }
  483. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  484. {
  485. struct device_node *volt_gpio_np;
  486. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  487. return 1;
  488. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  489. if (volt_gpio_np)
  490. voltage_gpio = read_gpio(volt_gpio_np);
  491. if (!voltage_gpio){
  492. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  493. return 1;
  494. }
  495. /* OF only reports the high frequency */
  496. hi_freq = cur_freq;
  497. low_freq = cur_freq/2;
  498. /* Read actual frequency from CPU */
  499. cur_freq = dfs_get_cpu_speed();
  500. set_speed_proc = dfs_set_cpu_speed;
  501. get_speed_proc = dfs_get_cpu_speed;
  502. return 0;
  503. }
  504. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  505. {
  506. struct device_node *volt_gpio_np;
  507. u32 pvr;
  508. const u32 *value;
  509. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  510. return 1;
  511. hi_freq = cur_freq;
  512. value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
  513. if (!value)
  514. return 1;
  515. low_freq = (*value) / 1000;
  516. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  517. if (volt_gpio_np)
  518. voltage_gpio = read_gpio(volt_gpio_np);
  519. pvr = mfspr(SPRN_PVR);
  520. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  521. set_speed_proc = cpu_750fx_cpu_speed;
  522. get_speed_proc = cpu_750fx_get_cpu_speed;
  523. cur_freq = cpu_750fx_get_cpu_speed();
  524. return 0;
  525. }
  526. /* Currently, we support the following machines:
  527. *
  528. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  529. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  530. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  531. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  532. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  533. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  534. * - Recent MacRISC3 laptops
  535. * - All new machines with 7447A CPUs
  536. */
  537. static int __init pmac_cpufreq_setup(void)
  538. {
  539. struct device_node *cpunode;
  540. const u32 *value;
  541. if (strstr(cmd_line, "nocpufreq"))
  542. return 0;
  543. /* Assume only one CPU */
  544. cpunode = of_find_node_by_type(NULL, "cpu");
  545. if (!cpunode)
  546. goto out;
  547. /* Get current cpu clock freq */
  548. value = of_get_property(cpunode, "clock-frequency", NULL);
  549. if (!value)
  550. goto out;
  551. cur_freq = (*value) / 1000;
  552. /* Check for 7447A based MacRISC3 */
  553. if (machine_is_compatible("MacRISC3") &&
  554. of_get_property(cpunode, "dynamic-power-step", NULL) &&
  555. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  556. pmac_cpufreq_init_7447A(cpunode);
  557. /* Check for other MacRISC3 machines */
  558. } else if (machine_is_compatible("PowerBook3,4") ||
  559. machine_is_compatible("PowerBook3,5") ||
  560. machine_is_compatible("MacRISC3")) {
  561. pmac_cpufreq_init_MacRISC3(cpunode);
  562. /* Else check for iBook2 500/600 */
  563. } else if (machine_is_compatible("PowerBook4,1")) {
  564. hi_freq = cur_freq;
  565. low_freq = 400000;
  566. set_speed_proc = pmu_set_cpu_speed;
  567. is_pmu_based = 1;
  568. }
  569. /* Else check for TiPb 550 */
  570. else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  571. hi_freq = cur_freq;
  572. low_freq = 500000;
  573. set_speed_proc = pmu_set_cpu_speed;
  574. is_pmu_based = 1;
  575. }
  576. /* Else check for TiPb 400 & 500 */
  577. else if (machine_is_compatible("PowerBook3,2")) {
  578. /* We only know about the 400 MHz and the 500Mhz model
  579. * they both have 300 MHz as low frequency
  580. */
  581. if (cur_freq < 350000 || cur_freq > 550000)
  582. goto out;
  583. hi_freq = cur_freq;
  584. low_freq = 300000;
  585. set_speed_proc = pmu_set_cpu_speed;
  586. is_pmu_based = 1;
  587. }
  588. /* Else check for 750FX */
  589. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  590. pmac_cpufreq_init_750FX(cpunode);
  591. out:
  592. of_node_put(cpunode);
  593. if (set_speed_proc == NULL)
  594. return -ENODEV;
  595. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  596. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  597. ppc_proc_freq = cur_freq * 1000ul;
  598. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  599. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  600. low_freq/1000, hi_freq/1000, cur_freq/1000);
  601. return cpufreq_register_driver(&pmac_cpufreq_driver);
  602. }
  603. module_init(pmac_cpufreq_setup);