hugetlbpage.c 20 KB

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  1. /*
  2. * PPC64 (POWER4) Huge TLB Page Support for Kernel.
  3. *
  4. * Copyright (C) 2003 David Gibson, IBM Corporation.
  5. *
  6. * Based on the IA-32 version:
  7. * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/fs.h>
  11. #include <linux/mm.h>
  12. #include <linux/hugetlb.h>
  13. #include <linux/pagemap.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/sysctl.h>
  17. #include <asm/mman.h>
  18. #include <asm/pgalloc.h>
  19. #include <asm/tlb.h>
  20. #include <asm/tlbflush.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/machdep.h>
  23. #include <asm/cputable.h>
  24. #include <asm/spu.h>
  25. #define PAGE_SHIFT_64K 16
  26. #define PAGE_SHIFT_16M 24
  27. #define PAGE_SHIFT_16G 34
  28. #define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
  29. #define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
  30. #define MAX_NUMBER_GPAGES 1024
  31. /* Tracks the 16G pages after the device tree is scanned and before the
  32. * huge_boot_pages list is ready. */
  33. static unsigned long gpage_freearray[MAX_NUMBER_GPAGES];
  34. static unsigned nr_gpages;
  35. /* Array of valid huge page sizes - non-zero value(hugepte_shift) is
  36. * stored for the huge page sizes that are valid.
  37. */
  38. unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
  39. #define hugepte_shift mmu_huge_psizes
  40. #define PTRS_PER_HUGEPTE(psize) (1 << hugepte_shift[psize])
  41. #define HUGEPTE_TABLE_SIZE(psize) (sizeof(pte_t) << hugepte_shift[psize])
  42. #define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \
  43. + hugepte_shift[psize])
  44. #define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize))
  45. #define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1))
  46. /* Subtract one from array size because we don't need a cache for 4K since
  47. * is not a huge page size */
  48. #define HUGE_PGTABLE_INDEX(psize) (HUGEPTE_CACHE_NUM + psize - 1)
  49. #define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize])
  50. static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = {
  51. [MMU_PAGE_64K] = "hugepte_cache_64K",
  52. [MMU_PAGE_1M] = "hugepte_cache_1M",
  53. [MMU_PAGE_16M] = "hugepte_cache_16M",
  54. [MMU_PAGE_16G] = "hugepte_cache_16G",
  55. };
  56. /* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad()
  57. * will choke on pointers to hugepte tables, which is handy for
  58. * catching screwups early. */
  59. #define HUGEPD_OK 0x1
  60. typedef struct { unsigned long pd; } hugepd_t;
  61. #define hugepd_none(hpd) ((hpd).pd == 0)
  62. static inline int shift_to_mmu_psize(unsigned int shift)
  63. {
  64. switch (shift) {
  65. #ifndef CONFIG_PPC_64K_PAGES
  66. case PAGE_SHIFT_64K:
  67. return MMU_PAGE_64K;
  68. #endif
  69. case PAGE_SHIFT_16M:
  70. return MMU_PAGE_16M;
  71. case PAGE_SHIFT_16G:
  72. return MMU_PAGE_16G;
  73. }
  74. return -1;
  75. }
  76. static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
  77. {
  78. if (mmu_psize_defs[mmu_psize].shift)
  79. return mmu_psize_defs[mmu_psize].shift;
  80. BUG();
  81. }
  82. static inline pte_t *hugepd_page(hugepd_t hpd)
  83. {
  84. BUG_ON(!(hpd.pd & HUGEPD_OK));
  85. return (pte_t *)(hpd.pd & ~HUGEPD_OK);
  86. }
  87. static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
  88. struct hstate *hstate)
  89. {
  90. unsigned int shift = huge_page_shift(hstate);
  91. int psize = shift_to_mmu_psize(shift);
  92. unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1));
  93. pte_t *dir = hugepd_page(*hpdp);
  94. return dir + idx;
  95. }
  96. static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
  97. unsigned long address, unsigned int psize)
  98. {
  99. pte_t *new = kmem_cache_zalloc(pgtable_cache[HUGE_PGTABLE_INDEX(psize)],
  100. GFP_KERNEL|__GFP_REPEAT);
  101. if (! new)
  102. return -ENOMEM;
  103. spin_lock(&mm->page_table_lock);
  104. if (!hugepd_none(*hpdp))
  105. kmem_cache_free(pgtable_cache[HUGE_PGTABLE_INDEX(psize)], new);
  106. else
  107. hpdp->pd = (unsigned long)new | HUGEPD_OK;
  108. spin_unlock(&mm->page_table_lock);
  109. return 0;
  110. }
  111. static pud_t *hpud_offset(pgd_t *pgd, unsigned long addr, struct hstate *hstate)
  112. {
  113. if (huge_page_shift(hstate) < PUD_SHIFT)
  114. return pud_offset(pgd, addr);
  115. else
  116. return (pud_t *) pgd;
  117. }
  118. static pud_t *hpud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long addr,
  119. struct hstate *hstate)
  120. {
  121. if (huge_page_shift(hstate) < PUD_SHIFT)
  122. return pud_alloc(mm, pgd, addr);
  123. else
  124. return (pud_t *) pgd;
  125. }
  126. static pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate)
  127. {
  128. if (huge_page_shift(hstate) < PMD_SHIFT)
  129. return pmd_offset(pud, addr);
  130. else
  131. return (pmd_t *) pud;
  132. }
  133. static pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr,
  134. struct hstate *hstate)
  135. {
  136. if (huge_page_shift(hstate) < PMD_SHIFT)
  137. return pmd_alloc(mm, pud, addr);
  138. else
  139. return (pmd_t *) pud;
  140. }
  141. /* Build list of addresses of gigantic pages. This function is used in early
  142. * boot before the buddy or bootmem allocator is setup.
  143. */
  144. void add_gpage(unsigned long addr, unsigned long page_size,
  145. unsigned long number_of_pages)
  146. {
  147. if (!addr)
  148. return;
  149. while (number_of_pages > 0) {
  150. gpage_freearray[nr_gpages] = addr;
  151. nr_gpages++;
  152. number_of_pages--;
  153. addr += page_size;
  154. }
  155. }
  156. /* Moves the gigantic page addresses from the temporary list to the
  157. * huge_boot_pages list.
  158. */
  159. int alloc_bootmem_huge_page(struct hstate *hstate)
  160. {
  161. struct huge_bootmem_page *m;
  162. if (nr_gpages == 0)
  163. return 0;
  164. m = phys_to_virt(gpage_freearray[--nr_gpages]);
  165. gpage_freearray[nr_gpages] = 0;
  166. list_add(&m->list, &huge_boot_pages);
  167. m->hstate = hstate;
  168. return 1;
  169. }
  170. /* Modelled after find_linux_pte() */
  171. pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
  172. {
  173. pgd_t *pg;
  174. pud_t *pu;
  175. pmd_t *pm;
  176. unsigned int psize;
  177. unsigned int shift;
  178. unsigned long sz;
  179. struct hstate *hstate;
  180. psize = get_slice_psize(mm, addr);
  181. shift = mmu_psize_to_shift(psize);
  182. sz = ((1UL) << shift);
  183. hstate = size_to_hstate(sz);
  184. addr &= hstate->mask;
  185. pg = pgd_offset(mm, addr);
  186. if (!pgd_none(*pg)) {
  187. pu = hpud_offset(pg, addr, hstate);
  188. if (!pud_none(*pu)) {
  189. pm = hpmd_offset(pu, addr, hstate);
  190. if (!pmd_none(*pm))
  191. return hugepte_offset((hugepd_t *)pm, addr,
  192. hstate);
  193. }
  194. }
  195. return NULL;
  196. }
  197. pte_t *huge_pte_alloc(struct mm_struct *mm,
  198. unsigned long addr, unsigned long sz)
  199. {
  200. pgd_t *pg;
  201. pud_t *pu;
  202. pmd_t *pm;
  203. hugepd_t *hpdp = NULL;
  204. struct hstate *hstate;
  205. unsigned int psize;
  206. hstate = size_to_hstate(sz);
  207. psize = get_slice_psize(mm, addr);
  208. BUG_ON(!mmu_huge_psizes[psize]);
  209. addr &= hstate->mask;
  210. pg = pgd_offset(mm, addr);
  211. pu = hpud_alloc(mm, pg, addr, hstate);
  212. if (pu) {
  213. pm = hpmd_alloc(mm, pu, addr, hstate);
  214. if (pm)
  215. hpdp = (hugepd_t *)pm;
  216. }
  217. if (! hpdp)
  218. return NULL;
  219. if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, psize))
  220. return NULL;
  221. return hugepte_offset(hpdp, addr, hstate);
  222. }
  223. int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
  224. {
  225. return 0;
  226. }
  227. static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp,
  228. unsigned int psize)
  229. {
  230. pte_t *hugepte = hugepd_page(*hpdp);
  231. hpdp->pd = 0;
  232. tlb->need_flush = 1;
  233. pgtable_free_tlb(tlb, pgtable_free_cache(hugepte,
  234. HUGEPTE_CACHE_NUM+psize-1,
  235. PGF_CACHENUM_MASK));
  236. }
  237. static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
  238. unsigned long addr, unsigned long end,
  239. unsigned long floor, unsigned long ceiling,
  240. unsigned int psize)
  241. {
  242. pmd_t *pmd;
  243. unsigned long next;
  244. unsigned long start;
  245. start = addr;
  246. pmd = pmd_offset(pud, addr);
  247. do {
  248. next = pmd_addr_end(addr, end);
  249. if (pmd_none(*pmd))
  250. continue;
  251. free_hugepte_range(tlb, (hugepd_t *)pmd, psize);
  252. } while (pmd++, addr = next, addr != end);
  253. start &= PUD_MASK;
  254. if (start < floor)
  255. return;
  256. if (ceiling) {
  257. ceiling &= PUD_MASK;
  258. if (!ceiling)
  259. return;
  260. }
  261. if (end - 1 > ceiling - 1)
  262. return;
  263. pmd = pmd_offset(pud, start);
  264. pud_clear(pud);
  265. pmd_free_tlb(tlb, pmd, start);
  266. }
  267. static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
  268. unsigned long addr, unsigned long end,
  269. unsigned long floor, unsigned long ceiling)
  270. {
  271. pud_t *pud;
  272. unsigned long next;
  273. unsigned long start;
  274. unsigned int shift;
  275. unsigned int psize = get_slice_psize(tlb->mm, addr);
  276. shift = mmu_psize_to_shift(psize);
  277. start = addr;
  278. pud = pud_offset(pgd, addr);
  279. do {
  280. next = pud_addr_end(addr, end);
  281. if (shift < PMD_SHIFT) {
  282. if (pud_none_or_clear_bad(pud))
  283. continue;
  284. hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
  285. ceiling, psize);
  286. } else {
  287. if (pud_none(*pud))
  288. continue;
  289. free_hugepte_range(tlb, (hugepd_t *)pud, psize);
  290. }
  291. } while (pud++, addr = next, addr != end);
  292. start &= PGDIR_MASK;
  293. if (start < floor)
  294. return;
  295. if (ceiling) {
  296. ceiling &= PGDIR_MASK;
  297. if (!ceiling)
  298. return;
  299. }
  300. if (end - 1 > ceiling - 1)
  301. return;
  302. pud = pud_offset(pgd, start);
  303. pgd_clear(pgd);
  304. pud_free_tlb(tlb, pud, start);
  305. }
  306. /*
  307. * This function frees user-level page tables of a process.
  308. *
  309. * Must be called with pagetable lock held.
  310. */
  311. void hugetlb_free_pgd_range(struct mmu_gather *tlb,
  312. unsigned long addr, unsigned long end,
  313. unsigned long floor, unsigned long ceiling)
  314. {
  315. pgd_t *pgd;
  316. unsigned long next;
  317. unsigned long start;
  318. /*
  319. * Comments below take from the normal free_pgd_range(). They
  320. * apply here too. The tests against HUGEPD_MASK below are
  321. * essential, because we *don't* test for this at the bottom
  322. * level. Without them we'll attempt to free a hugepte table
  323. * when we unmap just part of it, even if there are other
  324. * active mappings using it.
  325. *
  326. * The next few lines have given us lots of grief...
  327. *
  328. * Why are we testing HUGEPD* at this top level? Because
  329. * often there will be no work to do at all, and we'd prefer
  330. * not to go all the way down to the bottom just to discover
  331. * that.
  332. *
  333. * Why all these "- 1"s? Because 0 represents both the bottom
  334. * of the address space and the top of it (using -1 for the
  335. * top wouldn't help much: the masks would do the wrong thing).
  336. * The rule is that addr 0 and floor 0 refer to the bottom of
  337. * the address space, but end 0 and ceiling 0 refer to the top
  338. * Comparisons need to use "end - 1" and "ceiling - 1" (though
  339. * that end 0 case should be mythical).
  340. *
  341. * Wherever addr is brought up or ceiling brought down, we
  342. * must be careful to reject "the opposite 0" before it
  343. * confuses the subsequent tests. But what about where end is
  344. * brought down by HUGEPD_SIZE below? no, end can't go down to
  345. * 0 there.
  346. *
  347. * Whereas we round start (addr) and ceiling down, by different
  348. * masks at different levels, in order to test whether a table
  349. * now has no other vmas using it, so can be freed, we don't
  350. * bother to round floor or end up - the tests don't need that.
  351. */
  352. unsigned int psize = get_slice_psize(tlb->mm, addr);
  353. addr &= HUGEPD_MASK(psize);
  354. if (addr < floor) {
  355. addr += HUGEPD_SIZE(psize);
  356. if (!addr)
  357. return;
  358. }
  359. if (ceiling) {
  360. ceiling &= HUGEPD_MASK(psize);
  361. if (!ceiling)
  362. return;
  363. }
  364. if (end - 1 > ceiling - 1)
  365. end -= HUGEPD_SIZE(psize);
  366. if (addr > end - 1)
  367. return;
  368. start = addr;
  369. pgd = pgd_offset(tlb->mm, addr);
  370. do {
  371. psize = get_slice_psize(tlb->mm, addr);
  372. BUG_ON(!mmu_huge_psizes[psize]);
  373. next = pgd_addr_end(addr, end);
  374. if (mmu_psize_to_shift(psize) < PUD_SHIFT) {
  375. if (pgd_none_or_clear_bad(pgd))
  376. continue;
  377. hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
  378. } else {
  379. if (pgd_none(*pgd))
  380. continue;
  381. free_hugepte_range(tlb, (hugepd_t *)pgd, psize);
  382. }
  383. } while (pgd++, addr = next, addr != end);
  384. }
  385. void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
  386. pte_t *ptep, pte_t pte)
  387. {
  388. if (pte_present(*ptep)) {
  389. /* We open-code pte_clear because we need to pass the right
  390. * argument to hpte_need_flush (huge / !huge). Might not be
  391. * necessary anymore if we make hpte_need_flush() get the
  392. * page size from the slices
  393. */
  394. unsigned int psize = get_slice_psize(mm, addr);
  395. unsigned int shift = mmu_psize_to_shift(psize);
  396. unsigned long sz = ((1UL) << shift);
  397. struct hstate *hstate = size_to_hstate(sz);
  398. pte_update(mm, addr & hstate->mask, ptep, ~0UL, 1);
  399. }
  400. *ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
  401. }
  402. pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
  403. pte_t *ptep)
  404. {
  405. unsigned long old = pte_update(mm, addr, ptep, ~0UL, 1);
  406. return __pte(old);
  407. }
  408. struct page *
  409. follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
  410. {
  411. pte_t *ptep;
  412. struct page *page;
  413. unsigned int mmu_psize = get_slice_psize(mm, address);
  414. /* Verify it is a huge page else bail. */
  415. if (!mmu_huge_psizes[mmu_psize])
  416. return ERR_PTR(-EINVAL);
  417. ptep = huge_pte_offset(mm, address);
  418. page = pte_page(*ptep);
  419. if (page) {
  420. unsigned int shift = mmu_psize_to_shift(mmu_psize);
  421. unsigned long sz = ((1UL) << shift);
  422. page += (address % sz) / PAGE_SIZE;
  423. }
  424. return page;
  425. }
  426. int pmd_huge(pmd_t pmd)
  427. {
  428. return 0;
  429. }
  430. int pud_huge(pud_t pud)
  431. {
  432. return 0;
  433. }
  434. struct page *
  435. follow_huge_pmd(struct mm_struct *mm, unsigned long address,
  436. pmd_t *pmd, int write)
  437. {
  438. BUG();
  439. return NULL;
  440. }
  441. unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
  442. unsigned long len, unsigned long pgoff,
  443. unsigned long flags)
  444. {
  445. struct hstate *hstate = hstate_file(file);
  446. int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
  447. if (!mmu_huge_psizes[mmu_psize])
  448. return -EINVAL;
  449. return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
  450. }
  451. unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
  452. {
  453. unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
  454. return 1UL << mmu_psize_to_shift(psize);
  455. }
  456. /*
  457. * Called by asm hashtable.S for doing lazy icache flush
  458. */
  459. static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags,
  460. pte_t pte, int trap, unsigned long sz)
  461. {
  462. struct page *page;
  463. int i;
  464. if (!pfn_valid(pte_pfn(pte)))
  465. return rflags;
  466. page = pte_page(pte);
  467. /* page is dirty */
  468. if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) {
  469. if (trap == 0x400) {
  470. for (i = 0; i < (sz / PAGE_SIZE); i++)
  471. __flush_dcache_icache(page_address(page+i));
  472. set_bit(PG_arch_1, &page->flags);
  473. } else {
  474. rflags |= HPTE_R_N;
  475. }
  476. }
  477. return rflags;
  478. }
  479. int hash_huge_page(struct mm_struct *mm, unsigned long access,
  480. unsigned long ea, unsigned long vsid, int local,
  481. unsigned long trap)
  482. {
  483. pte_t *ptep;
  484. unsigned long old_pte, new_pte;
  485. unsigned long va, rflags, pa, sz;
  486. long slot;
  487. int err = 1;
  488. int ssize = user_segment_size(ea);
  489. unsigned int mmu_psize;
  490. int shift;
  491. mmu_psize = get_slice_psize(mm, ea);
  492. if (!mmu_huge_psizes[mmu_psize])
  493. goto out;
  494. ptep = huge_pte_offset(mm, ea);
  495. /* Search the Linux page table for a match with va */
  496. va = hpt_va(ea, vsid, ssize);
  497. /*
  498. * If no pte found or not present, send the problem up to
  499. * do_page_fault
  500. */
  501. if (unlikely(!ptep || pte_none(*ptep)))
  502. goto out;
  503. /*
  504. * Check the user's access rights to the page. If access should be
  505. * prevented then send the problem up to do_page_fault.
  506. */
  507. if (unlikely(access & ~pte_val(*ptep)))
  508. goto out;
  509. /*
  510. * At this point, we have a pte (old_pte) which can be used to build
  511. * or update an HPTE. There are 2 cases:
  512. *
  513. * 1. There is a valid (present) pte with no associated HPTE (this is
  514. * the most common case)
  515. * 2. There is a valid (present) pte with an associated HPTE. The
  516. * current values of the pp bits in the HPTE prevent access
  517. * because we are doing software DIRTY bit management and the
  518. * page is currently not DIRTY.
  519. */
  520. do {
  521. old_pte = pte_val(*ptep);
  522. if (old_pte & _PAGE_BUSY)
  523. goto out;
  524. new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
  525. } while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
  526. old_pte, new_pte));
  527. rflags = 0x2 | (!(new_pte & _PAGE_RW));
  528. /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
  529. rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N);
  530. shift = mmu_psize_to_shift(mmu_psize);
  531. sz = ((1UL) << shift);
  532. if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
  533. /* No CPU has hugepages but lacks no execute, so we
  534. * don't need to worry about that case */
  535. rflags = hash_huge_page_do_lazy_icache(rflags, __pte(old_pte),
  536. trap, sz);
  537. /* Check if pte already has an hpte (case 2) */
  538. if (unlikely(old_pte & _PAGE_HASHPTE)) {
  539. /* There MIGHT be an HPTE for this pte */
  540. unsigned long hash, slot;
  541. hash = hpt_hash(va, shift, ssize);
  542. if (old_pte & _PAGE_F_SECOND)
  543. hash = ~hash;
  544. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  545. slot += (old_pte & _PAGE_F_GIX) >> 12;
  546. if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize,
  547. ssize, local) == -1)
  548. old_pte &= ~_PAGE_HPTEFLAGS;
  549. }
  550. if (likely(!(old_pte & _PAGE_HASHPTE))) {
  551. unsigned long hash = hpt_hash(va, shift, ssize);
  552. unsigned long hpte_group;
  553. pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
  554. repeat:
  555. hpte_group = ((hash & htab_hash_mask) *
  556. HPTES_PER_GROUP) & ~0x7UL;
  557. /* clear HPTE slot informations in new PTE */
  558. #ifdef CONFIG_PPC_64K_PAGES
  559. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
  560. #else
  561. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
  562. #endif
  563. /* Add in WIMG bits */
  564. rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
  565. _PAGE_COHERENT | _PAGE_GUARDED));
  566. /* Insert into the hash table, primary slot */
  567. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
  568. mmu_psize, ssize);
  569. /* Primary is full, try the secondary */
  570. if (unlikely(slot == -1)) {
  571. hpte_group = ((~hash & htab_hash_mask) *
  572. HPTES_PER_GROUP) & ~0x7UL;
  573. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
  574. HPTE_V_SECONDARY,
  575. mmu_psize, ssize);
  576. if (slot == -1) {
  577. if (mftb() & 0x1)
  578. hpte_group = ((hash & htab_hash_mask) *
  579. HPTES_PER_GROUP)&~0x7UL;
  580. ppc_md.hpte_remove(hpte_group);
  581. goto repeat;
  582. }
  583. }
  584. if (unlikely(slot == -2))
  585. panic("hash_huge_page: pte_insert failed\n");
  586. new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
  587. }
  588. /*
  589. * No need to use ldarx/stdcx here
  590. */
  591. *ptep = __pte(new_pte & ~_PAGE_BUSY);
  592. err = 0;
  593. out:
  594. return err;
  595. }
  596. static void __init set_huge_psize(int psize)
  597. {
  598. /* Check that it is a page size supported by the hardware and
  599. * that it fits within pagetable limits. */
  600. if (mmu_psize_defs[psize].shift &&
  601. mmu_psize_defs[psize].shift < SID_SHIFT_1T &&
  602. (mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT ||
  603. mmu_psize_defs[psize].shift == PAGE_SHIFT_64K ||
  604. mmu_psize_defs[psize].shift == PAGE_SHIFT_16G)) {
  605. /* Return if huge page size has already been setup or is the
  606. * same as the base page size. */
  607. if (mmu_huge_psizes[psize] ||
  608. mmu_psize_defs[psize].shift == PAGE_SHIFT)
  609. return;
  610. if (WARN_ON(HUGEPTE_CACHE_NAME(psize) == NULL))
  611. return;
  612. hugetlb_add_hstate(mmu_psize_defs[psize].shift - PAGE_SHIFT);
  613. switch (mmu_psize_defs[psize].shift) {
  614. case PAGE_SHIFT_64K:
  615. /* We only allow 64k hpages with 4k base page,
  616. * which was checked above, and always put them
  617. * at the PMD */
  618. hugepte_shift[psize] = PMD_SHIFT;
  619. break;
  620. case PAGE_SHIFT_16M:
  621. /* 16M pages can be at two different levels
  622. * of pagestables based on base page size */
  623. if (PAGE_SHIFT == PAGE_SHIFT_64K)
  624. hugepte_shift[psize] = PMD_SHIFT;
  625. else /* 4k base page */
  626. hugepte_shift[psize] = PUD_SHIFT;
  627. break;
  628. case PAGE_SHIFT_16G:
  629. /* 16G pages are always at PGD level */
  630. hugepte_shift[psize] = PGDIR_SHIFT;
  631. break;
  632. }
  633. hugepte_shift[psize] -= mmu_psize_defs[psize].shift;
  634. } else
  635. hugepte_shift[psize] = 0;
  636. }
  637. static int __init hugepage_setup_sz(char *str)
  638. {
  639. unsigned long long size;
  640. int mmu_psize;
  641. int shift;
  642. size = memparse(str, &str);
  643. shift = __ffs(size);
  644. mmu_psize = shift_to_mmu_psize(shift);
  645. if (mmu_psize >= 0 && mmu_psize_defs[mmu_psize].shift)
  646. set_huge_psize(mmu_psize);
  647. else
  648. printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size);
  649. return 1;
  650. }
  651. __setup("hugepagesz=", hugepage_setup_sz);
  652. static int __init hugetlbpage_init(void)
  653. {
  654. unsigned int psize;
  655. if (!cpu_has_feature(CPU_FTR_16M_PAGE))
  656. return -ENODEV;
  657. /* Add supported huge page sizes. Need to change HUGE_MAX_HSTATE
  658. * and adjust PTE_NONCACHE_NUM if the number of supported huge page
  659. * sizes changes.
  660. */
  661. set_huge_psize(MMU_PAGE_16M);
  662. set_huge_psize(MMU_PAGE_16G);
  663. /* Temporarily disable support for 64K huge pages when 64K SPU local
  664. * store support is enabled as the current implementation conflicts.
  665. */
  666. #ifndef CONFIG_SPU_FS_64K_LS
  667. set_huge_psize(MMU_PAGE_64K);
  668. #endif
  669. for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
  670. if (mmu_huge_psizes[psize]) {
  671. pgtable_cache[HUGE_PGTABLE_INDEX(psize)] =
  672. kmem_cache_create(
  673. HUGEPTE_CACHE_NAME(psize),
  674. HUGEPTE_TABLE_SIZE(psize),
  675. HUGEPTE_TABLE_SIZE(psize),
  676. 0,
  677. NULL);
  678. if (!pgtable_cache[HUGE_PGTABLE_INDEX(psize)])
  679. panic("hugetlbpage_init(): could not create %s"\
  680. "\n", HUGEPTE_CACHE_NAME(psize));
  681. }
  682. }
  683. return 0;
  684. }
  685. module_init(hugetlbpage_init);