setup_64.c 16 KB

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  1. /*
  2. *
  3. * Common boot and setup code.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/seq_file.h>
  22. #include <linux/ioport.h>
  23. #include <linux/console.h>
  24. #include <linux/utsname.h>
  25. #include <linux/tty.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/pci.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/lmb.h>
  36. #include <asm/io.h>
  37. #include <asm/kdump.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/smp.h>
  42. #include <asm/elf.h>
  43. #include <asm/machdep.h>
  44. #include <asm/paca.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/btext.h>
  49. #include <asm/nvram.h>
  50. #include <asm/setup.h>
  51. #include <asm/system.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/firmware.h>
  59. #include <asm/xmon.h>
  60. #include <asm/udbg.h>
  61. #include <asm/kexec.h>
  62. #include <asm/swiotlb.h>
  63. #include <asm/mmu_context.h>
  64. #include "setup.h"
  65. #ifdef DEBUG
  66. #define DBG(fmt...) udbg_printf(fmt)
  67. #else
  68. #define DBG(fmt...)
  69. #endif
  70. int boot_cpuid = 0;
  71. u64 ppc64_pft_size;
  72. /* Pick defaults since we might want to patch instructions
  73. * before we've read this from the device tree.
  74. */
  75. struct ppc64_caches ppc64_caches = {
  76. .dline_size = 0x40,
  77. .log_dline_size = 6,
  78. .iline_size = 0x40,
  79. .log_iline_size = 6
  80. };
  81. EXPORT_SYMBOL_GPL(ppc64_caches);
  82. /*
  83. * These are used in binfmt_elf.c to put aux entries on the stack
  84. * for each elf executable being started.
  85. */
  86. int dcache_bsize;
  87. int icache_bsize;
  88. int ucache_bsize;
  89. #ifdef CONFIG_SMP
  90. static int smt_enabled_cmdline;
  91. /* Look for ibm,smt-enabled OF option */
  92. static void check_smt_enabled(void)
  93. {
  94. struct device_node *dn;
  95. const char *smt_option;
  96. /* Allow the command line to overrule the OF option */
  97. if (smt_enabled_cmdline)
  98. return;
  99. dn = of_find_node_by_path("/options");
  100. if (dn) {
  101. smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
  102. if (smt_option) {
  103. if (!strcmp(smt_option, "on"))
  104. smt_enabled_at_boot = 1;
  105. else if (!strcmp(smt_option, "off"))
  106. smt_enabled_at_boot = 0;
  107. }
  108. }
  109. }
  110. /* Look for smt-enabled= cmdline option */
  111. static int __init early_smt_enabled(char *p)
  112. {
  113. smt_enabled_cmdline = 1;
  114. if (!p)
  115. return 0;
  116. if (!strcmp(p, "on") || !strcmp(p, "1"))
  117. smt_enabled_at_boot = 1;
  118. else if (!strcmp(p, "off") || !strcmp(p, "0"))
  119. smt_enabled_at_boot = 0;
  120. return 0;
  121. }
  122. early_param("smt-enabled", early_smt_enabled);
  123. #else
  124. #define check_smt_enabled()
  125. #endif /* CONFIG_SMP */
  126. /* Put the paca pointer into r13 and SPRG_PACA */
  127. void __init setup_paca(int cpu)
  128. {
  129. local_paca = &paca[cpu];
  130. mtspr(SPRN_SPRG_PACA, local_paca);
  131. #ifdef CONFIG_PPC_BOOK3E
  132. mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
  133. #endif
  134. }
  135. /*
  136. * Early initialization entry point. This is called by head.S
  137. * with MMU translation disabled. We rely on the "feature" of
  138. * the CPU that ignores the top 2 bits of the address in real
  139. * mode so we can access kernel globals normally provided we
  140. * only toy with things in the RMO region. From here, we do
  141. * some early parsing of the device-tree to setup out LMB
  142. * data structures, and allocate & initialize the hash table
  143. * and segment tables so we can start running with translation
  144. * enabled.
  145. *
  146. * It is this function which will call the probe() callback of
  147. * the various platform types and copy the matching one to the
  148. * global ppc_md structure. Your platform can eventually do
  149. * some very early initializations from the probe() routine, but
  150. * this is not recommended, be very careful as, for example, the
  151. * device-tree is not accessible via normal means at this point.
  152. */
  153. void __init early_setup(unsigned long dt_ptr)
  154. {
  155. /* -------- printk is _NOT_ safe to use here ! ------- */
  156. /* Fill in any unititialised pacas */
  157. initialise_pacas();
  158. /* Identify CPU type */
  159. identify_cpu(0, mfspr(SPRN_PVR));
  160. /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
  161. setup_paca(0);
  162. /* Initialize lockdep early or else spinlocks will blow */
  163. lockdep_init();
  164. /* -------- printk is now safe to use ------- */
  165. /* Enable early debugging if any specified (see udbg.h) */
  166. udbg_early_init();
  167. DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
  168. /*
  169. * Do early initialization using the flattened device
  170. * tree, such as retrieving the physical memory map or
  171. * calculating/retrieving the hash table size.
  172. */
  173. early_init_devtree(__va(dt_ptr));
  174. /* Now we know the logical id of our boot cpu, setup the paca. */
  175. setup_paca(boot_cpuid);
  176. /* Fix up paca fields required for the boot cpu */
  177. get_paca()->cpu_start = 1;
  178. /* Probe the machine type */
  179. probe_machine();
  180. setup_kdump_trampoline();
  181. DBG("Found, Initializing memory management...\n");
  182. /* Initialize the hash table or TLB handling */
  183. early_init_mmu();
  184. DBG(" <- early_setup()\n");
  185. }
  186. #ifdef CONFIG_SMP
  187. void early_setup_secondary(void)
  188. {
  189. /* Mark interrupts enabled in PACA */
  190. get_paca()->soft_enabled = 0;
  191. /* Initialize the hash table or TLB handling */
  192. early_init_mmu_secondary();
  193. }
  194. #endif /* CONFIG_SMP */
  195. #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
  196. void smp_release_cpus(void)
  197. {
  198. unsigned long *ptr;
  199. DBG(" -> smp_release_cpus()\n");
  200. /* All secondary cpus are spinning on a common spinloop, release them
  201. * all now so they can start to spin on their individual paca
  202. * spinloops. For non SMP kernels, the secondary cpus never get out
  203. * of the common spinloop.
  204. */
  205. ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
  206. - PHYSICAL_START);
  207. *ptr = __pa(generic_secondary_smp_init);
  208. mb();
  209. DBG(" <- smp_release_cpus()\n");
  210. }
  211. #endif /* CONFIG_SMP || CONFIG_KEXEC */
  212. /*
  213. * Initialize some remaining members of the ppc64_caches and systemcfg
  214. * structures
  215. * (at least until we get rid of them completely). This is mostly some
  216. * cache informations about the CPU that will be used by cache flush
  217. * routines and/or provided to userland
  218. */
  219. static void __init initialize_cache_info(void)
  220. {
  221. struct device_node *np;
  222. unsigned long num_cpus = 0;
  223. DBG(" -> initialize_cache_info()\n");
  224. for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
  225. num_cpus += 1;
  226. /* We're assuming *all* of the CPUs have the same
  227. * d-cache and i-cache sizes... -Peter
  228. */
  229. if ( num_cpus == 1 ) {
  230. const u32 *sizep, *lsizep;
  231. u32 size, lsize;
  232. size = 0;
  233. lsize = cur_cpu_spec->dcache_bsize;
  234. sizep = of_get_property(np, "d-cache-size", NULL);
  235. if (sizep != NULL)
  236. size = *sizep;
  237. lsizep = of_get_property(np, "d-cache-block-size", NULL);
  238. /* fallback if block size missing */
  239. if (lsizep == NULL)
  240. lsizep = of_get_property(np, "d-cache-line-size", NULL);
  241. if (lsizep != NULL)
  242. lsize = *lsizep;
  243. if (sizep == 0 || lsizep == 0)
  244. DBG("Argh, can't find dcache properties ! "
  245. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  246. ppc64_caches.dsize = size;
  247. ppc64_caches.dline_size = lsize;
  248. ppc64_caches.log_dline_size = __ilog2(lsize);
  249. ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
  250. size = 0;
  251. lsize = cur_cpu_spec->icache_bsize;
  252. sizep = of_get_property(np, "i-cache-size", NULL);
  253. if (sizep != NULL)
  254. size = *sizep;
  255. lsizep = of_get_property(np, "i-cache-block-size", NULL);
  256. if (lsizep == NULL)
  257. lsizep = of_get_property(np, "i-cache-line-size", NULL);
  258. if (lsizep != NULL)
  259. lsize = *lsizep;
  260. if (sizep == 0 || lsizep == 0)
  261. DBG("Argh, can't find icache properties ! "
  262. "sizep: %p, lsizep: %p\n", sizep, lsizep);
  263. ppc64_caches.isize = size;
  264. ppc64_caches.iline_size = lsize;
  265. ppc64_caches.log_iline_size = __ilog2(lsize);
  266. ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
  267. }
  268. }
  269. DBG(" <- initialize_cache_info()\n");
  270. }
  271. /*
  272. * Do some initial setup of the system. The parameters are those which
  273. * were passed in from the bootloader.
  274. */
  275. void __init setup_system(void)
  276. {
  277. DBG(" -> setup_system()\n");
  278. /* Apply the CPUs-specific and firmware specific fixups to kernel
  279. * text (nop out sections not relevant to this CPU or this firmware)
  280. */
  281. do_feature_fixups(cur_cpu_spec->cpu_features,
  282. &__start___ftr_fixup, &__stop___ftr_fixup);
  283. do_feature_fixups(cur_cpu_spec->mmu_features,
  284. &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
  285. do_feature_fixups(powerpc_firmware_features,
  286. &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
  287. do_lwsync_fixups(cur_cpu_spec->cpu_features,
  288. &__start___lwsync_fixup, &__stop___lwsync_fixup);
  289. /*
  290. * Unflatten the device-tree passed by prom_init or kexec
  291. */
  292. unflatten_device_tree();
  293. /*
  294. * Fill the ppc64_caches & systemcfg structures with informations
  295. * retrieved from the device-tree.
  296. */
  297. initialize_cache_info();
  298. /*
  299. * Initialize irq remapping subsystem
  300. */
  301. irq_early_init();
  302. #ifdef CONFIG_PPC_RTAS
  303. /*
  304. * Initialize RTAS if available
  305. */
  306. rtas_initialize();
  307. #endif /* CONFIG_PPC_RTAS */
  308. /*
  309. * Check if we have an initrd provided via the device-tree
  310. */
  311. check_for_initrd();
  312. /*
  313. * Do some platform specific early initializations, that includes
  314. * setting up the hash table pointers. It also sets up some interrupt-mapping
  315. * related options that will be used by finish_device_tree()
  316. */
  317. if (ppc_md.init_early)
  318. ppc_md.init_early();
  319. /*
  320. * We can discover serial ports now since the above did setup the
  321. * hash table management for us, thus ioremap works. We do that early
  322. * so that further code can be debugged
  323. */
  324. find_legacy_serial_ports();
  325. /*
  326. * Register early console
  327. */
  328. register_early_udbg_console();
  329. /*
  330. * Initialize xmon
  331. */
  332. xmon_setup();
  333. check_smt_enabled();
  334. smp_setup_cpu_maps();
  335. #ifdef CONFIG_SMP
  336. /* Release secondary cpus out of their spinloops at 0x60 now that
  337. * we can map physical -> logical CPU ids
  338. */
  339. smp_release_cpus();
  340. #endif
  341. printk("Starting Linux PPC64 %s\n", init_utsname()->version);
  342. printk("-----------------------------------------------------\n");
  343. printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
  344. printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size());
  345. if (ppc64_caches.dline_size != 0x80)
  346. printk("ppc64_caches.dcache_line_size = 0x%x\n",
  347. ppc64_caches.dline_size);
  348. if (ppc64_caches.iline_size != 0x80)
  349. printk("ppc64_caches.icache_line_size = 0x%x\n",
  350. ppc64_caches.iline_size);
  351. #ifdef CONFIG_PPC_STD_MMU_64
  352. if (htab_address)
  353. printk("htab_address = 0x%p\n", htab_address);
  354. printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
  355. #endif /* CONFIG_PPC_STD_MMU_64 */
  356. if (PHYSICAL_START > 0)
  357. printk("physical_start = 0x%llx\n",
  358. (unsigned long long)PHYSICAL_START);
  359. printk("-----------------------------------------------------\n");
  360. DBG(" <- setup_system()\n");
  361. }
  362. #ifdef CONFIG_IRQSTACKS
  363. static void __init irqstack_early_init(void)
  364. {
  365. unsigned int i;
  366. /*
  367. * interrupt stacks must be under 256MB, we cannot afford to take
  368. * SLB misses on them.
  369. */
  370. for_each_possible_cpu(i) {
  371. softirq_ctx[i] = (struct thread_info *)
  372. __va(lmb_alloc_base(THREAD_SIZE,
  373. THREAD_SIZE, 0x10000000));
  374. hardirq_ctx[i] = (struct thread_info *)
  375. __va(lmb_alloc_base(THREAD_SIZE,
  376. THREAD_SIZE, 0x10000000));
  377. }
  378. }
  379. #else
  380. #define irqstack_early_init()
  381. #endif
  382. #ifdef CONFIG_PPC_BOOK3E
  383. static void __init exc_lvl_early_init(void)
  384. {
  385. unsigned int i;
  386. for_each_possible_cpu(i) {
  387. critirq_ctx[i] = (struct thread_info *)
  388. __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
  389. dbgirq_ctx[i] = (struct thread_info *)
  390. __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
  391. mcheckirq_ctx[i] = (struct thread_info *)
  392. __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
  393. }
  394. }
  395. #else
  396. #define exc_lvl_early_init()
  397. #endif
  398. /*
  399. * Stack space used when we detect a bad kernel stack pointer, and
  400. * early in SMP boots before relocation is enabled.
  401. */
  402. static void __init emergency_stack_init(void)
  403. {
  404. unsigned long limit;
  405. unsigned int i;
  406. /*
  407. * Emergency stacks must be under 256MB, we cannot afford to take
  408. * SLB misses on them. The ABI also requires them to be 128-byte
  409. * aligned.
  410. *
  411. * Since we use these as temporary stacks during secondary CPU
  412. * bringup, we need to get at them in real mode. This means they
  413. * must also be within the RMO region.
  414. */
  415. limit = min(0x10000000ULL, lmb.rmo_size);
  416. for_each_possible_cpu(i) {
  417. unsigned long sp;
  418. sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
  419. sp += THREAD_SIZE;
  420. paca[i].emergency_sp = __va(sp);
  421. }
  422. }
  423. /*
  424. * Called into from start_kernel, after lock_kernel has been called.
  425. * Initializes bootmem, which is unsed to manage page allocation until
  426. * mem_init is called.
  427. */
  428. void __init setup_arch(char **cmdline_p)
  429. {
  430. ppc64_boot_msg(0x12, "Setup Arch");
  431. *cmdline_p = cmd_line;
  432. /*
  433. * Set cache line size based on type of cpu as a default.
  434. * Systems with OF can look in the properties on the cpu node(s)
  435. * for a possibly more accurate value.
  436. */
  437. dcache_bsize = ppc64_caches.dline_size;
  438. icache_bsize = ppc64_caches.iline_size;
  439. /* reboot on panic */
  440. panic_timeout = 180;
  441. if (ppc_md.panic)
  442. setup_panic();
  443. init_mm.start_code = (unsigned long)_stext;
  444. init_mm.end_code = (unsigned long) _etext;
  445. init_mm.end_data = (unsigned long) _edata;
  446. init_mm.brk = klimit;
  447. irqstack_early_init();
  448. exc_lvl_early_init();
  449. emergency_stack_init();
  450. #ifdef CONFIG_PPC_STD_MMU_64
  451. stabs_alloc();
  452. #endif
  453. /* set up the bootmem stuff with available memory */
  454. do_init_bootmem();
  455. sparse_init();
  456. #ifdef CONFIG_DUMMY_CONSOLE
  457. conswitchp = &dummy_con;
  458. #endif
  459. if (ppc_md.setup_arch)
  460. ppc_md.setup_arch();
  461. #ifdef CONFIG_SWIOTLB
  462. if (ppc_swiotlb_enable)
  463. swiotlb_init();
  464. #endif
  465. paging_init();
  466. /* Initialize the MMU context management stuff */
  467. mmu_context_init();
  468. ppc64_boot_msg(0x15, "Setup Done");
  469. }
  470. /* ToDo: do something useful if ppc_md is not yet setup. */
  471. #define PPC64_LINUX_FUNCTION 0x0f000000
  472. #define PPC64_IPL_MESSAGE 0xc0000000
  473. #define PPC64_TERM_MESSAGE 0xb0000000
  474. static void ppc64_do_msg(unsigned int src, const char *msg)
  475. {
  476. if (ppc_md.progress) {
  477. char buf[128];
  478. sprintf(buf, "%08X\n", src);
  479. ppc_md.progress(buf, 0);
  480. snprintf(buf, 128, "%s", msg);
  481. ppc_md.progress(buf, 0);
  482. }
  483. }
  484. /* Print a boot progress message. */
  485. void ppc64_boot_msg(unsigned int src, const char *msg)
  486. {
  487. ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
  488. printk("[boot]%04x %s\n", src, msg);
  489. }
  490. void cpu_die(void)
  491. {
  492. if (ppc_md.cpu_die)
  493. ppc_md.cpu_die();
  494. }
  495. #ifdef CONFIG_SMP
  496. #define PCPU_DYN_SIZE ()
  497. static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
  498. {
  499. return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
  500. __pa(MAX_DMA_ADDRESS));
  501. }
  502. static void __init pcpu_fc_free(void *ptr, size_t size)
  503. {
  504. free_bootmem(__pa(ptr), size);
  505. }
  506. static int pcpu_cpu_distance(unsigned int from, unsigned int to)
  507. {
  508. if (cpu_to_node(from) == cpu_to_node(to))
  509. return LOCAL_DISTANCE;
  510. else
  511. return REMOTE_DISTANCE;
  512. }
  513. void __init setup_per_cpu_areas(void)
  514. {
  515. const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
  516. size_t atom_size;
  517. unsigned long delta;
  518. unsigned int cpu;
  519. int rc;
  520. /*
  521. * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
  522. * to group units. For larger mappings, use 1M atom which
  523. * should be large enough to contain a number of units.
  524. */
  525. if (mmu_linear_psize == MMU_PAGE_4K)
  526. atom_size = PAGE_SIZE;
  527. else
  528. atom_size = 1 << 20;
  529. rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
  530. pcpu_fc_alloc, pcpu_fc_free);
  531. if (rc < 0)
  532. panic("cannot initialize percpu area (err=%d)", rc);
  533. delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
  534. for_each_possible_cpu(cpu)
  535. paca[cpu].data_offset = delta + pcpu_unit_offsets[cpu];
  536. }
  537. #endif
  538. #ifdef CONFIG_PPC_INDIRECT_IO
  539. struct ppc_pci_io ppc_pci_io;
  540. EXPORT_SYMBOL(ppc_pci_io);
  541. #endif /* CONFIG_PPC_INDIRECT_IO */