setup-common.c 16 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/lmb.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/prom.h>
  38. #include <asm/processor.h>
  39. #include <asm/vdso_datapage.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/smp.h>
  42. #include <asm/elf.h>
  43. #include <asm/machdep.h>
  44. #include <asm/time.h>
  45. #include <asm/cputable.h>
  46. #include <asm/sections.h>
  47. #include <asm/firmware.h>
  48. #include <asm/btext.h>
  49. #include <asm/nvram.h>
  50. #include <asm/setup.h>
  51. #include <asm/system.h>
  52. #include <asm/rtas.h>
  53. #include <asm/iommu.h>
  54. #include <asm/serial.h>
  55. #include <asm/cache.h>
  56. #include <asm/page.h>
  57. #include <asm/mmu.h>
  58. #include <asm/xmon.h>
  59. #include <asm/cputhreads.h>
  60. #include <mm/mmu_decl.h>
  61. #include "setup.h"
  62. #ifdef DEBUG
  63. #include <asm/udbg.h>
  64. #define DBG(fmt...) udbg_printf(fmt)
  65. #else
  66. #define DBG(fmt...)
  67. #endif
  68. /* The main machine-dep calls structure
  69. */
  70. struct machdep_calls ppc_md;
  71. EXPORT_SYMBOL(ppc_md);
  72. struct machdep_calls *machine_id;
  73. EXPORT_SYMBOL(machine_id);
  74. unsigned long klimit = (unsigned long) _end;
  75. char cmd_line[COMMAND_LINE_SIZE];
  76. /*
  77. * This still seems to be needed... -- paulus
  78. */
  79. struct screen_info screen_info = {
  80. .orig_x = 0,
  81. .orig_y = 25,
  82. .orig_video_cols = 80,
  83. .orig_video_lines = 25,
  84. .orig_video_isVGA = 1,
  85. .orig_video_points = 16
  86. };
  87. #ifdef __DO_IRQ_CANON
  88. /* XXX should go elsewhere eventually */
  89. int ppc_do_canonicalize_irqs;
  90. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  91. #endif
  92. /* also used by kexec */
  93. void machine_shutdown(void)
  94. {
  95. if (ppc_md.machine_shutdown)
  96. ppc_md.machine_shutdown();
  97. }
  98. void machine_restart(char *cmd)
  99. {
  100. machine_shutdown();
  101. if (ppc_md.restart)
  102. ppc_md.restart(cmd);
  103. #ifdef CONFIG_SMP
  104. smp_send_stop();
  105. #endif
  106. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  107. local_irq_disable();
  108. while (1) ;
  109. }
  110. void machine_power_off(void)
  111. {
  112. machine_shutdown();
  113. if (ppc_md.power_off)
  114. ppc_md.power_off();
  115. #ifdef CONFIG_SMP
  116. smp_send_stop();
  117. #endif
  118. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  119. local_irq_disable();
  120. while (1) ;
  121. }
  122. /* Used by the G5 thermal driver */
  123. EXPORT_SYMBOL_GPL(machine_power_off);
  124. void (*pm_power_off)(void) = machine_power_off;
  125. EXPORT_SYMBOL_GPL(pm_power_off);
  126. void machine_halt(void)
  127. {
  128. machine_shutdown();
  129. if (ppc_md.halt)
  130. ppc_md.halt();
  131. #ifdef CONFIG_SMP
  132. smp_send_stop();
  133. #endif
  134. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  135. local_irq_disable();
  136. while (1) ;
  137. }
  138. #ifdef CONFIG_TAU
  139. extern u32 cpu_temp(unsigned long cpu);
  140. extern u32 cpu_temp_both(unsigned long cpu);
  141. #endif /* CONFIG_TAU */
  142. #ifdef CONFIG_SMP
  143. DEFINE_PER_CPU(unsigned int, pvr);
  144. #endif
  145. static int show_cpuinfo(struct seq_file *m, void *v)
  146. {
  147. unsigned long cpu_id = (unsigned long)v - 1;
  148. unsigned int pvr;
  149. unsigned short maj;
  150. unsigned short min;
  151. if (cpu_id == NR_CPUS) {
  152. struct device_node *root;
  153. const char *model = NULL;
  154. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  155. unsigned long bogosum = 0;
  156. int i;
  157. for_each_online_cpu(i)
  158. bogosum += loops_per_jiffy;
  159. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  160. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  161. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  162. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  163. if (ppc_md.name)
  164. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  165. root = of_find_node_by_path("/");
  166. if (root)
  167. model = of_get_property(root, "model", NULL);
  168. if (model)
  169. seq_printf(m, "model\t\t: %s\n", model);
  170. of_node_put(root);
  171. if (ppc_md.show_cpuinfo != NULL)
  172. ppc_md.show_cpuinfo(m);
  173. #ifdef CONFIG_PPC32
  174. /* Display the amount of memory */
  175. seq_printf(m, "Memory\t\t: %d MB\n",
  176. (unsigned int)(total_memory / (1024 * 1024)));
  177. #endif
  178. return 0;
  179. }
  180. /* We only show online cpus: disable preempt (overzealous, I
  181. * knew) to prevent cpu going down. */
  182. preempt_disable();
  183. if (!cpu_online(cpu_id)) {
  184. preempt_enable();
  185. return 0;
  186. }
  187. #ifdef CONFIG_SMP
  188. pvr = per_cpu(pvr, cpu_id);
  189. #else
  190. pvr = mfspr(SPRN_PVR);
  191. #endif
  192. maj = (pvr >> 8) & 0xFF;
  193. min = pvr & 0xFF;
  194. seq_printf(m, "processor\t: %lu\n", cpu_id);
  195. seq_printf(m, "cpu\t\t: ");
  196. if (cur_cpu_spec->pvr_mask)
  197. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  198. else
  199. seq_printf(m, "unknown (%08x)", pvr);
  200. #ifdef CONFIG_ALTIVEC
  201. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  202. seq_printf(m, ", altivec supported");
  203. #endif /* CONFIG_ALTIVEC */
  204. seq_printf(m, "\n");
  205. #ifdef CONFIG_TAU
  206. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  207. #ifdef CONFIG_TAU_AVERAGE
  208. /* more straightforward, but potentially misleading */
  209. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  210. cpu_temp(cpu_id));
  211. #else
  212. /* show the actual temp sensor range */
  213. u32 temp;
  214. temp = cpu_temp_both(cpu_id);
  215. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  216. temp & 0xff, temp >> 16);
  217. #endif
  218. }
  219. #endif /* CONFIG_TAU */
  220. /*
  221. * Assume here that all clock rates are the same in a
  222. * smp system. -- Cort
  223. */
  224. if (ppc_proc_freq)
  225. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  226. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  227. if (ppc_md.show_percpuinfo != NULL)
  228. ppc_md.show_percpuinfo(m, cpu_id);
  229. /* If we are a Freescale core do a simple check so
  230. * we dont have to keep adding cases in the future */
  231. if (PVR_VER(pvr) & 0x8000) {
  232. switch (PVR_VER(pvr)) {
  233. case 0x8000: /* 7441/7450/7451, Voyager */
  234. case 0x8001: /* 7445/7455, Apollo 6 */
  235. case 0x8002: /* 7447/7457, Apollo 7 */
  236. case 0x8003: /* 7447A, Apollo 7 PM */
  237. case 0x8004: /* 7448, Apollo 8 */
  238. case 0x800c: /* 7410, Nitro */
  239. maj = ((pvr >> 8) & 0xF);
  240. min = PVR_MIN(pvr);
  241. break;
  242. default: /* e500/book-e */
  243. maj = PVR_MAJ(pvr);
  244. min = PVR_MIN(pvr);
  245. break;
  246. }
  247. } else {
  248. switch (PVR_VER(pvr)) {
  249. case 0x0020: /* 403 family */
  250. maj = PVR_MAJ(pvr) + 1;
  251. min = PVR_MIN(pvr);
  252. break;
  253. case 0x1008: /* 740P/750P ?? */
  254. maj = ((pvr >> 8) & 0xFF) - 1;
  255. min = pvr & 0xFF;
  256. break;
  257. default:
  258. maj = (pvr >> 8) & 0xFF;
  259. min = pvr & 0xFF;
  260. break;
  261. }
  262. }
  263. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  264. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  265. #ifdef CONFIG_PPC32
  266. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  267. loops_per_jiffy / (500000/HZ),
  268. (loops_per_jiffy / (5000/HZ)) % 100);
  269. #endif
  270. #ifdef CONFIG_SMP
  271. seq_printf(m, "\n");
  272. #endif
  273. preempt_enable();
  274. return 0;
  275. }
  276. static void *c_start(struct seq_file *m, loff_t *pos)
  277. {
  278. unsigned long i = *pos;
  279. return i <= NR_CPUS ? (void *)(i + 1) : NULL;
  280. }
  281. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  282. {
  283. ++*pos;
  284. return c_start(m, pos);
  285. }
  286. static void c_stop(struct seq_file *m, void *v)
  287. {
  288. }
  289. const struct seq_operations cpuinfo_op = {
  290. .start =c_start,
  291. .next = c_next,
  292. .stop = c_stop,
  293. .show = show_cpuinfo,
  294. };
  295. void __init check_for_initrd(void)
  296. {
  297. #ifdef CONFIG_BLK_DEV_INITRD
  298. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  299. initrd_start, initrd_end);
  300. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  301. * look sensible. If not, clear initrd reference.
  302. */
  303. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  304. initrd_end > initrd_start)
  305. ROOT_DEV = Root_RAM0;
  306. else
  307. initrd_start = initrd_end = 0;
  308. if (initrd_start)
  309. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  310. DBG(" <- check_for_initrd()\n");
  311. #endif /* CONFIG_BLK_DEV_INITRD */
  312. }
  313. #ifdef CONFIG_SMP
  314. int threads_per_core, threads_shift;
  315. cpumask_t threads_core_mask;
  316. static void __init cpu_init_thread_core_maps(int tpc)
  317. {
  318. int i;
  319. threads_per_core = tpc;
  320. threads_core_mask = CPU_MASK_NONE;
  321. /* This implementation only supports power of 2 number of threads
  322. * for simplicity and performance
  323. */
  324. threads_shift = ilog2(tpc);
  325. BUG_ON(tpc != (1 << threads_shift));
  326. for (i = 0; i < tpc; i++)
  327. cpu_set(i, threads_core_mask);
  328. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  329. tpc, tpc > 1 ? "s" : "");
  330. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  331. }
  332. /**
  333. * setup_cpu_maps - initialize the following cpu maps:
  334. * cpu_possible_map
  335. * cpu_present_map
  336. *
  337. * Having the possible map set up early allows us to restrict allocations
  338. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  339. *
  340. * We do not initialize the online map here; cpus set their own bits in
  341. * cpu_online_map as they come up.
  342. *
  343. * This function is valid only for Open Firmware systems. finish_device_tree
  344. * must be called before using this.
  345. *
  346. * While we're here, we may as well set the "physical" cpu ids in the paca.
  347. *
  348. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  349. */
  350. void __init smp_setup_cpu_maps(void)
  351. {
  352. struct device_node *dn = NULL;
  353. int cpu = 0;
  354. int nthreads = 1;
  355. DBG("smp_setup_cpu_maps()\n");
  356. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  357. const int *intserv;
  358. int j, len;
  359. DBG(" * %s...\n", dn->full_name);
  360. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  361. &len);
  362. if (intserv) {
  363. nthreads = len / sizeof(int);
  364. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  365. nthreads);
  366. } else {
  367. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  368. intserv = of_get_property(dn, "reg", NULL);
  369. if (!intserv)
  370. intserv = &cpu; /* assume logical == phys */
  371. }
  372. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  373. DBG(" thread %d -> cpu %d (hard id %d)\n",
  374. j, cpu, intserv[j]);
  375. set_cpu_present(cpu, true);
  376. set_hard_smp_processor_id(cpu, intserv[j]);
  377. set_cpu_possible(cpu, true);
  378. cpu++;
  379. }
  380. }
  381. /* If no SMT supported, nthreads is forced to 1 */
  382. if (!cpu_has_feature(CPU_FTR_SMT)) {
  383. DBG(" SMT disabled ! nthreads forced to 1\n");
  384. nthreads = 1;
  385. }
  386. #ifdef CONFIG_PPC64
  387. /*
  388. * On pSeries LPAR, we need to know how many cpus
  389. * could possibly be added to this partition.
  390. */
  391. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  392. (dn = of_find_node_by_path("/rtas"))) {
  393. int num_addr_cell, num_size_cell, maxcpus;
  394. const unsigned int *ireg;
  395. num_addr_cell = of_n_addr_cells(dn);
  396. num_size_cell = of_n_size_cells(dn);
  397. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  398. if (!ireg)
  399. goto out;
  400. maxcpus = ireg[num_addr_cell + num_size_cell];
  401. /* Double maxcpus for processors which have SMT capability */
  402. if (cpu_has_feature(CPU_FTR_SMT))
  403. maxcpus *= nthreads;
  404. if (maxcpus > NR_CPUS) {
  405. printk(KERN_WARNING
  406. "Partition configured for %d cpus, "
  407. "operating system maximum is %d.\n",
  408. maxcpus, NR_CPUS);
  409. maxcpus = NR_CPUS;
  410. } else
  411. printk(KERN_INFO "Partition configured for %d cpus.\n",
  412. maxcpus);
  413. for (cpu = 0; cpu < maxcpus; cpu++)
  414. set_cpu_possible(cpu, true);
  415. out:
  416. of_node_put(dn);
  417. }
  418. vdso_data->processorCount = num_present_cpus();
  419. #endif /* CONFIG_PPC64 */
  420. /* Initialize CPU <=> thread mapping/
  421. *
  422. * WARNING: We assume that the number of threads is the same for
  423. * every CPU in the system. If that is not the case, then some code
  424. * here will have to be reworked
  425. */
  426. cpu_init_thread_core_maps(nthreads);
  427. }
  428. #endif /* CONFIG_SMP */
  429. #ifdef CONFIG_PCSPKR_PLATFORM
  430. static __init int add_pcspkr(void)
  431. {
  432. struct device_node *np;
  433. struct platform_device *pd;
  434. int ret;
  435. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  436. of_node_put(np);
  437. if (!np)
  438. return -ENODEV;
  439. pd = platform_device_alloc("pcspkr", -1);
  440. if (!pd)
  441. return -ENOMEM;
  442. ret = platform_device_add(pd);
  443. if (ret)
  444. platform_device_put(pd);
  445. return ret;
  446. }
  447. device_initcall(add_pcspkr);
  448. #endif /* CONFIG_PCSPKR_PLATFORM */
  449. void probe_machine(void)
  450. {
  451. extern struct machdep_calls __machine_desc_start;
  452. extern struct machdep_calls __machine_desc_end;
  453. /*
  454. * Iterate all ppc_md structures until we find the proper
  455. * one for the current machine type
  456. */
  457. DBG("Probing machine type ...\n");
  458. for (machine_id = &__machine_desc_start;
  459. machine_id < &__machine_desc_end;
  460. machine_id++) {
  461. DBG(" %s ...", machine_id->name);
  462. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  463. if (ppc_md.probe()) {
  464. DBG(" match !\n");
  465. break;
  466. }
  467. DBG("\n");
  468. }
  469. /* What can we do if we didn't find ? */
  470. if (machine_id >= &__machine_desc_end) {
  471. DBG("No suitable machine found !\n");
  472. for (;;);
  473. }
  474. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  475. }
  476. /* Match a class of boards, not a specific device configuration. */
  477. int check_legacy_ioport(unsigned long base_port)
  478. {
  479. struct device_node *parent, *np = NULL;
  480. int ret = -ENODEV;
  481. switch(base_port) {
  482. case I8042_DATA_REG:
  483. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  484. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  485. if (np) {
  486. parent = of_get_parent(np);
  487. of_node_put(np);
  488. np = parent;
  489. break;
  490. }
  491. np = of_find_node_by_type(NULL, "8042");
  492. /* Pegasos has no device_type on its 8042 node, look for the
  493. * name instead */
  494. if (!np)
  495. np = of_find_node_by_name(NULL, "8042");
  496. break;
  497. case FDC_BASE: /* FDC1 */
  498. np = of_find_node_by_type(NULL, "fdc");
  499. break;
  500. #ifdef CONFIG_PPC_PREP
  501. case _PIDXR:
  502. case _PNPWRP:
  503. case PNPBIOS_BASE:
  504. /* implement me */
  505. #endif
  506. default:
  507. /* ipmi is supposed to fail here */
  508. break;
  509. }
  510. if (!np)
  511. return ret;
  512. parent = of_get_parent(np);
  513. if (parent) {
  514. if (strcmp(parent->type, "isa") == 0)
  515. ret = 0;
  516. of_node_put(parent);
  517. }
  518. of_node_put(np);
  519. return ret;
  520. }
  521. EXPORT_SYMBOL(check_legacy_ioport);
  522. static int ppc_panic_event(struct notifier_block *this,
  523. unsigned long event, void *ptr)
  524. {
  525. ppc_md.panic(ptr); /* May not return */
  526. return NOTIFY_DONE;
  527. }
  528. static struct notifier_block ppc_panic_block = {
  529. .notifier_call = ppc_panic_event,
  530. .priority = INT_MIN /* may not return; must be done last */
  531. };
  532. void __init setup_panic(void)
  533. {
  534. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  535. }
  536. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  537. /*
  538. * For platforms that have configurable cache-coherency. This function
  539. * checks that the cache coherency setting of the kernel matches the setting
  540. * left by the firmware, as indicated in the device tree. Since a mismatch
  541. * will eventually result in DMA failures, we print * and error and call
  542. * BUG() in that case.
  543. */
  544. #ifdef CONFIG_NOT_COHERENT_CACHE
  545. #define KERNEL_COHERENCY 0
  546. #else
  547. #define KERNEL_COHERENCY 1
  548. #endif
  549. static int __init check_cache_coherency(void)
  550. {
  551. struct device_node *np;
  552. const void *prop;
  553. int devtree_coherency;
  554. np = of_find_node_by_path("/");
  555. prop = of_get_property(np, "coherency-off", NULL);
  556. of_node_put(np);
  557. devtree_coherency = prop ? 0 : 1;
  558. if (devtree_coherency != KERNEL_COHERENCY) {
  559. printk(KERN_ERR
  560. "kernel coherency:%s != device tree_coherency:%s\n",
  561. KERNEL_COHERENCY ? "on" : "off",
  562. devtree_coherency ? "on" : "off");
  563. BUG();
  564. }
  565. return 0;
  566. }
  567. late_initcall(check_cache_coherency);
  568. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  569. #ifdef CONFIG_DEBUG_FS
  570. struct dentry *powerpc_debugfs_root;
  571. static int powerpc_debugfs_init(void)
  572. {
  573. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  574. return powerpc_debugfs_root == NULL;
  575. }
  576. arch_initcall(powerpc_debugfs_init);
  577. #endif
  578. static int ppc_dflt_bus_notify(struct notifier_block *nb,
  579. unsigned long action, void *data)
  580. {
  581. struct device *dev = data;
  582. /* We are only intereted in device addition */
  583. if (action != BUS_NOTIFY_ADD_DEVICE)
  584. return 0;
  585. set_dma_ops(dev, &dma_direct_ops);
  586. return NOTIFY_DONE;
  587. }
  588. static struct notifier_block ppc_dflt_plat_bus_notifier = {
  589. .notifier_call = ppc_dflt_bus_notify,
  590. .priority = INT_MAX,
  591. };
  592. static struct notifier_block ppc_dflt_of_bus_notifier = {
  593. .notifier_call = ppc_dflt_bus_notify,
  594. .priority = INT_MAX,
  595. };
  596. static int __init setup_bus_notifier(void)
  597. {
  598. bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
  599. bus_register_notifier(&of_platform_bus_type, &ppc_dflt_of_bus_notifier);
  600. return 0;
  601. }
  602. arch_initcall(setup_bus_notifier);