tlbflush.h 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175
  1. #ifndef _ASM_POWERPC_TLBFLUSH_H
  2. #define _ASM_POWERPC_TLBFLUSH_H
  3. /*
  4. * TLB flushing:
  5. *
  6. * - flush_tlb_mm(mm) flushes the specified mm context TLB's
  7. * - flush_tlb_page(vma, vmaddr) flushes one page
  8. * - local_flush_tlb_mm(mm, full) flushes the specified mm context on
  9. * the local processor
  10. * - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
  11. * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
  12. * - flush_tlb_range(vma, start, end) flushes a range of pages
  13. * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #ifdef __KERNEL__
  21. #ifdef CONFIG_PPC_MMU_NOHASH
  22. /*
  23. * TLB flushing for software loaded TLB chips
  24. *
  25. * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
  26. * flush_tlb_kernel_range are best implemented as tlbia vs
  27. * specific tlbie's
  28. */
  29. struct vm_area_struct;
  30. struct mm_struct;
  31. #define MMU_NO_CONTEXT ((unsigned int)-1)
  32. extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  33. unsigned long end);
  34. extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  35. extern void local_flush_tlb_mm(struct mm_struct *mm);
  36. extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  37. extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
  38. int tsize, int ind);
  39. #ifdef CONFIG_SMP
  40. extern void flush_tlb_mm(struct mm_struct *mm);
  41. extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  42. extern void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
  43. int tsize, int ind);
  44. #else
  45. #define flush_tlb_mm(mm) local_flush_tlb_mm(mm)
  46. #define flush_tlb_page(vma,addr) local_flush_tlb_page(vma,addr)
  47. #define __flush_tlb_page(mm,addr,p,i) __local_flush_tlb_page(mm,addr,p,i)
  48. #endif
  49. #define flush_tlb_page_nohash(vma,addr) flush_tlb_page(vma,addr)
  50. #elif defined(CONFIG_PPC_STD_MMU_32)
  51. /*
  52. * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
  53. */
  54. extern void flush_tlb_mm(struct mm_struct *mm);
  55. extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  56. extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
  57. extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  58. unsigned long end);
  59. extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
  60. static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  61. unsigned long vmaddr)
  62. {
  63. flush_tlb_page(vma, vmaddr);
  64. }
  65. static inline void local_flush_tlb_mm(struct mm_struct *mm)
  66. {
  67. flush_tlb_mm(mm);
  68. }
  69. #elif defined(CONFIG_PPC_STD_MMU_64)
  70. /*
  71. * TLB flushing for 64-bit hash-MMU CPUs
  72. */
  73. #include <linux/percpu.h>
  74. #include <asm/page.h>
  75. #define PPC64_TLB_BATCH_NR 192
  76. struct ppc64_tlb_batch {
  77. int active;
  78. unsigned long index;
  79. struct mm_struct *mm;
  80. real_pte_t pte[PPC64_TLB_BATCH_NR];
  81. unsigned long vaddr[PPC64_TLB_BATCH_NR];
  82. unsigned int psize;
  83. int ssize;
  84. };
  85. DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  86. extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
  87. extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
  88. pte_t *ptep, unsigned long pte, int huge);
  89. #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
  90. static inline void arch_enter_lazy_mmu_mode(void)
  91. {
  92. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  93. batch->active = 1;
  94. }
  95. static inline void arch_leave_lazy_mmu_mode(void)
  96. {
  97. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  98. if (batch->index)
  99. __flush_tlb_pending(batch);
  100. batch->active = 0;
  101. }
  102. #define arch_flush_lazy_mmu_mode() do {} while (0)
  103. extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
  104. int ssize, int local);
  105. extern void flush_hash_range(unsigned long number, int local);
  106. static inline void local_flush_tlb_mm(struct mm_struct *mm)
  107. {
  108. }
  109. static inline void flush_tlb_mm(struct mm_struct *mm)
  110. {
  111. }
  112. static inline void local_flush_tlb_page(struct vm_area_struct *vma,
  113. unsigned long vmaddr)
  114. {
  115. }
  116. static inline void flush_tlb_page(struct vm_area_struct *vma,
  117. unsigned long vmaddr)
  118. {
  119. }
  120. static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
  121. unsigned long vmaddr)
  122. {
  123. }
  124. static inline void flush_tlb_range(struct vm_area_struct *vma,
  125. unsigned long start, unsigned long end)
  126. {
  127. }
  128. static inline void flush_tlb_kernel_range(unsigned long start,
  129. unsigned long end)
  130. {
  131. }
  132. /* Private function for use by PCI IO mapping code */
  133. extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
  134. unsigned long end);
  135. #else
  136. #error Unsupported MMU type
  137. #endif
  138. #endif /*__KERNEL__ */
  139. #endif /* _ASM_POWERPC_TLBFLUSH_H */