bitops.h 9.8 KB

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  1. /*
  2. * PowerPC atomic bit operations.
  3. *
  4. * Merged version by David Gibson <david@gibson.dropbear.id.au>.
  5. * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
  6. * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
  7. * originally took it from the ppc32 code.
  8. *
  9. * Within a word, bits are numbered LSB first. Lot's of places make
  10. * this assumption by directly testing bits with (val & (1<<nr)).
  11. * This can cause confusion for large (> 1 word) bitmaps on a
  12. * big-endian system because, unlike little endian, the number of each
  13. * bit depends on the word size.
  14. *
  15. * The bitop functions are defined to work on unsigned longs, so for a
  16. * ppc64 system the bits end up numbered:
  17. * |63..............0|127............64|191...........128|255...........196|
  18. * and on ppc32:
  19. * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
  20. *
  21. * There are a few little-endian macros used mostly for filesystem
  22. * bitmaps, these work on similar bit arrays layouts, but
  23. * byte-oriented:
  24. * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
  25. *
  26. * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
  27. * number field needs to be reversed compared to the big-endian bit
  28. * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
  29. *
  30. * This program is free software; you can redistribute it and/or
  31. * modify it under the terms of the GNU General Public License
  32. * as published by the Free Software Foundation; either version
  33. * 2 of the License, or (at your option) any later version.
  34. */
  35. #ifndef _ASM_POWERPC_BITOPS_H
  36. #define _ASM_POWERPC_BITOPS_H
  37. #ifdef __KERNEL__
  38. #ifndef _LINUX_BITOPS_H
  39. #error only <linux/bitops.h> can be included directly
  40. #endif
  41. #include <linux/compiler.h>
  42. #include <asm/asm-compat.h>
  43. #include <asm/synch.h>
  44. /*
  45. * clear_bit doesn't imply a memory barrier
  46. */
  47. #define smp_mb__before_clear_bit() smp_mb()
  48. #define smp_mb__after_clear_bit() smp_mb()
  49. #define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
  50. #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
  51. #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
  52. /* Macro for generating the ***_bits() functions */
  53. #define DEFINE_BITOP(fn, op, prefix, postfix) \
  54. static __inline__ void fn(unsigned long mask, \
  55. volatile unsigned long *_p) \
  56. { \
  57. unsigned long old; \
  58. unsigned long *p = (unsigned long *)_p; \
  59. __asm__ __volatile__ ( \
  60. prefix \
  61. "1:" PPC_LLARX "%0,0,%3\n" \
  62. stringify_in_c(op) "%0,%0,%2\n" \
  63. PPC405_ERR77(0,%3) \
  64. PPC_STLCX "%0,0,%3\n" \
  65. "bne- 1b\n" \
  66. postfix \
  67. : "=&r" (old), "+m" (*p) \
  68. : "r" (mask), "r" (p) \
  69. : "cc", "memory"); \
  70. }
  71. DEFINE_BITOP(set_bits, or, "", "")
  72. DEFINE_BITOP(clear_bits, andc, "", "")
  73. DEFINE_BITOP(clear_bits_unlock, andc, LWSYNC_ON_SMP, "")
  74. DEFINE_BITOP(change_bits, xor, "", "")
  75. static __inline__ void set_bit(int nr, volatile unsigned long *addr)
  76. {
  77. set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
  78. }
  79. static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
  80. {
  81. clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
  82. }
  83. static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
  84. {
  85. clear_bits_unlock(BITOP_MASK(nr), addr + BITOP_WORD(nr));
  86. }
  87. static __inline__ void change_bit(int nr, volatile unsigned long *addr)
  88. {
  89. change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr));
  90. }
  91. /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
  92. * operands. */
  93. #define DEFINE_TESTOP(fn, op, prefix, postfix) \
  94. static __inline__ unsigned long fn( \
  95. unsigned long mask, \
  96. volatile unsigned long *_p) \
  97. { \
  98. unsigned long old, t; \
  99. unsigned long *p = (unsigned long *)_p; \
  100. __asm__ __volatile__ ( \
  101. prefix \
  102. "1:" PPC_LLARX "%0,0,%3\n" \
  103. stringify_in_c(op) "%1,%0,%2\n" \
  104. PPC405_ERR77(0,%3) \
  105. PPC_STLCX "%1,0,%3\n" \
  106. "bne- 1b\n" \
  107. postfix \
  108. : "=&r" (old), "=&r" (t) \
  109. : "r" (mask), "r" (p) \
  110. : "cc", "memory"); \
  111. return (old & mask); \
  112. }
  113. DEFINE_TESTOP(test_and_set_bits, or, LWSYNC_ON_SMP, ISYNC_ON_SMP)
  114. DEFINE_TESTOP(test_and_set_bits_lock, or, "", ISYNC_ON_SMP)
  115. DEFINE_TESTOP(test_and_clear_bits, andc, LWSYNC_ON_SMP, ISYNC_ON_SMP)
  116. DEFINE_TESTOP(test_and_change_bits, xor, LWSYNC_ON_SMP, ISYNC_ON_SMP)
  117. static __inline__ int test_and_set_bit(unsigned long nr,
  118. volatile unsigned long *addr)
  119. {
  120. return test_and_set_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
  121. }
  122. static __inline__ int test_and_set_bit_lock(unsigned long nr,
  123. volatile unsigned long *addr)
  124. {
  125. return test_and_set_bits_lock(BITOP_MASK(nr),
  126. addr + BITOP_WORD(nr)) != 0;
  127. }
  128. static __inline__ int test_and_clear_bit(unsigned long nr,
  129. volatile unsigned long *addr)
  130. {
  131. return test_and_clear_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
  132. }
  133. static __inline__ int test_and_change_bit(unsigned long nr,
  134. volatile unsigned long *addr)
  135. {
  136. return test_and_change_bits(BITOP_MASK(nr), addr + BITOP_WORD(nr)) != 0;
  137. }
  138. #include <asm-generic/bitops/non-atomic.h>
  139. static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
  140. {
  141. __asm__ __volatile__(LWSYNC_ON_SMP "" ::: "memory");
  142. __clear_bit(nr, addr);
  143. }
  144. /*
  145. * Return the zero-based bit position (LE, not IBM bit numbering) of
  146. * the most significant 1-bit in a double word.
  147. */
  148. static __inline__ __attribute__((const))
  149. int __ilog2(unsigned long x)
  150. {
  151. int lz;
  152. asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
  153. return BITS_PER_LONG - 1 - lz;
  154. }
  155. static inline __attribute__((const))
  156. int __ilog2_u32(u32 n)
  157. {
  158. int bit;
  159. asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
  160. return 31 - bit;
  161. }
  162. #ifdef __powerpc64__
  163. static inline __attribute__((const))
  164. int __ilog2_u64(u64 n)
  165. {
  166. int bit;
  167. asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
  168. return 63 - bit;
  169. }
  170. #endif
  171. /*
  172. * Determines the bit position of the least significant 0 bit in the
  173. * specified double word. The returned bit position will be
  174. * zero-based, starting from the right side (63/31 - 0).
  175. */
  176. static __inline__ unsigned long ffz(unsigned long x)
  177. {
  178. /* no zero exists anywhere in the 8 byte area. */
  179. if ((x = ~x) == 0)
  180. return BITS_PER_LONG;
  181. /*
  182. * Calculate the bit position of the least signficant '1' bit in x
  183. * (since x has been changed this will actually be the least signficant
  184. * '0' bit in * the original x). Note: (x & -x) gives us a mask that
  185. * is the least significant * (RIGHT-most) 1-bit of the value in x.
  186. */
  187. return __ilog2(x & -x);
  188. }
  189. static __inline__ int __ffs(unsigned long x)
  190. {
  191. return __ilog2(x & -x);
  192. }
  193. /*
  194. * ffs: find first bit set. This is defined the same way as
  195. * the libc and compiler builtin ffs routines, therefore
  196. * differs in spirit from the above ffz (man ffs).
  197. */
  198. static __inline__ int ffs(int x)
  199. {
  200. unsigned long i = (unsigned long)x;
  201. return __ilog2(i & -i) + 1;
  202. }
  203. /*
  204. * fls: find last (most-significant) bit set.
  205. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  206. */
  207. static __inline__ int fls(unsigned int x)
  208. {
  209. int lz;
  210. asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
  211. return 32 - lz;
  212. }
  213. static __inline__ unsigned long __fls(unsigned long x)
  214. {
  215. return __ilog2(x);
  216. }
  217. /*
  218. * 64-bit can do this using one cntlzd (count leading zeroes doubleword)
  219. * instruction; for 32-bit we use the generic version, which does two
  220. * 32-bit fls calls.
  221. */
  222. #ifdef __powerpc64__
  223. static __inline__ int fls64(__u64 x)
  224. {
  225. int lz;
  226. asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
  227. return 64 - lz;
  228. }
  229. #else
  230. #include <asm-generic/bitops/fls64.h>
  231. #endif /* __powerpc64__ */
  232. #include <asm-generic/bitops/hweight.h>
  233. #include <asm-generic/bitops/find.h>
  234. /* Little-endian versions */
  235. static __inline__ int test_le_bit(unsigned long nr,
  236. __const__ unsigned long *addr)
  237. {
  238. __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
  239. return (tmp[nr >> 3] >> (nr & 7)) & 1;
  240. }
  241. #define __set_le_bit(nr, addr) \
  242. __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  243. #define __clear_le_bit(nr, addr) \
  244. __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  245. #define test_and_set_le_bit(nr, addr) \
  246. test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  247. #define test_and_clear_le_bit(nr, addr) \
  248. test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  249. #define __test_and_set_le_bit(nr, addr) \
  250. __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  251. #define __test_and_clear_le_bit(nr, addr) \
  252. __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
  253. #define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0)
  254. unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
  255. unsigned long size, unsigned long offset);
  256. unsigned long generic_find_next_le_bit(const unsigned long *addr,
  257. unsigned long size, unsigned long offset);
  258. /* Bitmap functions for the ext2 filesystem */
  259. #define ext2_set_bit(nr,addr) \
  260. __test_and_set_le_bit((nr), (unsigned long*)addr)
  261. #define ext2_clear_bit(nr, addr) \
  262. __test_and_clear_le_bit((nr), (unsigned long*)addr)
  263. #define ext2_set_bit_atomic(lock, nr, addr) \
  264. test_and_set_le_bit((nr), (unsigned long*)addr)
  265. #define ext2_clear_bit_atomic(lock, nr, addr) \
  266. test_and_clear_le_bit((nr), (unsigned long*)addr)
  267. #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
  268. #define ext2_find_first_zero_bit(addr, size) \
  269. find_first_zero_le_bit((unsigned long*)addr, size)
  270. #define ext2_find_next_zero_bit(addr, size, off) \
  271. generic_find_next_zero_le_bit((unsigned long*)addr, size, off)
  272. #define ext2_find_next_bit(addr, size, off) \
  273. generic_find_next_le_bit((unsigned long *)addr, size, off)
  274. /* Bitmap functions for the minix filesystem. */
  275. #define minix_test_and_set_bit(nr,addr) \
  276. __test_and_set_le_bit(nr, (unsigned long *)addr)
  277. #define minix_set_bit(nr,addr) \
  278. __set_le_bit(nr, (unsigned long *)addr)
  279. #define minix_test_and_clear_bit(nr,addr) \
  280. __test_and_clear_le_bit(nr, (unsigned long *)addr)
  281. #define minix_test_bit(nr,addr) \
  282. test_le_bit(nr, (unsigned long *)addr)
  283. #define minix_find_first_zero_bit(addr,size) \
  284. find_first_zero_le_bit((unsigned long *)addr, size)
  285. #include <asm-generic/bitops/sched.h>
  286. #endif /* __KERNEL__ */
  287. #endif /* _ASM_POWERPC_BITOPS_H */