mn10300-serial.c 36 KB

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  1. /* MN10300 On-chip serial port UART driver
  2. *
  3. * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
  4. * Written by David Howells (dhowells@redhat.com)
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public Licence
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the Licence, or (at your option) any later version.
  10. */
  11. static const char serial_name[] = "MN10300 Serial driver";
  12. static const char serial_version[] = "mn10300_serial-1.0";
  13. static const char serial_revdate[] = "2007-11-06";
  14. #if defined(CONFIG_MN10300_TTYSM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  15. #define SUPPORT_SYSRQ
  16. #endif
  17. #include <linux/module.h>
  18. #include <linux/serial.h>
  19. #include <linux/circ_buf.h>
  20. #include <linux/errno.h>
  21. #include <linux/signal.h>
  22. #include <linux/sched.h>
  23. #include <linux/timer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/tty.h>
  26. #include <linux/tty_flip.h>
  27. #include <linux/major.h>
  28. #include <linux/string.h>
  29. #include <linux/ioport.h>
  30. #include <linux/mm.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <asm/system.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/bitops.h>
  39. #include <asm/serial-regs.h>
  40. #include <unit/timex.h>
  41. #include "mn10300-serial.h"
  42. static inline __attribute__((format(printf, 1, 2)))
  43. void no_printk(const char *fmt, ...)
  44. {
  45. }
  46. #define kenter(FMT, ...) \
  47. printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  48. #define _enter(FMT, ...) \
  49. no_printk(KERN_DEBUG "-->%s(" FMT ")\n", __func__, ##__VA_ARGS__)
  50. #define kdebug(FMT, ...) \
  51. printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  52. #define _debug(FMT, ...) \
  53. no_printk(KERN_DEBUG "--- " FMT "\n", ##__VA_ARGS__)
  54. #define kproto(FMT, ...) \
  55. printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  56. #define _proto(FMT, ...) \
  57. no_printk(KERN_DEBUG "### MNSERIAL " FMT " ###\n", ##__VA_ARGS__)
  58. #define NR_UARTS 3
  59. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  60. static void mn10300_serial_console_write(struct console *co,
  61. const char *s, unsigned count);
  62. static int __init mn10300_serial_console_setup(struct console *co,
  63. char *options);
  64. static struct uart_driver mn10300_serial_driver;
  65. static struct console mn10300_serial_console = {
  66. .name = "ttySM",
  67. .write = mn10300_serial_console_write,
  68. .device = uart_console_device,
  69. .setup = mn10300_serial_console_setup,
  70. .flags = CON_PRINTBUFFER,
  71. .index = -1,
  72. .data = &mn10300_serial_driver,
  73. };
  74. #endif
  75. static struct uart_driver mn10300_serial_driver = {
  76. .owner = NULL,
  77. .driver_name = "mn10300-serial",
  78. .dev_name = "ttySM",
  79. .major = TTY_MAJOR,
  80. .minor = 128,
  81. .nr = NR_UARTS,
  82. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  83. .cons = &mn10300_serial_console,
  84. #endif
  85. };
  86. static unsigned int mn10300_serial_tx_empty(struct uart_port *);
  87. static void mn10300_serial_set_mctrl(struct uart_port *, unsigned int mctrl);
  88. static unsigned int mn10300_serial_get_mctrl(struct uart_port *);
  89. static void mn10300_serial_stop_tx(struct uart_port *);
  90. static void mn10300_serial_start_tx(struct uart_port *);
  91. static void mn10300_serial_send_xchar(struct uart_port *, char ch);
  92. static void mn10300_serial_stop_rx(struct uart_port *);
  93. static void mn10300_serial_enable_ms(struct uart_port *);
  94. static void mn10300_serial_break_ctl(struct uart_port *, int ctl);
  95. static int mn10300_serial_startup(struct uart_port *);
  96. static void mn10300_serial_shutdown(struct uart_port *);
  97. static void mn10300_serial_set_termios(struct uart_port *,
  98. struct ktermios *new,
  99. struct ktermios *old);
  100. static const char *mn10300_serial_type(struct uart_port *);
  101. static void mn10300_serial_release_port(struct uart_port *);
  102. static int mn10300_serial_request_port(struct uart_port *);
  103. static void mn10300_serial_config_port(struct uart_port *, int);
  104. static int mn10300_serial_verify_port(struct uart_port *,
  105. struct serial_struct *);
  106. static const struct uart_ops mn10300_serial_ops = {
  107. .tx_empty = mn10300_serial_tx_empty,
  108. .set_mctrl = mn10300_serial_set_mctrl,
  109. .get_mctrl = mn10300_serial_get_mctrl,
  110. .stop_tx = mn10300_serial_stop_tx,
  111. .start_tx = mn10300_serial_start_tx,
  112. .send_xchar = mn10300_serial_send_xchar,
  113. .stop_rx = mn10300_serial_stop_rx,
  114. .enable_ms = mn10300_serial_enable_ms,
  115. .break_ctl = mn10300_serial_break_ctl,
  116. .startup = mn10300_serial_startup,
  117. .shutdown = mn10300_serial_shutdown,
  118. .set_termios = mn10300_serial_set_termios,
  119. .type = mn10300_serial_type,
  120. .release_port = mn10300_serial_release_port,
  121. .request_port = mn10300_serial_request_port,
  122. .config_port = mn10300_serial_config_port,
  123. .verify_port = mn10300_serial_verify_port,
  124. };
  125. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id);
  126. /*
  127. * the first on-chip serial port: ttySM0 (aka SIF0)
  128. */
  129. #ifdef CONFIG_MN10300_TTYSM0
  130. struct mn10300_serial_port mn10300_serial_port_sif0 = {
  131. .uart.ops = &mn10300_serial_ops,
  132. .uart.membase = (void __iomem *) &SC0CTR,
  133. .uart.mapbase = (unsigned long) &SC0CTR,
  134. .uart.iotype = UPIO_MEM,
  135. .uart.irq = 0,
  136. .uart.uartclk = 0, /* MN10300_IOCLK, */
  137. .uart.fifosize = 1,
  138. .uart.flags = UPF_BOOT_AUTOCONF,
  139. .uart.line = 0,
  140. .uart.type = PORT_MN10300,
  141. .uart.lock =
  142. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif0.uart.lock),
  143. .name = "ttySM0",
  144. ._iobase = &SC0CTR,
  145. ._control = &SC0CTR,
  146. ._status = (volatile u8 *) &SC0STR,
  147. ._intr = &SC0ICR,
  148. ._rxb = &SC0RXB,
  149. ._txb = &SC0TXB,
  150. .rx_name = "ttySM0/Rx",
  151. .tx_name = "ttySM0/Tx",
  152. #ifdef CONFIG_MN10300_TTYSM0_TIMER8
  153. .tm_name = "ttySM0/Timer8",
  154. ._tmxmd = &TM8MD,
  155. ._tmxbr = &TM8BR,
  156. ._tmicr = &TM8ICR,
  157. .tm_irq = TM8IRQ,
  158. .div_timer = MNSCx_DIV_TIMER_16BIT,
  159. #else /* CONFIG_MN10300_TTYSM0_TIMER2 */
  160. .tm_name = "ttySM0/Timer2",
  161. ._tmxmd = &TM2MD,
  162. ._tmxbr = (volatile u16 *) &TM2BR,
  163. ._tmicr = &TM2ICR,
  164. .tm_irq = TM2IRQ,
  165. .div_timer = MNSCx_DIV_TIMER_8BIT,
  166. #endif
  167. .rx_irq = SC0RXIRQ,
  168. .tx_irq = SC0TXIRQ,
  169. .rx_icr = &GxICR(SC0RXIRQ),
  170. .tx_icr = &GxICR(SC0TXIRQ),
  171. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  172. .options = 0,
  173. #ifdef CONFIG_GDBSTUB_ON_TTYSM0
  174. .gdbstub = 1,
  175. #endif
  176. };
  177. #endif /* CONFIG_MN10300_TTYSM0 */
  178. /*
  179. * the second on-chip serial port: ttySM1 (aka SIF1)
  180. */
  181. #ifdef CONFIG_MN10300_TTYSM1
  182. struct mn10300_serial_port mn10300_serial_port_sif1 = {
  183. .uart.ops = &mn10300_serial_ops,
  184. .uart.membase = (void __iomem *) &SC1CTR,
  185. .uart.mapbase = (unsigned long) &SC1CTR,
  186. .uart.iotype = UPIO_MEM,
  187. .uart.irq = 0,
  188. .uart.uartclk = 0, /* MN10300_IOCLK, */
  189. .uart.fifosize = 1,
  190. .uart.flags = UPF_BOOT_AUTOCONF,
  191. .uart.line = 1,
  192. .uart.type = PORT_MN10300,
  193. .uart.lock =
  194. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif1.uart.lock),
  195. .name = "ttySM1",
  196. ._iobase = &SC1CTR,
  197. ._control = &SC1CTR,
  198. ._status = (volatile u8 *) &SC1STR,
  199. ._intr = &SC1ICR,
  200. ._rxb = &SC1RXB,
  201. ._txb = &SC1TXB,
  202. .rx_name = "ttySM1/Rx",
  203. .tx_name = "ttySM1/Tx",
  204. #ifdef CONFIG_MN10300_TTYSM1_TIMER9
  205. .tm_name = "ttySM1/Timer9",
  206. ._tmxmd = &TM9MD,
  207. ._tmxbr = &TM9BR,
  208. ._tmicr = &TM9ICR,
  209. .tm_irq = TM9IRQ,
  210. .div_timer = MNSCx_DIV_TIMER_16BIT,
  211. #else /* CONFIG_MN10300_TTYSM1_TIMER3 */
  212. .tm_name = "ttySM1/Timer3",
  213. ._tmxmd = &TM3MD,
  214. ._tmxbr = (volatile u16 *) &TM3BR,
  215. ._tmicr = &TM3ICR,
  216. .tm_irq = TM3IRQ,
  217. .div_timer = MNSCx_DIV_TIMER_8BIT,
  218. #endif
  219. .rx_irq = SC1RXIRQ,
  220. .tx_irq = SC1TXIRQ,
  221. .rx_icr = &GxICR(SC1RXIRQ),
  222. .tx_icr = &GxICR(SC1TXIRQ),
  223. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  224. .options = 0,
  225. #ifdef CONFIG_GDBSTUB_ON_TTYSM1
  226. .gdbstub = 1,
  227. #endif
  228. };
  229. #endif /* CONFIG_MN10300_TTYSM1 */
  230. /*
  231. * the third on-chip serial port: ttySM2 (aka SIF2)
  232. */
  233. #ifdef CONFIG_MN10300_TTYSM2
  234. struct mn10300_serial_port mn10300_serial_port_sif2 = {
  235. .uart.ops = &mn10300_serial_ops,
  236. .uart.membase = (void __iomem *) &SC2CTR,
  237. .uart.mapbase = (unsigned long) &SC2CTR,
  238. .uart.iotype = UPIO_MEM,
  239. .uart.irq = 0,
  240. .uart.uartclk = 0, /* MN10300_IOCLK, */
  241. .uart.fifosize = 1,
  242. .uart.flags = UPF_BOOT_AUTOCONF,
  243. .uart.line = 2,
  244. #ifdef CONFIG_MN10300_TTYSM2_CTS
  245. .uart.type = PORT_MN10300_CTS,
  246. #else
  247. .uart.type = PORT_MN10300,
  248. #endif
  249. .uart.lock =
  250. __SPIN_LOCK_UNLOCKED(mn10300_serial_port_sif2.uart.lock),
  251. .name = "ttySM2",
  252. .rx_name = "ttySM2/Rx",
  253. .tx_name = "ttySM2/Tx",
  254. .tm_name = "ttySM2/Timer10",
  255. ._iobase = &SC2CTR,
  256. ._control = &SC2CTR,
  257. ._status = &SC2STR,
  258. ._intr = &SC2ICR,
  259. ._rxb = &SC2RXB,
  260. ._txb = &SC2TXB,
  261. ._tmxmd = &TM10MD,
  262. ._tmxbr = &TM10BR,
  263. ._tmicr = &TM10ICR,
  264. .tm_irq = TM10IRQ,
  265. .div_timer = MNSCx_DIV_TIMER_16BIT,
  266. .rx_irq = SC2RXIRQ,
  267. .tx_irq = SC2TXIRQ,
  268. .rx_icr = &GxICR(SC2RXIRQ),
  269. .tx_icr = &GxICR(SC2TXIRQ),
  270. .clock_src = MNSCx_CLOCK_SRC_IOCLK,
  271. #ifdef CONFIG_MN10300_TTYSM2_CTS
  272. .options = MNSCx_OPT_CTS,
  273. #else
  274. .options = 0,
  275. #endif
  276. #ifdef CONFIG_GDBSTUB_ON_TTYSM2
  277. .gdbstub = 1,
  278. #endif
  279. };
  280. #endif /* CONFIG_MN10300_TTYSM2 */
  281. /*
  282. * list of available serial ports
  283. */
  284. struct mn10300_serial_port *mn10300_serial_ports[NR_UARTS + 1] = {
  285. #ifdef CONFIG_MN10300_TTYSM0
  286. [0] = &mn10300_serial_port_sif0,
  287. #endif
  288. #ifdef CONFIG_MN10300_TTYSM1
  289. [1] = &mn10300_serial_port_sif1,
  290. #endif
  291. #ifdef CONFIG_MN10300_TTYSM2
  292. [2] = &mn10300_serial_port_sif2,
  293. #endif
  294. [NR_UARTS] = NULL,
  295. };
  296. /*
  297. * we abuse the serial ports' baud timers' interrupt lines to get the ability
  298. * to deliver interrupts to userspace as we use the ports' interrupt lines to
  299. * do virtual DMA on account of the ports having no hardware FIFOs
  300. *
  301. * we can generate an interrupt manually in the assembly stubs by writing to
  302. * the enable and detect bits in the interrupt control register, so all we need
  303. * to do here is disable the interrupt line
  304. *
  305. * note that we can't just leave the line enabled as the baud rate timer *also*
  306. * generates interrupts
  307. */
  308. static void mn10300_serial_mask_ack(unsigned int irq)
  309. {
  310. u16 tmp;
  311. GxICR(irq) = GxICR_LEVEL_6;
  312. tmp = GxICR(irq); /* flush write buffer */
  313. }
  314. static void mn10300_serial_nop(unsigned int irq)
  315. {
  316. }
  317. static struct irq_chip mn10300_serial_pic = {
  318. .name = "mnserial",
  319. .ack = mn10300_serial_mask_ack,
  320. .mask = mn10300_serial_mask_ack,
  321. .mask_ack = mn10300_serial_mask_ack,
  322. .unmask = mn10300_serial_nop,
  323. .end = mn10300_serial_nop,
  324. };
  325. /*
  326. * serial virtual DMA interrupt jump table
  327. */
  328. struct mn10300_serial_int mn10300_serial_int_tbl[NR_IRQS];
  329. static void mn10300_serial_dis_tx_intr(struct mn10300_serial_port *port)
  330. {
  331. u16 x;
  332. *port->tx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  333. x = *port->tx_icr;
  334. }
  335. static void mn10300_serial_en_tx_intr(struct mn10300_serial_port *port)
  336. {
  337. u16 x;
  338. *port->tx_icr = GxICR_LEVEL_1 | GxICR_ENABLE;
  339. x = *port->tx_icr;
  340. }
  341. static void mn10300_serial_dis_rx_intr(struct mn10300_serial_port *port)
  342. {
  343. u16 x;
  344. *port->rx_icr = GxICR_LEVEL_1 | GxICR_DETECT;
  345. x = *port->rx_icr;
  346. }
  347. /*
  348. * multi-bit equivalent of test_and_clear_bit()
  349. */
  350. static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
  351. {
  352. u32 epsw;
  353. asm volatile(" bclr %1,(%2) \n"
  354. " mov epsw,%0 \n"
  355. : "=d"(epsw) : "d"(mask), "a"(ptr));
  356. return !(epsw & EPSW_FLAG_Z);
  357. }
  358. /*
  359. * receive chars from the ring buffer for this serial port
  360. * - must do break detection here (not done in the UART)
  361. */
  362. static void mn10300_serial_receive_interrupt(struct mn10300_serial_port *port)
  363. {
  364. struct uart_icount *icount = &port->uart.icount;
  365. struct tty_struct *tty = port->uart.state->port.tty;
  366. unsigned ix;
  367. int count;
  368. u8 st, ch, push, status, overrun;
  369. _enter("%s", port->name);
  370. push = 0;
  371. count = CIRC_CNT(port->rx_inp, port->rx_outp, MNSC_BUFFER_SIZE);
  372. count = tty_buffer_request_room(tty, count);
  373. if (count == 0) {
  374. if (!tty->low_latency)
  375. tty_flip_buffer_push(tty);
  376. return;
  377. }
  378. try_again:
  379. /* pull chars out of the hat */
  380. ix = port->rx_outp;
  381. if (ix == port->rx_inp) {
  382. if (push && !tty->low_latency)
  383. tty_flip_buffer_push(tty);
  384. return;
  385. }
  386. ch = port->rx_buffer[ix++];
  387. st = port->rx_buffer[ix++];
  388. smp_rmb();
  389. port->rx_outp = ix & (MNSC_BUFFER_SIZE - 1);
  390. port->uart.icount.rx++;
  391. st &= SC01STR_FEF | SC01STR_PEF | SC01STR_OEF;
  392. status = 0;
  393. overrun = 0;
  394. /* the UART doesn't detect BREAK, so we have to do that ourselves
  395. * - it starts as a framing error on a NUL character
  396. * - then we count another two NUL characters before issuing TTY_BREAK
  397. * - then we end on a normal char or one that has all the bottom bits
  398. * zero and the top bits set
  399. */
  400. switch (port->rx_brk) {
  401. case 0:
  402. /* not breaking at the moment */
  403. break;
  404. case 1:
  405. if (st & SC01STR_FEF && ch == 0) {
  406. port->rx_brk = 2;
  407. goto try_again;
  408. }
  409. goto not_break;
  410. case 2:
  411. if (st & SC01STR_FEF && ch == 0) {
  412. port->rx_brk = 3;
  413. _proto("Rx Break Detected");
  414. icount->brk++;
  415. if (uart_handle_break(&port->uart))
  416. goto ignore_char;
  417. status |= 1 << TTY_BREAK;
  418. goto insert;
  419. }
  420. goto not_break;
  421. default:
  422. if (st & (SC01STR_FEF | SC01STR_PEF | SC01STR_OEF))
  423. goto try_again; /* still breaking */
  424. port->rx_brk = 0; /* end of the break */
  425. switch (ch) {
  426. case 0xFF:
  427. case 0xFE:
  428. case 0xFC:
  429. case 0xF8:
  430. case 0xF0:
  431. case 0xE0:
  432. case 0xC0:
  433. case 0x80:
  434. case 0x00:
  435. /* discard char at probable break end */
  436. goto try_again;
  437. }
  438. break;
  439. }
  440. process_errors:
  441. /* handle framing error */
  442. if (st & SC01STR_FEF) {
  443. if (ch == 0) {
  444. /* framing error with NUL char is probably a BREAK */
  445. port->rx_brk = 1;
  446. goto try_again;
  447. }
  448. _proto("Rx Framing Error");
  449. icount->frame++;
  450. status |= 1 << TTY_FRAME;
  451. }
  452. /* handle parity error */
  453. if (st & SC01STR_PEF) {
  454. _proto("Rx Parity Error");
  455. icount->parity++;
  456. status = TTY_PARITY;
  457. }
  458. /* handle normal char */
  459. if (status == 0) {
  460. if (uart_handle_sysrq_char(&port->uart, ch))
  461. goto ignore_char;
  462. status = (1 << TTY_NORMAL);
  463. }
  464. /* handle overrun error */
  465. if (st & SC01STR_OEF) {
  466. if (port->rx_brk)
  467. goto try_again;
  468. _proto("Rx Overrun Error");
  469. icount->overrun++;
  470. overrun = 1;
  471. }
  472. insert:
  473. status &= port->uart.read_status_mask;
  474. if (!overrun && !(status & port->uart.ignore_status_mask)) {
  475. int flag;
  476. if (status & (1 << TTY_BREAK))
  477. flag = TTY_BREAK;
  478. else if (status & (1 << TTY_PARITY))
  479. flag = TTY_PARITY;
  480. else if (status & (1 << TTY_FRAME))
  481. flag = TTY_FRAME;
  482. else
  483. flag = TTY_NORMAL;
  484. tty_insert_flip_char(tty, ch, flag);
  485. }
  486. /* overrun is special, since it's reported immediately, and doesn't
  487. * affect the current character
  488. */
  489. if (overrun)
  490. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  491. count--;
  492. if (count <= 0) {
  493. if (!tty->low_latency)
  494. tty_flip_buffer_push(tty);
  495. return;
  496. }
  497. ignore_char:
  498. push = 1;
  499. goto try_again;
  500. not_break:
  501. port->rx_brk = 0;
  502. goto process_errors;
  503. }
  504. /*
  505. * handle an interrupt from the serial transmission "virtual DMA" driver
  506. * - note: the interrupt routine will disable its own interrupts when the Tx
  507. * buffer is empty
  508. */
  509. static void mn10300_serial_transmit_interrupt(struct mn10300_serial_port *port)
  510. {
  511. _enter("%s", port->name);
  512. if (!port->uart.state || !port->uart.state->port.tty) {
  513. mn10300_serial_dis_tx_intr(port);
  514. return;
  515. }
  516. if (uart_tx_stopped(&port->uart) ||
  517. uart_circ_empty(&port->uart.state->xmit))
  518. mn10300_serial_dis_tx_intr(port);
  519. if (uart_circ_chars_pending(&port->uart.state->xmit) < WAKEUP_CHARS)
  520. uart_write_wakeup(&port->uart);
  521. }
  522. /*
  523. * deal with a change in the status of the CTS line
  524. */
  525. static void mn10300_serial_cts_changed(struct mn10300_serial_port *port, u8 st)
  526. {
  527. u16 ctr;
  528. port->tx_cts = st;
  529. port->uart.icount.cts++;
  530. /* flip the CTS state selector flag to interrupt when it changes
  531. * back */
  532. ctr = *port->_control;
  533. ctr ^= SC2CTR_TWS;
  534. *port->_control = ctr;
  535. uart_handle_cts_change(&port->uart, st & SC2STR_CTS);
  536. wake_up_interruptible(&port->uart.state->port.delta_msr_wait);
  537. }
  538. /*
  539. * handle a virtual interrupt generated by the lower level "virtual DMA"
  540. * routines (irq is the baud timer interrupt)
  541. */
  542. static irqreturn_t mn10300_serial_interrupt(int irq, void *dev_id)
  543. {
  544. struct mn10300_serial_port *port = dev_id;
  545. u8 st;
  546. spin_lock(&port->uart.lock);
  547. if (port->intr_flags) {
  548. _debug("INT %s: %x", port->name, port->intr_flags);
  549. if (mask_test_and_clear(&port->intr_flags, MNSCx_RX_AVAIL))
  550. mn10300_serial_receive_interrupt(port);
  551. if (mask_test_and_clear(&port->intr_flags,
  552. MNSCx_TX_SPACE | MNSCx_TX_EMPTY))
  553. mn10300_serial_transmit_interrupt(port);
  554. }
  555. /* the only modem control line amongst the whole lot is CTS on
  556. * serial port 2 */
  557. if (port->type == PORT_MN10300_CTS) {
  558. st = *port->_status;
  559. if ((port->tx_cts ^ st) & SC2STR_CTS)
  560. mn10300_serial_cts_changed(port, st);
  561. }
  562. spin_unlock(&port->uart.lock);
  563. return IRQ_HANDLED;
  564. }
  565. /*
  566. * return indication of whether the hardware transmit buffer is empty
  567. */
  568. static unsigned int mn10300_serial_tx_empty(struct uart_port *_port)
  569. {
  570. struct mn10300_serial_port *port =
  571. container_of(_port, struct mn10300_serial_port, uart);
  572. _enter("%s", port->name);
  573. return (*port->_status & (SC01STR_TXF | SC01STR_TBF)) ?
  574. 0 : TIOCSER_TEMT;
  575. }
  576. /*
  577. * set the modem control lines (we don't have any)
  578. */
  579. static void mn10300_serial_set_mctrl(struct uart_port *_port,
  580. unsigned int mctrl)
  581. {
  582. struct mn10300_serial_port *port =
  583. container_of(_port, struct mn10300_serial_port, uart);
  584. _enter("%s,%x", port->name, mctrl);
  585. }
  586. /*
  587. * get the modem control line statuses
  588. */
  589. static unsigned int mn10300_serial_get_mctrl(struct uart_port *_port)
  590. {
  591. struct mn10300_serial_port *port =
  592. container_of(_port, struct mn10300_serial_port, uart);
  593. _enter("%s", port->name);
  594. if (port->type == PORT_MN10300_CTS && !(*port->_status & SC2STR_CTS))
  595. return TIOCM_CAR | TIOCM_DSR;
  596. return TIOCM_CAR | TIOCM_CTS | TIOCM_DSR;
  597. }
  598. /*
  599. * stop transmitting characters
  600. */
  601. static void mn10300_serial_stop_tx(struct uart_port *_port)
  602. {
  603. struct mn10300_serial_port *port =
  604. container_of(_port, struct mn10300_serial_port, uart);
  605. _enter("%s", port->name);
  606. /* disable the virtual DMA */
  607. mn10300_serial_dis_tx_intr(port);
  608. }
  609. /*
  610. * start transmitting characters
  611. * - jump-start transmission if it has stalled
  612. * - enable the serial Tx interrupt (used by the virtual DMA controller)
  613. * - force an interrupt to happen if necessary
  614. */
  615. static void mn10300_serial_start_tx(struct uart_port *_port)
  616. {
  617. struct mn10300_serial_port *port =
  618. container_of(_port, struct mn10300_serial_port, uart);
  619. u16 x;
  620. _enter("%s{%lu}",
  621. port->name,
  622. CIRC_CNT(&port->uart.state->xmit.head,
  623. &port->uart.state->xmit.tail,
  624. UART_XMIT_SIZE));
  625. /* kick the virtual DMA controller */
  626. x = *port->tx_icr;
  627. x |= GxICR_ENABLE;
  628. if (*port->_status & SC01STR_TBF)
  629. x &= ~(GxICR_REQUEST | GxICR_DETECT);
  630. else
  631. x |= GxICR_REQUEST | GxICR_DETECT;
  632. _debug("CTR=%04hx ICR=%02hx STR=%04x TMD=%02hx TBR=%04hx ICR=%04hx",
  633. *port->_control, *port->_intr, *port->_status,
  634. *port->_tmxmd, *port->_tmxbr, *port->tx_icr);
  635. *port->tx_icr = x;
  636. x = *port->tx_icr;
  637. }
  638. /*
  639. * transmit a high-priority XON/XOFF character
  640. */
  641. static void mn10300_serial_send_xchar(struct uart_port *_port, char ch)
  642. {
  643. struct mn10300_serial_port *port =
  644. container_of(_port, struct mn10300_serial_port, uart);
  645. _enter("%s,%02x", port->name, ch);
  646. if (likely(port->gdbstub)) {
  647. port->tx_xchar = ch;
  648. if (ch)
  649. mn10300_serial_en_tx_intr(port);
  650. }
  651. }
  652. /*
  653. * stop receiving characters
  654. * - called whilst the port is being closed
  655. */
  656. static void mn10300_serial_stop_rx(struct uart_port *_port)
  657. {
  658. struct mn10300_serial_port *port =
  659. container_of(_port, struct mn10300_serial_port, uart);
  660. u16 ctr;
  661. _enter("%s", port->name);
  662. ctr = *port->_control;
  663. ctr &= ~SC01CTR_RXE;
  664. *port->_control = ctr;
  665. mn10300_serial_dis_rx_intr(port);
  666. }
  667. /*
  668. * enable modem status interrupts
  669. */
  670. static void mn10300_serial_enable_ms(struct uart_port *_port)
  671. {
  672. struct mn10300_serial_port *port =
  673. container_of(_port, struct mn10300_serial_port, uart);
  674. u16 ctr, cts;
  675. _enter("%s", port->name);
  676. if (port->type == PORT_MN10300_CTS) {
  677. /* want to interrupt when CTS goes low if CTS is now high and
  678. * vice versa
  679. */
  680. port->tx_cts = *port->_status;
  681. cts = (port->tx_cts & SC2STR_CTS) ?
  682. SC2CTR_TWE : SC2CTR_TWE | SC2CTR_TWS;
  683. ctr = *port->_control;
  684. ctr &= ~SC2CTR_TWS;
  685. ctr |= cts;
  686. *port->_control = ctr;
  687. mn10300_serial_en_tx_intr(port);
  688. }
  689. }
  690. /*
  691. * transmit or cease transmitting a break signal
  692. */
  693. static void mn10300_serial_break_ctl(struct uart_port *_port, int ctl)
  694. {
  695. struct mn10300_serial_port *port =
  696. container_of(_port, struct mn10300_serial_port, uart);
  697. _enter("%s,%d", port->name, ctl);
  698. if (ctl) {
  699. /* tell the virtual DMA handler to assert BREAK */
  700. port->tx_break = 1;
  701. mn10300_serial_en_tx_intr(port);
  702. } else {
  703. port->tx_break = 0;
  704. *port->_control &= ~SC01CTR_BKE;
  705. mn10300_serial_en_tx_intr(port);
  706. }
  707. }
  708. /*
  709. * grab the interrupts and enable the port for reception
  710. */
  711. static int mn10300_serial_startup(struct uart_port *_port)
  712. {
  713. struct mn10300_serial_port *port =
  714. container_of(_port, struct mn10300_serial_port, uart);
  715. struct mn10300_serial_int *pint;
  716. _enter("%s{%d}", port->name, port->gdbstub);
  717. if (unlikely(port->gdbstub))
  718. return -EBUSY;
  719. /* allocate an Rx buffer for the virtual DMA handler */
  720. port->rx_buffer = kmalloc(MNSC_BUFFER_SIZE, GFP_KERNEL);
  721. if (!port->rx_buffer)
  722. return -ENOMEM;
  723. port->rx_inp = port->rx_outp = 0;
  724. /* finally, enable the device */
  725. *port->_intr = SC01ICR_TI;
  726. *port->_control |= SC01CTR_TXE | SC01CTR_RXE;
  727. pint = &mn10300_serial_int_tbl[port->rx_irq];
  728. pint->port = port;
  729. pint->vdma = mn10300_serial_vdma_rx_handler;
  730. pint = &mn10300_serial_int_tbl[port->tx_irq];
  731. pint->port = port;
  732. pint->vdma = mn10300_serial_vdma_tx_handler;
  733. set_intr_level(port->rx_irq, GxICR_LEVEL_1);
  734. set_intr_level(port->tx_irq, GxICR_LEVEL_1);
  735. set_irq_chip(port->tm_irq, &mn10300_serial_pic);
  736. if (request_irq(port->rx_irq, mn10300_serial_interrupt,
  737. IRQF_DISABLED, port->rx_name, port) < 0)
  738. goto error;
  739. if (request_irq(port->tx_irq, mn10300_serial_interrupt,
  740. IRQF_DISABLED, port->tx_name, port) < 0)
  741. goto error2;
  742. if (request_irq(port->tm_irq, mn10300_serial_interrupt,
  743. IRQF_DISABLED, port->tm_name, port) < 0)
  744. goto error3;
  745. mn10300_serial_mask_ack(port->tm_irq);
  746. return 0;
  747. error3:
  748. free_irq(port->tx_irq, port);
  749. error2:
  750. free_irq(port->rx_irq, port);
  751. error:
  752. kfree(port->rx_buffer);
  753. port->rx_buffer = NULL;
  754. return -EBUSY;
  755. }
  756. /*
  757. * shutdown the port and release interrupts
  758. */
  759. static void mn10300_serial_shutdown(struct uart_port *_port)
  760. {
  761. struct mn10300_serial_port *port =
  762. container_of(_port, struct mn10300_serial_port, uart);
  763. _enter("%s", port->name);
  764. /* disable the serial port and its baud rate timer */
  765. port->tx_break = 0;
  766. *port->_control &= ~(SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  767. *port->_tmxmd = 0;
  768. if (port->rx_buffer) {
  769. void *buf = port->rx_buffer;
  770. port->rx_buffer = NULL;
  771. kfree(buf);
  772. }
  773. /* disable all intrs */
  774. free_irq(port->tm_irq, port);
  775. free_irq(port->rx_irq, port);
  776. free_irq(port->tx_irq, port);
  777. *port->rx_icr = GxICR_LEVEL_1;
  778. *port->tx_icr = GxICR_LEVEL_1;
  779. }
  780. /*
  781. * this routine is called to set the UART divisor registers to match the
  782. * specified baud rate for a serial port.
  783. */
  784. static void mn10300_serial_change_speed(struct mn10300_serial_port *port,
  785. struct ktermios *new,
  786. struct ktermios *old)
  787. {
  788. unsigned long flags;
  789. unsigned long ioclk = port->ioclk;
  790. unsigned cflag;
  791. int baud, bits, xdiv, tmp;
  792. u16 tmxbr, scxctr;
  793. u8 tmxmd, battempt;
  794. u8 div_timer = port->div_timer;
  795. _enter("%s{%lu}", port->name, ioclk);
  796. /* byte size and parity */
  797. cflag = new->c_cflag;
  798. switch (cflag & CSIZE) {
  799. case CS7: scxctr = SC01CTR_CLN_7BIT; bits = 9; break;
  800. case CS8: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  801. default: scxctr = SC01CTR_CLN_8BIT; bits = 10; break;
  802. }
  803. if (cflag & CSTOPB) {
  804. scxctr |= SC01CTR_STB_2BIT;
  805. bits++;
  806. }
  807. if (cflag & PARENB) {
  808. bits++;
  809. if (cflag & PARODD)
  810. scxctr |= SC01CTR_PB_ODD;
  811. #ifdef CMSPAR
  812. else if (cflag & CMSPAR)
  813. scxctr |= SC01CTR_PB_FIXED0;
  814. #endif
  815. else
  816. scxctr |= SC01CTR_PB_EVEN;
  817. }
  818. /* Determine divisor based on baud rate */
  819. battempt = 0;
  820. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  821. scxctr |= SC0CTR_CK_TM8UFLOW_8; /* ( == SC1CTR_CK_TM9UFLOW_8
  822. * == SC2CTR_CK_TM10UFLOW) */
  823. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  824. scxctr |= SC0CTR_CK_TM2UFLOW_8;
  825. try_alternative:
  826. baud = uart_get_baud_rate(&port->uart, new, old, 0,
  827. port->ioclk / 8);
  828. _debug("ALT %d [baud %d]", battempt, baud);
  829. if (!baud)
  830. baud = 9600; /* B0 transition handled in rs_set_termios */
  831. xdiv = 1;
  832. if (baud == 134) {
  833. baud = 269; /* 134 is really 134.5 */
  834. xdiv = 2;
  835. }
  836. if (baud == 38400 &&
  837. (port->uart.flags & UPF_SPD_MASK) == UPF_SPD_CUST
  838. ) {
  839. _debug("CUSTOM %u", port->uart.custom_divisor);
  840. if (div_timer == MNSCx_DIV_TIMER_16BIT) {
  841. if (port->uart.custom_divisor <= 65535) {
  842. tmxmd = TM8MD_SRC_IOCLK;
  843. tmxbr = port->uart.custom_divisor;
  844. port->uart.uartclk = ioclk;
  845. goto timer_okay;
  846. }
  847. if (port->uart.custom_divisor / 8 <= 65535) {
  848. tmxmd = TM8MD_SRC_IOCLK_8;
  849. tmxbr = port->uart.custom_divisor / 8;
  850. port->uart.custom_divisor = tmxbr * 8;
  851. port->uart.uartclk = ioclk / 8;
  852. goto timer_okay;
  853. }
  854. if (port->uart.custom_divisor / 32 <= 65535) {
  855. tmxmd = TM8MD_SRC_IOCLK_32;
  856. tmxbr = port->uart.custom_divisor / 32;
  857. port->uart.custom_divisor = tmxbr * 32;
  858. port->uart.uartclk = ioclk / 32;
  859. goto timer_okay;
  860. }
  861. } else if (div_timer == MNSCx_DIV_TIMER_8BIT) {
  862. if (port->uart.custom_divisor <= 255) {
  863. tmxmd = TM2MD_SRC_IOCLK;
  864. tmxbr = port->uart.custom_divisor;
  865. port->uart.uartclk = ioclk;
  866. goto timer_okay;
  867. }
  868. if (port->uart.custom_divisor / 8 <= 255) {
  869. tmxmd = TM2MD_SRC_IOCLK_8;
  870. tmxbr = port->uart.custom_divisor / 8;
  871. port->uart.custom_divisor = tmxbr * 8;
  872. port->uart.uartclk = ioclk / 8;
  873. goto timer_okay;
  874. }
  875. if (port->uart.custom_divisor / 32 <= 255) {
  876. tmxmd = TM2MD_SRC_IOCLK_32;
  877. tmxbr = port->uart.custom_divisor / 32;
  878. port->uart.custom_divisor = tmxbr * 32;
  879. port->uart.uartclk = ioclk / 32;
  880. goto timer_okay;
  881. }
  882. }
  883. }
  884. switch (div_timer) {
  885. case MNSCx_DIV_TIMER_16BIT:
  886. port->uart.uartclk = ioclk;
  887. tmxmd = TM8MD_SRC_IOCLK;
  888. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  889. if (tmp > 0 && tmp <= 65535)
  890. goto timer_okay;
  891. port->uart.uartclk = ioclk / 8;
  892. tmxmd = TM8MD_SRC_IOCLK_8;
  893. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  894. if (tmp > 0 && tmp <= 65535)
  895. goto timer_okay;
  896. port->uart.uartclk = ioclk / 32;
  897. tmxmd = TM8MD_SRC_IOCLK_32;
  898. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  899. if (tmp > 0 && tmp <= 65535)
  900. goto timer_okay;
  901. break;
  902. case MNSCx_DIV_TIMER_8BIT:
  903. port->uart.uartclk = ioclk;
  904. tmxmd = TM2MD_SRC_IOCLK;
  905. tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
  906. if (tmp > 0 && tmp <= 255)
  907. goto timer_okay;
  908. port->uart.uartclk = ioclk / 8;
  909. tmxmd = TM2MD_SRC_IOCLK_8;
  910. tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
  911. if (tmp > 0 && tmp <= 255)
  912. goto timer_okay;
  913. port->uart.uartclk = ioclk / 32;
  914. tmxmd = TM2MD_SRC_IOCLK_32;
  915. tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
  916. if (tmp > 0 && tmp <= 255)
  917. goto timer_okay;
  918. break;
  919. default:
  920. BUG();
  921. return;
  922. }
  923. /* refuse to change to a baud rate we can't support */
  924. _debug("CAN'T SUPPORT");
  925. switch (battempt) {
  926. case 0:
  927. if (old) {
  928. new->c_cflag &= ~CBAUD;
  929. new->c_cflag |= (old->c_cflag & CBAUD);
  930. battempt = 1;
  931. goto try_alternative;
  932. }
  933. case 1:
  934. /* as a last resort, if the quotient is zero, default to 9600
  935. * bps */
  936. new->c_cflag &= ~CBAUD;
  937. new->c_cflag |= B9600;
  938. battempt = 2;
  939. goto try_alternative;
  940. default:
  941. /* hmmm... can't seem to support 9600 either
  942. * - we could try iterating through the speeds we know about to
  943. * find the lowest
  944. */
  945. new->c_cflag &= ~CBAUD;
  946. new->c_cflag |= B0;
  947. if (div_timer == MNSCx_DIV_TIMER_16BIT)
  948. tmxmd = TM8MD_SRC_IOCLK_32;
  949. else if (div_timer == MNSCx_DIV_TIMER_8BIT)
  950. tmxmd = TM2MD_SRC_IOCLK_32;
  951. tmxbr = 1;
  952. port->uart.uartclk = ioclk / 32;
  953. break;
  954. }
  955. timer_okay:
  956. _debug("UARTCLK: %u / %hu", port->uart.uartclk, tmxbr);
  957. /* make the changes */
  958. spin_lock_irqsave(&port->uart.lock, flags);
  959. uart_update_timeout(&port->uart, new->c_cflag, baud);
  960. /* set the timer to produce the required baud rate */
  961. switch (div_timer) {
  962. case MNSCx_DIV_TIMER_16BIT:
  963. *port->_tmxmd = 0;
  964. *port->_tmxbr = tmxbr;
  965. *port->_tmxmd = TM8MD_INIT_COUNTER;
  966. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  967. break;
  968. case MNSCx_DIV_TIMER_8BIT:
  969. *port->_tmxmd = 0;
  970. *(volatile u8 *) port->_tmxbr = (u8) tmxbr;
  971. *port->_tmxmd = TM2MD_INIT_COUNTER;
  972. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  973. break;
  974. }
  975. /* CTS flow control flag and modem status interrupts */
  976. scxctr &= ~(SC2CTR_TWE | SC2CTR_TWS);
  977. if (port->type == PORT_MN10300_CTS && cflag & CRTSCTS) {
  978. /* want to interrupt when CTS goes low if CTS is now
  979. * high and vice versa
  980. */
  981. port->tx_cts = *port->_status;
  982. if (port->tx_cts & SC2STR_CTS)
  983. scxctr |= SC2CTR_TWE;
  984. else
  985. scxctr |= SC2CTR_TWE | SC2CTR_TWS;
  986. }
  987. /* set up parity check flag */
  988. port->uart.read_status_mask = (1 << TTY_NORMAL) | (1 << TTY_OVERRUN);
  989. if (new->c_iflag & INPCK)
  990. port->uart.read_status_mask |=
  991. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  992. if (new->c_iflag & (BRKINT | PARMRK))
  993. port->uart.read_status_mask |= (1 << TTY_BREAK);
  994. /* characters to ignore */
  995. port->uart.ignore_status_mask = 0;
  996. if (new->c_iflag & IGNPAR)
  997. port->uart.ignore_status_mask |=
  998. (1 << TTY_PARITY) | (1 << TTY_FRAME);
  999. if (new->c_iflag & IGNBRK) {
  1000. port->uart.ignore_status_mask |= (1 << TTY_BREAK);
  1001. /*
  1002. * If we're ignoring parity and break indicators,
  1003. * ignore overruns to (for real raw support).
  1004. */
  1005. if (new->c_iflag & IGNPAR)
  1006. port->uart.ignore_status_mask |= (1 << TTY_OVERRUN);
  1007. }
  1008. /* Ignore all characters if CREAD is not set */
  1009. if ((new->c_cflag & CREAD) == 0)
  1010. port->uart.ignore_status_mask |= (1 << TTY_NORMAL);
  1011. scxctr |= *port->_control & (SC01CTR_TXE | SC01CTR_RXE | SC01CTR_BKE);
  1012. *port->_control = scxctr;
  1013. spin_unlock_irqrestore(&port->uart.lock, flags);
  1014. }
  1015. /*
  1016. * set the terminal I/O parameters
  1017. */
  1018. static void mn10300_serial_set_termios(struct uart_port *_port,
  1019. struct ktermios *new,
  1020. struct ktermios *old)
  1021. {
  1022. struct mn10300_serial_port *port =
  1023. container_of(_port, struct mn10300_serial_port, uart);
  1024. _enter("%s,%p,%p", port->name, new, old);
  1025. mn10300_serial_change_speed(port, new, old);
  1026. /* handle turning off CRTSCTS */
  1027. if (!(new->c_cflag & CRTSCTS)) {
  1028. u16 ctr = *port->_control;
  1029. ctr &= ~SC2CTR_TWE;
  1030. *port->_control = ctr;
  1031. }
  1032. }
  1033. /*
  1034. * return description of port type
  1035. */
  1036. static const char *mn10300_serial_type(struct uart_port *_port)
  1037. {
  1038. struct mn10300_serial_port *port =
  1039. container_of(_port, struct mn10300_serial_port, uart);
  1040. if (port->uart.type == PORT_MN10300_CTS)
  1041. return "MN10300 SIF_CTS";
  1042. return "MN10300 SIF";
  1043. }
  1044. /*
  1045. * release I/O and memory regions in use by port
  1046. */
  1047. static void mn10300_serial_release_port(struct uart_port *_port)
  1048. {
  1049. struct mn10300_serial_port *port =
  1050. container_of(_port, struct mn10300_serial_port, uart);
  1051. _enter("%s", port->name);
  1052. release_mem_region((unsigned long) port->_iobase, 16);
  1053. }
  1054. /*
  1055. * request I/O and memory regions for port
  1056. */
  1057. static int mn10300_serial_request_port(struct uart_port *_port)
  1058. {
  1059. struct mn10300_serial_port *port =
  1060. container_of(_port, struct mn10300_serial_port, uart);
  1061. _enter("%s", port->name);
  1062. request_mem_region((unsigned long) port->_iobase, 16, port->name);
  1063. return 0;
  1064. }
  1065. /*
  1066. * configure the type and reserve the ports
  1067. */
  1068. static void mn10300_serial_config_port(struct uart_port *_port, int type)
  1069. {
  1070. struct mn10300_serial_port *port =
  1071. container_of(_port, struct mn10300_serial_port, uart);
  1072. _enter("%s", port->name);
  1073. port->uart.type = PORT_MN10300;
  1074. if (port->options & MNSCx_OPT_CTS)
  1075. port->uart.type = PORT_MN10300_CTS;
  1076. mn10300_serial_request_port(_port);
  1077. }
  1078. /*
  1079. * verify serial parameters are suitable for this port type
  1080. */
  1081. static int mn10300_serial_verify_port(struct uart_port *_port,
  1082. struct serial_struct *ss)
  1083. {
  1084. struct mn10300_serial_port *port =
  1085. container_of(_port, struct mn10300_serial_port, uart);
  1086. void *mapbase = (void *) (unsigned long) port->uart.mapbase;
  1087. _enter("%s", port->name);
  1088. /* these things may not be changed */
  1089. if (ss->irq != port->uart.irq ||
  1090. ss->port != port->uart.iobase ||
  1091. ss->io_type != port->uart.iotype ||
  1092. ss->iomem_base != mapbase ||
  1093. ss->iomem_reg_shift != port->uart.regshift ||
  1094. ss->hub6 != port->uart.hub6 ||
  1095. ss->xmit_fifo_size != port->uart.fifosize)
  1096. return -EINVAL;
  1097. /* type may be changed on a port that supports CTS */
  1098. if (ss->type != port->uart.type) {
  1099. if (!(port->options & MNSCx_OPT_CTS))
  1100. return -EINVAL;
  1101. if (ss->type != PORT_MN10300 &&
  1102. ss->type != PORT_MN10300_CTS)
  1103. return -EINVAL;
  1104. }
  1105. return 0;
  1106. }
  1107. /*
  1108. * initialise the MN10300 on-chip UARTs
  1109. */
  1110. static int __init mn10300_serial_init(void)
  1111. {
  1112. struct mn10300_serial_port *port;
  1113. int ret, i;
  1114. printk(KERN_INFO "%s version %s (%s)\n",
  1115. serial_name, serial_version, serial_revdate);
  1116. #ifdef CONFIG_MN10300_TTYSM2
  1117. SC2TIM = 8; /* make the baud base of timer 2 IOCLK/8 */
  1118. #endif
  1119. set_intr_stub(EXCEP_IRQ_LEVEL1, mn10300_serial_vdma_interrupt);
  1120. ret = uart_register_driver(&mn10300_serial_driver);
  1121. if (!ret) {
  1122. for (i = 0 ; i < NR_PORTS ; i++) {
  1123. port = mn10300_serial_ports[i];
  1124. if (!port || port->gdbstub)
  1125. continue;
  1126. switch (port->clock_src) {
  1127. case MNSCx_CLOCK_SRC_IOCLK:
  1128. port->ioclk = MN10300_IOCLK;
  1129. break;
  1130. #ifdef MN10300_IOBCLK
  1131. case MNSCx_CLOCK_SRC_IOBCLK:
  1132. port->ioclk = MN10300_IOBCLK;
  1133. break;
  1134. #endif
  1135. default:
  1136. BUG();
  1137. }
  1138. ret = uart_add_one_port(&mn10300_serial_driver,
  1139. &port->uart);
  1140. if (ret < 0) {
  1141. _debug("ERROR %d", -ret);
  1142. break;
  1143. }
  1144. }
  1145. if (ret)
  1146. uart_unregister_driver(&mn10300_serial_driver);
  1147. }
  1148. return ret;
  1149. }
  1150. __initcall(mn10300_serial_init);
  1151. #ifdef CONFIG_MN10300_TTYSM_CONSOLE
  1152. /*
  1153. * print a string to the serial port without disturbing the real user of the
  1154. * port too much
  1155. * - the console must be locked by the caller
  1156. */
  1157. static void mn10300_serial_console_write(struct console *co,
  1158. const char *s, unsigned count)
  1159. {
  1160. struct mn10300_serial_port *port;
  1161. unsigned i;
  1162. u16 scxctr, txicr, tmp;
  1163. u8 tmxmd;
  1164. port = mn10300_serial_ports[co->index];
  1165. /* firstly hijack the serial port from the "virtual DMA" controller */
  1166. txicr = *port->tx_icr;
  1167. *port->tx_icr = GxICR_LEVEL_1;
  1168. tmp = *port->tx_icr;
  1169. /* the transmitter may be disabled */
  1170. scxctr = *port->_control;
  1171. if (!(scxctr & SC01CTR_TXE)) {
  1172. /* restart the UART clock */
  1173. tmxmd = *port->_tmxmd;
  1174. switch (port->div_timer) {
  1175. case MNSCx_DIV_TIMER_16BIT:
  1176. *port->_tmxmd = 0;
  1177. *port->_tmxmd = TM8MD_INIT_COUNTER;
  1178. *port->_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
  1179. break;
  1180. case MNSCx_DIV_TIMER_8BIT:
  1181. *port->_tmxmd = 0;
  1182. *port->_tmxmd = TM2MD_INIT_COUNTER;
  1183. *port->_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
  1184. break;
  1185. }
  1186. /* enable the transmitter */
  1187. *port->_control = (scxctr & ~SC01CTR_BKE) | SC01CTR_TXE;
  1188. } else if (scxctr & SC01CTR_BKE) {
  1189. /* stop transmitting BREAK */
  1190. *port->_control = (scxctr & ~SC01CTR_BKE);
  1191. }
  1192. /* send the chars into the serial port (with LF -> LFCR conversion) */
  1193. for (i = 0; i < count; i++) {
  1194. char ch = *s++;
  1195. while (*port->_status & SC01STR_TBF)
  1196. continue;
  1197. *(u8 *) port->_txb = ch;
  1198. if (ch == 0x0a) {
  1199. while (*port->_status & SC01STR_TBF)
  1200. continue;
  1201. *(u8 *) port->_txb = 0xd;
  1202. }
  1203. }
  1204. /* can't let the transmitter be turned off if it's actually
  1205. * transmitting */
  1206. while (*port->_status & (SC01STR_TXF | SC01STR_TBF))
  1207. continue;
  1208. /* disable the transmitter if we re-enabled it */
  1209. if (!(scxctr & SC01CTR_TXE))
  1210. *port->_control = scxctr;
  1211. *port->tx_icr = txicr;
  1212. tmp = *port->tx_icr;
  1213. }
  1214. /*
  1215. * set up a serial port as a console
  1216. * - construct a cflag setting for the first rs_open()
  1217. * - initialize the serial port
  1218. * - return non-zero if we didn't find a serial port.
  1219. */
  1220. static int __init mn10300_serial_console_setup(struct console *co,
  1221. char *options)
  1222. {
  1223. struct mn10300_serial_port *port;
  1224. int i, parity = 'n', baud = 9600, bits = 8, flow = 0;
  1225. for (i = 0 ; i < NR_PORTS ; i++) {
  1226. port = mn10300_serial_ports[i];
  1227. if (port && !port->gdbstub && port->uart.line == co->index)
  1228. goto found_device;
  1229. }
  1230. return -ENODEV;
  1231. found_device:
  1232. switch (port->clock_src) {
  1233. case MNSCx_CLOCK_SRC_IOCLK:
  1234. port->ioclk = MN10300_IOCLK;
  1235. break;
  1236. #ifdef MN10300_IOBCLK
  1237. case MNSCx_CLOCK_SRC_IOBCLK:
  1238. port->ioclk = MN10300_IOBCLK;
  1239. break;
  1240. #endif
  1241. default:
  1242. BUG();
  1243. }
  1244. if (options)
  1245. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1246. return uart_set_options(&port->uart, co, baud, parity, bits, flow);
  1247. }
  1248. /*
  1249. * register console
  1250. */
  1251. static int __init mn10300_serial_console_init(void)
  1252. {
  1253. register_console(&mn10300_serial_console);
  1254. return 0;
  1255. }
  1256. console_initcall(mn10300_serial_console_init);
  1257. #endif