smp.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181
  1. #include <linux/linkage.h>
  2. #include <linux/sched.h>
  3. #include <linux/smp.h>
  4. #include <asm/pmon.h>
  5. #include <asm/titan_dep.h>
  6. #include <asm/time.h>
  7. #define LAUNCHSTACK_SIZE 256
  8. static __cpuinitdata DEFINE_SPINLOCK(launch_lock);
  9. static unsigned long secondary_sp __cpuinitdata;
  10. static unsigned long secondary_gp __cpuinitdata;
  11. static unsigned char launchstack[LAUNCHSTACK_SIZE] __initdata
  12. __attribute__((aligned(2 * sizeof(long))));
  13. static void __init prom_smp_bootstrap(void)
  14. {
  15. local_irq_disable();
  16. while (spin_is_locked(&launch_lock));
  17. __asm__ __volatile__(
  18. " move $sp, %0 \n"
  19. " move $gp, %1 \n"
  20. " j smp_bootstrap \n"
  21. :
  22. : "r" (secondary_sp), "r" (secondary_gp));
  23. }
  24. /*
  25. * PMON is a fragile beast. It'll blow up once the mappings it's littering
  26. * right into the middle of KSEG3 are blown away so we have to grab the slave
  27. * core early and keep it in a waiting loop.
  28. */
  29. void __init prom_grab_secondary(void)
  30. {
  31. spin_lock(&launch_lock);
  32. pmon_cpustart(1, &prom_smp_bootstrap,
  33. launchstack + LAUNCHSTACK_SIZE, 0);
  34. }
  35. void titan_mailbox_irq(void)
  36. {
  37. int cpu = smp_processor_id();
  38. unsigned long status;
  39. switch (cpu) {
  40. case 0:
  41. status = OCD_READ(RM9000x2_OCD_INTP0STATUS3);
  42. OCD_WRITE(RM9000x2_OCD_INTP0CLEAR3, status);
  43. if (status & 0x2)
  44. smp_call_function_interrupt();
  45. break;
  46. case 1:
  47. status = OCD_READ(RM9000x2_OCD_INTP1STATUS3);
  48. OCD_WRITE(RM9000x2_OCD_INTP1CLEAR3, status);
  49. if (status & 0x2)
  50. smp_call_function_interrupt();
  51. break;
  52. }
  53. }
  54. /*
  55. * Send inter-processor interrupt
  56. */
  57. static void yos_send_ipi_single(int cpu, unsigned int action)
  58. {
  59. /*
  60. * Generate an INTMSG so that it can be sent over to the
  61. * destination CPU. The INTMSG will put the STATUS bits
  62. * based on the action desired. An alternative strategy
  63. * is to write to the Interrupt Set register, read the
  64. * Interrupt Status register and clear the Interrupt
  65. * Clear register. The latter is preffered.
  66. */
  67. switch (action) {
  68. case SMP_RESCHEDULE_YOURSELF:
  69. if (cpu == 1)
  70. OCD_WRITE(RM9000x2_OCD_INTP1SET3, 4);
  71. else
  72. OCD_WRITE(RM9000x2_OCD_INTP0SET3, 4);
  73. break;
  74. case SMP_CALL_FUNCTION:
  75. if (cpu == 1)
  76. OCD_WRITE(RM9000x2_OCD_INTP1SET3, 2);
  77. else
  78. OCD_WRITE(RM9000x2_OCD_INTP0SET3, 2);
  79. break;
  80. }
  81. }
  82. static void yos_send_ipi_mask(const struct cpumask *mask, unsigned int action)
  83. {
  84. unsigned int i;
  85. for_each_cpu(i, mask)
  86. yos_send_ipi_single(i, action);
  87. }
  88. /*
  89. * After we've done initial boot, this function is called to allow the
  90. * board code to clean up state, if needed
  91. */
  92. static void __cpuinit yos_init_secondary(void)
  93. {
  94. set_c0_status(ST0_CO | ST0_IE | ST0_IM);
  95. }
  96. static void __cpuinit yos_smp_finish(void)
  97. {
  98. }
  99. /* Hook for after all CPUs are online */
  100. static void yos_cpus_done(void)
  101. {
  102. }
  103. /*
  104. * Firmware CPU startup hook
  105. * Complicated by PMON's weird interface which tries to minimic the UNIX fork.
  106. * It launches the next * available CPU and copies some information on the
  107. * stack so the first thing we do is throw away that stuff and load useful
  108. * values into the registers ...
  109. */
  110. static void __cpuinit yos_boot_secondary(int cpu, struct task_struct *idle)
  111. {
  112. unsigned long gp = (unsigned long) task_thread_info(idle);
  113. unsigned long sp = __KSTK_TOS(idle);
  114. secondary_sp = sp;
  115. secondary_gp = gp;
  116. spin_unlock(&launch_lock);
  117. }
  118. /*
  119. * Detect available CPUs, populate cpu_possible_map before smp_init
  120. *
  121. * We don't want to start the secondary CPU yet nor do we have a nice probing
  122. * feature in PMON so we just assume presence of the secondary core.
  123. */
  124. static void __init yos_smp_setup(void)
  125. {
  126. int i;
  127. cpus_clear(cpu_possible_map);
  128. for (i = 0; i < 2; i++) {
  129. cpu_set(i, cpu_possible_map);
  130. __cpu_number_map[i] = i;
  131. __cpu_logical_map[i] = i;
  132. }
  133. }
  134. static void __init yos_prepare_cpus(unsigned int max_cpus)
  135. {
  136. /*
  137. * Be paranoid. Enable the IPI only if we're really about to go SMP.
  138. */
  139. if (cpus_weight(cpu_possible_map))
  140. set_c0_status(STATUSF_IP5);
  141. }
  142. struct plat_smp_ops yos_smp_ops = {
  143. .send_ipi_single = yos_send_ipi_single,
  144. .send_ipi_mask = yos_send_ipi_mask,
  145. .init_secondary = yos_init_secondary,
  146. .smp_finish = yos_smp_finish,
  147. .cpus_done = yos_cpus_done,
  148. .boot_secondary = yos_boot_secondary,
  149. .smp_setup = yos_smp_setup,
  150. .prepare_cpus = yos_prepare_cpus,
  151. };