dma-default.c 8.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com>
  7. * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org>
  8. * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
  9. */
  10. #include <linux/types.h>
  11. #include <linux/dma-mapping.h>
  12. #include <linux/mm.h>
  13. #include <linux/module.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/string.h>
  16. #include <asm/cache.h>
  17. #include <asm/io.h>
  18. #include <dma-coherence.h>
  19. static inline unsigned long dma_addr_to_virt(struct device *dev,
  20. dma_addr_t dma_addr)
  21. {
  22. unsigned long addr = plat_dma_addr_to_phys(dev, dma_addr);
  23. return (unsigned long)phys_to_virt(addr);
  24. }
  25. /*
  26. * Warning on the terminology - Linux calls an uncached area coherent;
  27. * MIPS terminology calls memory areas with hardware maintained coherency
  28. * coherent.
  29. */
  30. static inline int cpu_is_noncoherent_r10000(struct device *dev)
  31. {
  32. return !plat_device_is_coherent(dev) &&
  33. (current_cpu_type() == CPU_R10000 ||
  34. current_cpu_type() == CPU_R12000);
  35. }
  36. static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  37. {
  38. /* ignore region specifiers */
  39. gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  40. #ifdef CONFIG_ZONE_DMA
  41. if (dev == NULL)
  42. gfp |= __GFP_DMA;
  43. else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
  44. gfp |= __GFP_DMA;
  45. else
  46. #endif
  47. #ifdef CONFIG_ZONE_DMA32
  48. if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  49. gfp |= __GFP_DMA32;
  50. else
  51. #endif
  52. ;
  53. /* Don't invoke OOM killer */
  54. gfp |= __GFP_NORETRY;
  55. return gfp;
  56. }
  57. void *dma_alloc_noncoherent(struct device *dev, size_t size,
  58. dma_addr_t * dma_handle, gfp_t gfp)
  59. {
  60. void *ret;
  61. gfp = massage_gfp_flags(dev, gfp);
  62. ret = (void *) __get_free_pages(gfp, get_order(size));
  63. if (ret != NULL) {
  64. memset(ret, 0, size);
  65. *dma_handle = plat_map_dma_mem(dev, ret, size);
  66. }
  67. return ret;
  68. }
  69. EXPORT_SYMBOL(dma_alloc_noncoherent);
  70. void *dma_alloc_coherent(struct device *dev, size_t size,
  71. dma_addr_t * dma_handle, gfp_t gfp)
  72. {
  73. void *ret;
  74. if (dma_alloc_from_coherent(dev, size, dma_handle, &ret))
  75. return ret;
  76. gfp = massage_gfp_flags(dev, gfp);
  77. ret = (void *) __get_free_pages(gfp, get_order(size));
  78. if (ret) {
  79. memset(ret, 0, size);
  80. *dma_handle = plat_map_dma_mem(dev, ret, size);
  81. if (!plat_device_is_coherent(dev)) {
  82. dma_cache_wback_inv((unsigned long) ret, size);
  83. ret = UNCAC_ADDR(ret);
  84. }
  85. }
  86. return ret;
  87. }
  88. EXPORT_SYMBOL(dma_alloc_coherent);
  89. void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
  90. dma_addr_t dma_handle)
  91. {
  92. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  93. free_pages((unsigned long) vaddr, get_order(size));
  94. }
  95. EXPORT_SYMBOL(dma_free_noncoherent);
  96. void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  97. dma_addr_t dma_handle)
  98. {
  99. unsigned long addr = (unsigned long) vaddr;
  100. int order = get_order(size);
  101. if (dma_release_from_coherent(dev, order, vaddr))
  102. return;
  103. plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
  104. if (!plat_device_is_coherent(dev))
  105. addr = CAC_ADDR(addr);
  106. free_pages(addr, get_order(size));
  107. }
  108. EXPORT_SYMBOL(dma_free_coherent);
  109. static inline void __dma_sync(unsigned long addr, size_t size,
  110. enum dma_data_direction direction)
  111. {
  112. switch (direction) {
  113. case DMA_TO_DEVICE:
  114. dma_cache_wback(addr, size);
  115. break;
  116. case DMA_FROM_DEVICE:
  117. dma_cache_inv(addr, size);
  118. break;
  119. case DMA_BIDIRECTIONAL:
  120. dma_cache_wback_inv(addr, size);
  121. break;
  122. default:
  123. BUG();
  124. }
  125. }
  126. dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  127. enum dma_data_direction direction)
  128. {
  129. unsigned long addr = (unsigned long) ptr;
  130. if (!plat_device_is_coherent(dev))
  131. __dma_sync(addr, size, direction);
  132. return plat_map_dma_mem(dev, ptr, size);
  133. }
  134. EXPORT_SYMBOL(dma_map_single);
  135. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  136. enum dma_data_direction direction)
  137. {
  138. if (cpu_is_noncoherent_r10000(dev))
  139. __dma_sync(dma_addr_to_virt(dev, dma_addr), size,
  140. direction);
  141. plat_unmap_dma_mem(dev, dma_addr, size, direction);
  142. }
  143. EXPORT_SYMBOL(dma_unmap_single);
  144. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  145. enum dma_data_direction direction)
  146. {
  147. int i;
  148. BUG_ON(direction == DMA_NONE);
  149. for (i = 0; i < nents; i++, sg++) {
  150. unsigned long addr;
  151. addr = (unsigned long) sg_virt(sg);
  152. if (!plat_device_is_coherent(dev) && addr)
  153. __dma_sync(addr, sg->length, direction);
  154. sg->dma_address = plat_map_dma_mem(dev,
  155. (void *)addr, sg->length);
  156. }
  157. return nents;
  158. }
  159. EXPORT_SYMBOL(dma_map_sg);
  160. dma_addr_t dma_map_page(struct device *dev, struct page *page,
  161. unsigned long offset, size_t size, enum dma_data_direction direction)
  162. {
  163. BUG_ON(direction == DMA_NONE);
  164. if (!plat_device_is_coherent(dev)) {
  165. unsigned long addr;
  166. addr = (unsigned long) page_address(page) + offset;
  167. __dma_sync(addr, size, direction);
  168. }
  169. return plat_map_dma_mem_page(dev, page) + offset;
  170. }
  171. EXPORT_SYMBOL(dma_map_page);
  172. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  173. enum dma_data_direction direction)
  174. {
  175. unsigned long addr;
  176. int i;
  177. BUG_ON(direction == DMA_NONE);
  178. for (i = 0; i < nhwentries; i++, sg++) {
  179. if (!plat_device_is_coherent(dev) &&
  180. direction != DMA_TO_DEVICE) {
  181. addr = (unsigned long) sg_virt(sg);
  182. if (addr)
  183. __dma_sync(addr, sg->length, direction);
  184. }
  185. plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
  186. }
  187. }
  188. EXPORT_SYMBOL(dma_unmap_sg);
  189. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
  190. size_t size, enum dma_data_direction direction)
  191. {
  192. BUG_ON(direction == DMA_NONE);
  193. if (cpu_is_noncoherent_r10000(dev)) {
  194. unsigned long addr;
  195. addr = dma_addr_to_virt(dev, dma_handle);
  196. __dma_sync(addr, size, direction);
  197. }
  198. }
  199. EXPORT_SYMBOL(dma_sync_single_for_cpu);
  200. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
  201. size_t size, enum dma_data_direction direction)
  202. {
  203. BUG_ON(direction == DMA_NONE);
  204. plat_extra_sync_for_device(dev);
  205. if (!plat_device_is_coherent(dev)) {
  206. unsigned long addr;
  207. addr = dma_addr_to_virt(dev, dma_handle);
  208. __dma_sync(addr, size, direction);
  209. }
  210. }
  211. EXPORT_SYMBOL(dma_sync_single_for_device);
  212. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  213. unsigned long offset, size_t size, enum dma_data_direction direction)
  214. {
  215. BUG_ON(direction == DMA_NONE);
  216. if (cpu_is_noncoherent_r10000(dev)) {
  217. unsigned long addr;
  218. addr = dma_addr_to_virt(dev, dma_handle);
  219. __dma_sync(addr + offset, size, direction);
  220. }
  221. }
  222. EXPORT_SYMBOL(dma_sync_single_range_for_cpu);
  223. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  224. unsigned long offset, size_t size, enum dma_data_direction direction)
  225. {
  226. BUG_ON(direction == DMA_NONE);
  227. plat_extra_sync_for_device(dev);
  228. if (!plat_device_is_coherent(dev)) {
  229. unsigned long addr;
  230. addr = dma_addr_to_virt(dev, dma_handle);
  231. __dma_sync(addr + offset, size, direction);
  232. }
  233. }
  234. EXPORT_SYMBOL(dma_sync_single_range_for_device);
  235. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  236. enum dma_data_direction direction)
  237. {
  238. int i;
  239. BUG_ON(direction == DMA_NONE);
  240. /* Make sure that gcc doesn't leave the empty loop body. */
  241. for (i = 0; i < nelems; i++, sg++) {
  242. if (cpu_is_noncoherent_r10000(dev))
  243. __dma_sync((unsigned long)page_address(sg_page(sg)),
  244. sg->length, direction);
  245. }
  246. }
  247. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  248. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  249. enum dma_data_direction direction)
  250. {
  251. int i;
  252. BUG_ON(direction == DMA_NONE);
  253. /* Make sure that gcc doesn't leave the empty loop body. */
  254. for (i = 0; i < nelems; i++, sg++) {
  255. if (!plat_device_is_coherent(dev))
  256. __dma_sync((unsigned long)page_address(sg_page(sg)),
  257. sg->length, direction);
  258. }
  259. }
  260. EXPORT_SYMBOL(dma_sync_sg_for_device);
  261. int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  262. {
  263. return plat_dma_mapping_error(dev, dma_addr);
  264. }
  265. EXPORT_SYMBOL(dma_mapping_error);
  266. int dma_supported(struct device *dev, u64 mask)
  267. {
  268. return plat_dma_supported(dev, mask);
  269. }
  270. EXPORT_SYMBOL(dma_supported);
  271. int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
  272. {
  273. return plat_device_is_coherent(dev);
  274. }
  275. EXPORT_SYMBOL(dma_is_consistent);
  276. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  277. enum dma_data_direction direction)
  278. {
  279. BUG_ON(direction == DMA_NONE);
  280. plat_extra_sync_for_device(dev);
  281. if (!plat_device_is_coherent(dev))
  282. __dma_sync((unsigned long)vaddr, size, direction);
  283. }
  284. EXPORT_SYMBOL(dma_cache_sync);