proc.c 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105
  1. /*
  2. * Copyright (C) 1995, 1996, 2001 Ralf Baechle
  3. * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
  4. * Copyright (C) 2004 Maciej W. Rozycki
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/kernel.h>
  8. #include <linux/sched.h>
  9. #include <linux/seq_file.h>
  10. #include <asm/bootinfo.h>
  11. #include <asm/cpu.h>
  12. #include <asm/cpu-features.h>
  13. #include <asm/mipsregs.h>
  14. #include <asm/processor.h>
  15. unsigned int vced_count, vcei_count;
  16. static int show_cpuinfo(struct seq_file *m, void *v)
  17. {
  18. unsigned long n = (unsigned long) v - 1;
  19. unsigned int version = cpu_data[n].processor_id;
  20. unsigned int fp_vers = cpu_data[n].fpu_id;
  21. char fmt [64];
  22. int i;
  23. #ifdef CONFIG_SMP
  24. if (!cpu_isset(n, cpu_online_map))
  25. return 0;
  26. #endif
  27. /*
  28. * For the first processor also print the system type
  29. */
  30. if (n == 0)
  31. seq_printf(m, "system type\t\t: %s\n", get_system_type());
  32. seq_printf(m, "processor\t\t: %ld\n", n);
  33. sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
  34. cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
  35. seq_printf(m, fmt, __cpu_name[n],
  36. (version >> 4) & 0x0f, version & 0x0f,
  37. (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
  38. seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
  39. cpu_data[n].udelay_val / (500000/HZ),
  40. (cpu_data[n].udelay_val / (5000/HZ)) % 100);
  41. seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
  42. seq_printf(m, "microsecond timers\t: %s\n",
  43. cpu_has_counter ? "yes" : "no");
  44. seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
  45. seq_printf(m, "extra interrupt vector\t: %s\n",
  46. cpu_has_divec ? "yes" : "no");
  47. seq_printf(m, "hardware watchpoint\t: %s",
  48. cpu_has_watch ? "yes, " : "no\n");
  49. if (cpu_has_watch) {
  50. seq_printf(m, "count: %d, address/irw mask: [",
  51. cpu_data[n].watch_reg_count);
  52. for (i = 0; i < cpu_data[n].watch_reg_count; i++)
  53. seq_printf(m, "%s0x%04x", i ? ", " : "" ,
  54. cpu_data[n].watch_reg_masks[i]);
  55. seq_printf(m, "]\n");
  56. }
  57. seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
  58. cpu_has_mips16 ? " mips16" : "",
  59. cpu_has_mdmx ? " mdmx" : "",
  60. cpu_has_mips3d ? " mips3d" : "",
  61. cpu_has_smartmips ? " smartmips" : "",
  62. cpu_has_dsp ? " dsp" : "",
  63. cpu_has_mipsmt ? " mt" : ""
  64. );
  65. seq_printf(m, "shadow register sets\t: %d\n",
  66. cpu_data[n].srsets);
  67. seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
  68. sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
  69. cpu_has_vce ? "%u" : "not available");
  70. seq_printf(m, fmt, 'D', vced_count);
  71. seq_printf(m, fmt, 'I', vcei_count);
  72. seq_printf(m, "\n");
  73. return 0;
  74. }
  75. static void *c_start(struct seq_file *m, loff_t *pos)
  76. {
  77. unsigned long i = *pos;
  78. return i < NR_CPUS ? (void *) (i + 1) : NULL;
  79. }
  80. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  81. {
  82. ++*pos;
  83. return c_start(m, pos);
  84. }
  85. static void c_stop(struct seq_file *m, void *v)
  86. {
  87. }
  88. const struct seq_operations cpuinfo_op = {
  89. .start = c_start,
  90. .next = c_next,
  91. .stop = c_stop,
  92. .show = show_cpuinfo,
  93. };