board_setup.c 4.8 KB

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  1. /*
  2. * Copyright 2002, 2008 MontaVista Software Inc.
  3. * Author: MontaVista Software, Inc. <source@mvista.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/gpio.h>
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <asm/mach-au1x00/au1000.h>
  30. #include <asm/mach-pb1x00/pb1100.h>
  31. #include <prom.h>
  32. struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
  33. { AU1000_GPIO_9, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card Fully_Inserted# */
  34. { AU1000_GPIO_10, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card STSCHG# */
  35. { AU1000_GPIO_11, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card IRQ# */
  36. { AU1000_GPIO_13, IRQF_TRIGGER_LOW, 0 }, /* DC_IRQ# */
  37. };
  38. const char *get_system_type(void)
  39. {
  40. return "Alchemy Pb1100";
  41. }
  42. void board_reset(void)
  43. {
  44. /* Hit BCSR.RST_VDDI[SOFT_RESET] */
  45. au_writel(0x00000000, PB1100_RST_VDDI);
  46. }
  47. void __init board_init_irq(void)
  48. {
  49. au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
  50. }
  51. void __init board_setup(void)
  52. {
  53. volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;
  54. char *argptr;
  55. argptr = prom_getcmdline();
  56. #ifdef CONFIG_SERIAL_8250_CONSOLE
  57. argptr = strstr(argptr, "console=");
  58. if (argptr == NULL) {
  59. argptr = prom_getcmdline();
  60. strcat(argptr, " console=ttyS0,115200");
  61. }
  62. #endif
  63. #ifdef CONFIG_FB_AU1100
  64. argptr = strstr(argptr, "video=");
  65. if (argptr == NULL) {
  66. argptr = prom_getcmdline();
  67. /* default panel */
  68. /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
  69. }
  70. #endif
  71. #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
  72. /* au1000 does not support vra, au1500 and au1100 do */
  73. strcat(argptr, " au1000_audio=vra");
  74. argptr = prom_getcmdline();
  75. #endif
  76. /* Set AUX clock to 12 MHz * 8 = 96 MHz */
  77. au_writel(8, SYS_AUXPLL);
  78. alchemy_gpio1_input_enable();
  79. udelay(100);
  80. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  81. {
  82. u32 pin_func, sys_freqctrl, sys_clksrc;
  83. /* Configure pins GPIO[14:9] as GPIO */
  84. pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
  85. /* Zero and disable FREQ2 */
  86. sys_freqctrl = au_readl(SYS_FREQCTRL0);
  87. sys_freqctrl &= ~0xFFF00000;
  88. au_writel(sys_freqctrl, SYS_FREQCTRL0);
  89. /* Zero and disable USBH/USBD/IrDA clock */
  90. sys_clksrc = au_readl(SYS_CLKSRC);
  91. sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
  92. au_writel(sys_clksrc, SYS_CLKSRC);
  93. sys_freqctrl = au_readl(SYS_FREQCTRL0);
  94. sys_freqctrl &= ~0xFFF00000;
  95. sys_clksrc = au_readl(SYS_CLKSRC);
  96. sys_clksrc &= ~(SYS_CS_CIR | SYS_CS_DIR | SYS_CS_MIR_MASK);
  97. /* FREQ2 = aux / 2 = 48 MHz */
  98. sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
  99. SYS_FC_FE2 | SYS_FC_FS2;
  100. au_writel(sys_freqctrl, SYS_FREQCTRL0);
  101. /*
  102. * Route 48 MHz FREQ2 into USBH/USBD/IrDA
  103. */
  104. sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MIR_BIT;
  105. au_writel(sys_clksrc, SYS_CLKSRC);
  106. /* Setup the static bus controller */
  107. au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
  108. au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
  109. au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
  110. /*
  111. * Get USB Functionality pin state (device vs host drive pins).
  112. */
  113. pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
  114. /* 2nd USB port is USB host. */
  115. pin_func |= SYS_PF_USB;
  116. au_writel(pin_func, SYS_PINFUNC);
  117. }
  118. #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
  119. /* Enable sys bus clock divider when IDLE state or no bus activity. */
  120. au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
  121. /* Enable the RTC if not already enabled. */
  122. if (!(readb(base + 0x28) & 0x20)) {
  123. writeb(readb(base + 0x28) | 0x20, base + 0x28);
  124. au_sync();
  125. }
  126. /* Put the clock in BCD mode. */
  127. if (readb(base + 0x2C) & 0x4) { /* reg B */
  128. writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
  129. au_sync();
  130. }
  131. }