entry.S 33 KB

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  1. /*
  2. * Low-level system-call handling, trap handlers and context-switching
  3. *
  4. * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
  5. * Copyright (C) 2008-2009 PetaLogix
  6. * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
  7. * Copyright (C) 2001,2002 NEC Corporation
  8. * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org>
  9. *
  10. * This file is subject to the terms and conditions of the GNU General
  11. * Public License. See the file COPYING in the main directory of this
  12. * archive for more details.
  13. *
  14. * Written by Miles Bader <miles@gnu.org>
  15. * Heavily modified by John Williams for Microblaze
  16. */
  17. #include <linux/sys.h>
  18. #include <linux/linkage.h>
  19. #include <asm/entry.h>
  20. #include <asm/current.h>
  21. #include <asm/processor.h>
  22. #include <asm/exceptions.h>
  23. #include <asm/asm-offsets.h>
  24. #include <asm/thread_info.h>
  25. #include <asm/page.h>
  26. #include <asm/unistd.h>
  27. #include <linux/errno.h>
  28. #include <asm/signal.h>
  29. /* The size of a state save frame. */
  30. #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
  31. /* The offset of the struct pt_regs in a `state save frame' on the stack. */
  32. #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */
  33. #define C_ENTRY(name) .globl name; .align 4; name
  34. /*
  35. * Various ways of setting and clearing BIP in flags reg.
  36. * This is mucky, but necessary using microblaze version that
  37. * allows msr ops to write to BIP
  38. */
  39. #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
  40. .macro clear_bip
  41. msrclr r11, MSR_BIP
  42. nop
  43. .endm
  44. .macro set_bip
  45. msrset r11, MSR_BIP
  46. nop
  47. .endm
  48. .macro clear_eip
  49. msrclr r11, MSR_EIP
  50. nop
  51. .endm
  52. .macro set_ee
  53. msrset r11, MSR_EE
  54. nop
  55. .endm
  56. .macro disable_irq
  57. msrclr r11, MSR_IE
  58. nop
  59. .endm
  60. .macro enable_irq
  61. msrset r11, MSR_IE
  62. nop
  63. .endm
  64. .macro set_ums
  65. msrset r11, MSR_UMS
  66. nop
  67. msrclr r11, MSR_VMS
  68. nop
  69. .endm
  70. .macro set_vms
  71. msrclr r11, MSR_UMS
  72. nop
  73. msrset r11, MSR_VMS
  74. nop
  75. .endm
  76. .macro clear_vms_ums
  77. msrclr r11, MSR_VMS
  78. nop
  79. msrclr r11, MSR_UMS
  80. nop
  81. .endm
  82. #else
  83. .macro clear_bip
  84. mfs r11, rmsr
  85. nop
  86. andi r11, r11, ~MSR_BIP
  87. mts rmsr, r11
  88. nop
  89. .endm
  90. .macro set_bip
  91. mfs r11, rmsr
  92. nop
  93. ori r11, r11, MSR_BIP
  94. mts rmsr, r11
  95. nop
  96. .endm
  97. .macro clear_eip
  98. mfs r11, rmsr
  99. nop
  100. andi r11, r11, ~MSR_EIP
  101. mts rmsr, r11
  102. nop
  103. .endm
  104. .macro set_ee
  105. mfs r11, rmsr
  106. nop
  107. ori r11, r11, MSR_EE
  108. mts rmsr, r11
  109. nop
  110. .endm
  111. .macro disable_irq
  112. mfs r11, rmsr
  113. nop
  114. andi r11, r11, ~MSR_IE
  115. mts rmsr, r11
  116. nop
  117. .endm
  118. .macro enable_irq
  119. mfs r11, rmsr
  120. nop
  121. ori r11, r11, MSR_IE
  122. mts rmsr, r11
  123. nop
  124. .endm
  125. .macro set_ums
  126. mfs r11, rmsr
  127. nop
  128. ori r11, r11, MSR_VMS
  129. andni r11, r11, MSR_UMS
  130. mts rmsr, r11
  131. nop
  132. .endm
  133. .macro set_vms
  134. mfs r11, rmsr
  135. nop
  136. ori r11, r11, MSR_VMS
  137. andni r11, r11, MSR_UMS
  138. mts rmsr, r11
  139. nop
  140. .endm
  141. .macro clear_vms_ums
  142. mfs r11, rmsr
  143. nop
  144. andni r11, r11, (MSR_VMS|MSR_UMS)
  145. mts rmsr,r11
  146. nop
  147. .endm
  148. #endif
  149. /* Define how to call high-level functions. With MMU, virtual mode must be
  150. * enabled when calling the high-level function. Clobbers R11.
  151. * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
  152. */
  153. /* turn on virtual protected mode save */
  154. #define VM_ON \
  155. set_ums; \
  156. rted r0, 2f; \
  157. 2: nop;
  158. /* turn off virtual protected mode save and user mode save*/
  159. #define VM_OFF \
  160. clear_vms_ums; \
  161. rted r0, TOPHYS(1f); \
  162. 1: nop;
  163. #define SAVE_REGS \
  164. swi r2, r1, PTO+PT_R2; /* Save SDA */ \
  165. swi r5, r1, PTO+PT_R5; \
  166. swi r6, r1, PTO+PT_R6; \
  167. swi r7, r1, PTO+PT_R7; \
  168. swi r8, r1, PTO+PT_R8; \
  169. swi r9, r1, PTO+PT_R9; \
  170. swi r10, r1, PTO+PT_R10; \
  171. swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\
  172. swi r12, r1, PTO+PT_R12; \
  173. swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \
  174. swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \
  175. swi r15, r1, PTO+PT_R15; /* Save LP */ \
  176. swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \
  177. swi r19, r1, PTO+PT_R19; \
  178. swi r20, r1, PTO+PT_R20; \
  179. swi r21, r1, PTO+PT_R21; \
  180. swi r22, r1, PTO+PT_R22; \
  181. swi r23, r1, PTO+PT_R23; \
  182. swi r24, r1, PTO+PT_R24; \
  183. swi r25, r1, PTO+PT_R25; \
  184. swi r26, r1, PTO+PT_R26; \
  185. swi r27, r1, PTO+PT_R27; \
  186. swi r28, r1, PTO+PT_R28; \
  187. swi r29, r1, PTO+PT_R29; \
  188. swi r30, r1, PTO+PT_R30; \
  189. swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
  190. mfs r11, rmsr; /* save MSR */ \
  191. nop; \
  192. swi r11, r1, PTO+PT_MSR;
  193. #define RESTORE_REGS \
  194. lwi r11, r1, PTO+PT_MSR; \
  195. mts rmsr , r11; \
  196. nop; \
  197. lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
  198. lwi r5, r1, PTO+PT_R5; \
  199. lwi r6, r1, PTO+PT_R6; \
  200. lwi r7, r1, PTO+PT_R7; \
  201. lwi r8, r1, PTO+PT_R8; \
  202. lwi r9, r1, PTO+PT_R9; \
  203. lwi r10, r1, PTO+PT_R10; \
  204. lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\
  205. lwi r12, r1, PTO+PT_R12; \
  206. lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \
  207. lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
  208. lwi r15, r1, PTO+PT_R15; /* restore LP */ \
  209. lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \
  210. lwi r19, r1, PTO+PT_R19; \
  211. lwi r20, r1, PTO+PT_R20; \
  212. lwi r21, r1, PTO+PT_R21; \
  213. lwi r22, r1, PTO+PT_R22; \
  214. lwi r23, r1, PTO+PT_R23; \
  215. lwi r24, r1, PTO+PT_R24; \
  216. lwi r25, r1, PTO+PT_R25; \
  217. lwi r26, r1, PTO+PT_R26; \
  218. lwi r27, r1, PTO+PT_R27; \
  219. lwi r28, r1, PTO+PT_R28; \
  220. lwi r29, r1, PTO+PT_R29; \
  221. lwi r30, r1, PTO+PT_R30; \
  222. lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */
  223. .text
  224. /*
  225. * User trap.
  226. *
  227. * System calls are handled here.
  228. *
  229. * Syscall protocol:
  230. * Syscall number in r12, args in r5-r10
  231. * Return value in r3
  232. *
  233. * Trap entered via brki instruction, so BIP bit is set, and interrupts
  234. * are masked. This is nice, means we don't have to CLI before state save
  235. */
  236. C_ENTRY(_user_exception):
  237. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
  238. addi r14, r14, 4 /* return address is 4 byte after call */
  239. swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
  240. lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
  241. beqi r11, 1f; /* Jump ahead if coming from user */
  242. /* Kernel-mode state save. */
  243. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
  244. tophys(r1,r11);
  245. swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
  246. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
  247. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
  248. SAVE_REGS
  249. addi r11, r0, 1; /* Was in kernel-mode. */
  250. swi r11, r1, PTO+PT_MODE; /* pt_regs -> kernel mode */
  251. brid 2f;
  252. nop; /* Fill delay slot */
  253. /* User-mode state save. */
  254. 1:
  255. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
  256. lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
  257. tophys(r1,r1);
  258. lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
  259. /* calculate kernel stack pointer from task struct 8k */
  260. addik r1, r1, THREAD_SIZE;
  261. tophys(r1,r1);
  262. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
  263. SAVE_REGS
  264. swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
  265. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
  266. swi r11, r1, PTO+PT_R1; /* Store user SP. */
  267. addi r11, r0, 1;
  268. swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */
  269. 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
  270. /* Save away the syscall number. */
  271. swi r12, r1, PTO+PT_R0;
  272. tovirt(r1,r1)
  273. /* where the trap should return need -8 to adjust for rtsd r15, 8*/
  274. /* Jump to the appropriate function for the system call number in r12
  275. * (r12 is not preserved), or return an error if r12 is not valid. The LP
  276. * register should point to the location where
  277. * the called function should return. [note that MAKE_SYS_CALL uses label 1] */
  278. # Step into virtual mode.
  279. set_vms;
  280. addik r11, r0, 3f
  281. rtid r11, 0
  282. nop
  283. 3:
  284. add r11, r0, CURRENT_TASK /* Get current task ptr into r11 */
  285. lwi r11, r11, TS_THREAD_INFO /* get thread info */
  286. lwi r11, r11, TI_FLAGS /* get flags in thread info */
  287. andi r11, r11, _TIF_WORK_SYSCALL_MASK
  288. beqi r11, 4f
  289. addik r3, r0, -ENOSYS
  290. swi r3, r1, PTO + PT_R3
  291. brlid r15, do_syscall_trace_enter
  292. addik r5, r1, PTO + PT_R0
  293. # do_syscall_trace_enter returns the new syscall nr.
  294. addk r12, r0, r3
  295. lwi r5, r1, PTO+PT_R5;
  296. lwi r6, r1, PTO+PT_R6;
  297. lwi r7, r1, PTO+PT_R7;
  298. lwi r8, r1, PTO+PT_R8;
  299. lwi r9, r1, PTO+PT_R9;
  300. lwi r10, r1, PTO+PT_R10;
  301. 4:
  302. /* Jump to the appropriate function for the system call number in r12
  303. * (r12 is not preserved), or return an error if r12 is not valid.
  304. * The LP register should point to the location where the called function
  305. * should return. [note that MAKE_SYS_CALL uses label 1] */
  306. /* See if the system call number is valid */
  307. addi r11, r12, -__NR_syscalls;
  308. bgei r11,5f;
  309. /* Figure out which function to use for this system call. */
  310. /* Note Microblaze barrel shift is optional, so don't rely on it */
  311. add r12, r12, r12; /* convert num -> ptr */
  312. add r12, r12, r12;
  313. /* Trac syscalls and stored them to r0_ram */
  314. lwi r3, r12, 0x400 + r0_ram
  315. addi r3, r3, 1
  316. swi r3, r12, 0x400 + r0_ram
  317. # Find and jump into the syscall handler.
  318. lwi r12, r12, sys_call_table
  319. /* where the trap should return need -8 to adjust for rtsd r15, 8 */
  320. la r15, r0, ret_from_trap-8
  321. bra r12
  322. /* The syscall number is invalid, return an error. */
  323. 5:
  324. addi r3, r0, -ENOSYS;
  325. rtsd r15,8; /* looks like a normal subroutine return */
  326. or r0, r0, r0
  327. /* Entry point used to return from a syscall/trap */
  328. /* We re-enable BIP bit before state restore */
  329. C_ENTRY(ret_from_trap):
  330. set_bip; /* Ints masked for state restore*/
  331. lwi r11, r1, PTO+PT_MODE;
  332. /* See if returning to kernel mode, if so, skip resched &c. */
  333. bnei r11, 2f;
  334. /* We're returning to user mode, so check for various conditions that
  335. * trigger rescheduling. */
  336. # FIXME: Restructure all these flag checks.
  337. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  338. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  339. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  340. andi r11, r11, _TIF_WORK_SYSCALL_MASK
  341. beqi r11, 1f
  342. swi r3, r1, PTO + PT_R3
  343. swi r4, r1, PTO + PT_R4
  344. brlid r15, do_syscall_trace_leave
  345. addik r5, r1, PTO + PT_R0
  346. lwi r3, r1, PTO + PT_R3
  347. lwi r4, r1, PTO + PT_R4
  348. 1:
  349. /* We're returning to user mode, so check for various conditions that
  350. * trigger rescheduling. */
  351. /* Get current task ptr into r11 */
  352. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  353. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  354. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  355. andi r11, r11, _TIF_NEED_RESCHED;
  356. beqi r11, 5f;
  357. swi r3, r1, PTO + PT_R3; /* store syscall result */
  358. swi r4, r1, PTO + PT_R4;
  359. bralid r15, schedule; /* Call scheduler */
  360. nop; /* delay slot */
  361. lwi r3, r1, PTO + PT_R3; /* restore syscall result */
  362. lwi r4, r1, PTO + PT_R4;
  363. /* Maybe handle a signal */
  364. 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  365. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  366. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  367. andi r11, r11, _TIF_SIGPENDING;
  368. beqi r11, 1f; /* Signals to handle, handle them */
  369. swi r3, r1, PTO + PT_R3; /* store syscall result */
  370. swi r4, r1, PTO + PT_R4;
  371. la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
  372. add r6, r0, r0; /* Arg 2: sigset_t *oldset */
  373. addi r7, r0, 1; /* Arg 3: int in_syscall */
  374. bralid r15, do_signal; /* Handle any signals */
  375. nop;
  376. lwi r3, r1, PTO + PT_R3; /* restore syscall result */
  377. lwi r4, r1, PTO + PT_R4;
  378. /* Finally, return to user state. */
  379. 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
  380. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  381. swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
  382. VM_OFF;
  383. tophys(r1,r1);
  384. RESTORE_REGS;
  385. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  386. lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
  387. bri 6f;
  388. /* Return to kernel state. */
  389. 2: VM_OFF;
  390. tophys(r1,r1);
  391. RESTORE_REGS;
  392. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  393. tovirt(r1,r1);
  394. 6:
  395. TRAP_return: /* Make global symbol for debugging */
  396. rtbd r14, 0; /* Instructions to return from an IRQ */
  397. nop;
  398. /* These syscalls need access to the struct pt_regs on the stack, so we
  399. implement them in assembly (they're basically all wrappers anyway). */
  400. C_ENTRY(sys_fork_wrapper):
  401. addi r5, r0, SIGCHLD /* Arg 0: flags */
  402. lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */
  403. la r7, r1, PTO /* Arg 2: parent context */
  404. add r8. r0, r0 /* Arg 3: (unused) */
  405. add r9, r0, r0; /* Arg 4: (unused) */
  406. add r10, r0, r0; /* Arg 5: (unused) */
  407. brid do_fork /* Do real work (tail-call) */
  408. nop;
  409. /* This the initial entry point for a new child thread, with an appropriate
  410. stack in place that makes it look the the child is in the middle of an
  411. syscall. This function is actually `returned to' from switch_thread
  412. (copy_thread makes ret_from_fork the return address in each new thread's
  413. saved context). */
  414. C_ENTRY(ret_from_fork):
  415. bralid r15, schedule_tail; /* ...which is schedule_tail's arg */
  416. add r3, r5, r0; /* switch_thread returns the prev task */
  417. /* ( in the delay slot ) */
  418. add r3, r0, r0; /* Child's fork call should return 0. */
  419. brid ret_from_trap; /* Do normal trap return */
  420. nop;
  421. C_ENTRY(sys_vfork):
  422. brid microblaze_vfork /* Do real work (tail-call) */
  423. la r5, r1, PTO
  424. C_ENTRY(sys_clone):
  425. bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */
  426. lwi r6, r1, PTO+PT_R1; /* If so, use paret's stack ptr */
  427. 1: la r7, r1, PTO; /* Arg 2: parent context */
  428. add r8, r0, r0; /* Arg 3: (unused) */
  429. add r9, r0, r0; /* Arg 4: (unused) */
  430. add r10, r0, r0; /* Arg 5: (unused) */
  431. brid do_fork /* Do real work (tail-call) */
  432. nop;
  433. C_ENTRY(sys_execve):
  434. la r8, r1, PTO; /* add user context as 4th arg */
  435. brid microblaze_execve; /* Do real work (tail-call).*/
  436. nop;
  437. C_ENTRY(sys_rt_sigsuspend_wrapper):
  438. swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  439. swi r4, r1, PTO+PT_R4;
  440. la r7, r1, PTO; /* add user context as 3rd arg */
  441. brlid r15, sys_rt_sigsuspend; /* Do real work.*/
  442. nop;
  443. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  444. lwi r4, r1, PTO+PT_R4;
  445. bri ret_from_trap /* fall through will not work here due to align */
  446. nop;
  447. C_ENTRY(sys_rt_sigreturn_wrapper):
  448. swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  449. swi r4, r1, PTO+PT_R4;
  450. la r5, r1, PTO; /* add user context as 1st arg */
  451. brlid r15, sys_rt_sigreturn /* Do real work */
  452. nop;
  453. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  454. lwi r4, r1, PTO+PT_R4;
  455. bri ret_from_trap /* fall through will not work here due to align */
  456. nop;
  457. /*
  458. * HW EXCEPTION rutine start
  459. */
  460. #define SAVE_STATE \
  461. swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ \
  462. set_bip; /*equalize initial state for all possible entries*/\
  463. clear_eip; \
  464. enable_irq; \
  465. set_ee; \
  466. /* See if already in kernel mode.*/ \
  467. lwi r11, r0, TOPHYS(PER_CPU(KM)); \
  468. beqi r11, 1f; /* Jump ahead if coming from user */\
  469. /* Kernel-mode state save. */ \
  470. /* Reload kernel stack-ptr. */ \
  471. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
  472. tophys(r1,r11); \
  473. swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ \
  474. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
  475. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
  476. /* store return registers separately because \
  477. * this macros is use for others exceptions */ \
  478. swi r3, r1, PTO + PT_R3; \
  479. swi r4, r1, PTO + PT_R4; \
  480. SAVE_REGS \
  481. /* PC, before IRQ/trap - this is one instruction above */ \
  482. swi r17, r1, PTO+PT_PC; \
  483. \
  484. addi r11, r0, 1; /* Was in kernel-mode. */ \
  485. swi r11, r1, PTO+PT_MODE; \
  486. brid 2f; \
  487. nop; /* Fill delay slot */ \
  488. 1: /* User-mode state save. */ \
  489. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
  490. lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
  491. tophys(r1,r1); \
  492. lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \
  493. addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */\
  494. tophys(r1,r1); \
  495. \
  496. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
  497. /* store return registers separately because this macros \
  498. * is use for others exceptions */ \
  499. swi r3, r1, PTO + PT_R3; \
  500. swi r4, r1, PTO + PT_R4; \
  501. SAVE_REGS \
  502. /* PC, before IRQ/trap - this is one instruction above FIXME*/ \
  503. swi r17, r1, PTO+PT_PC; \
  504. \
  505. swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ \
  506. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
  507. swi r11, r1, PTO+PT_R1; /* Store user SP. */ \
  508. addi r11, r0, 1; \
  509. swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode.*/\
  510. 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
  511. /* Save away the syscall number. */ \
  512. swi r0, r1, PTO+PT_R0; \
  513. tovirt(r1,r1)
  514. C_ENTRY(full_exception_trap):
  515. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
  516. /* adjust exception address for privileged instruction
  517. * for finding where is it */
  518. addik r17, r17, -4
  519. SAVE_STATE /* Save registers */
  520. /* FIXME this can be store directly in PT_ESR reg.
  521. * I tested it but there is a fault */
  522. /* where the trap should return need -8 to adjust for rtsd r15, 8 */
  523. la r15, r0, ret_from_exc - 8
  524. la r5, r1, PTO /* parameter struct pt_regs * regs */
  525. mfs r6, resr
  526. nop
  527. mfs r7, rfsr; /* save FSR */
  528. nop
  529. mts rfsr, r0; /* Clear sticky fsr */
  530. nop
  531. la r12, r0, full_exception
  532. set_vms;
  533. rtbd r12, 0;
  534. nop;
  535. /*
  536. * Unaligned data trap.
  537. *
  538. * Unaligned data trap last on 4k page is handled here.
  539. *
  540. * Trap entered via exception, so EE bit is set, and interrupts
  541. * are masked. This is nice, means we don't have to CLI before state save
  542. *
  543. * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
  544. */
  545. C_ENTRY(unaligned_data_trap):
  546. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
  547. SAVE_STATE /* Save registers.*/
  548. /* where the trap should return need -8 to adjust for rtsd r15, 8 */
  549. la r15, r0, ret_from_exc-8
  550. mfs r3, resr /* ESR */
  551. nop
  552. mfs r4, rear /* EAR */
  553. nop
  554. la r7, r1, PTO /* parameter struct pt_regs * regs */
  555. la r12, r0, _unaligned_data_exception
  556. set_vms;
  557. rtbd r12, 0; /* interrupts enabled */
  558. nop;
  559. /*
  560. * Page fault traps.
  561. *
  562. * If the real exception handler (from hw_exception_handler.S) didn't find
  563. * the mapping for the process, then we're thrown here to handle such situation.
  564. *
  565. * Trap entered via exceptions, so EE bit is set, and interrupts
  566. * are masked. This is nice, means we don't have to CLI before state save
  567. *
  568. * Build a standard exception frame for TLB Access errors. All TLB exceptions
  569. * will bail out to this point if they can't resolve the lightweight TLB fault.
  570. *
  571. * The C function called is in "arch/microblaze/mm/fault.c", declared as:
  572. * void do_page_fault(struct pt_regs *regs,
  573. * unsigned long address,
  574. * unsigned long error_code)
  575. */
  576. /* data and intruction trap - which is choose is resolved int fault.c */
  577. C_ENTRY(page_fault_data_trap):
  578. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
  579. SAVE_STATE /* Save registers.*/
  580. /* where the trap should return need -8 to adjust for rtsd r15, 8 */
  581. la r15, r0, ret_from_exc-8
  582. la r5, r1, PTO /* parameter struct pt_regs * regs */
  583. mfs r6, rear /* parameter unsigned long address */
  584. nop
  585. mfs r7, resr /* parameter unsigned long error_code */
  586. nop
  587. la r12, r0, do_page_fault
  588. set_vms;
  589. rtbd r12, 0; /* interrupts enabled */
  590. nop;
  591. C_ENTRY(page_fault_instr_trap):
  592. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
  593. SAVE_STATE /* Save registers.*/
  594. /* where the trap should return need -8 to adjust for rtsd r15, 8 */
  595. la r15, r0, ret_from_exc-8
  596. la r5, r1, PTO /* parameter struct pt_regs * regs */
  597. mfs r6, rear /* parameter unsigned long address */
  598. nop
  599. ori r7, r0, 0 /* parameter unsigned long error_code */
  600. la r12, r0, do_page_fault
  601. set_vms;
  602. rtbd r12, 0; /* interrupts enabled */
  603. nop;
  604. /* Entry point used to return from an exception. */
  605. C_ENTRY(ret_from_exc):
  606. set_bip; /* Ints masked for state restore*/
  607. lwi r11, r1, PTO+PT_MODE;
  608. bnei r11, 2f; /* See if returning to kernel mode, */
  609. /* ... if so, skip resched &c. */
  610. /* We're returning to user mode, so check for various conditions that
  611. trigger rescheduling. */
  612. /* Get current task ptr into r11 */
  613. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  614. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  615. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  616. andi r11, r11, _TIF_NEED_RESCHED;
  617. beqi r11, 5f;
  618. /* Call the scheduler before returning from a syscall/trap. */
  619. bralid r15, schedule; /* Call scheduler */
  620. nop; /* delay slot */
  621. /* Maybe handle a signal */
  622. 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  623. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  624. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  625. andi r11, r11, _TIF_SIGPENDING;
  626. beqi r11, 1f; /* Signals to handle, handle them */
  627. /*
  628. * Handle a signal return; Pending signals should be in r18.
  629. *
  630. * Not all registers are saved by the normal trap/interrupt entry
  631. * points (for instance, call-saved registers (because the normal
  632. * C-compiler calling sequence in the kernel makes sure they're
  633. * preserved), and call-clobbered registers in the case of
  634. * traps), but signal handlers may want to examine or change the
  635. * complete register state. Here we save anything not saved by
  636. * the normal entry sequence, so that it may be safely restored
  637. * (in a possibly modified form) after do_signal returns.
  638. * store return registers separately because this macros is use
  639. * for others exceptions */
  640. swi r3, r1, PTO + PT_R3;
  641. swi r4, r1, PTO + PT_R4;
  642. la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
  643. add r6, r0, r0; /* Arg 2: sigset_t *oldset */
  644. addi r7, r0, 0; /* Arg 3: int in_syscall */
  645. bralid r15, do_signal; /* Handle any signals */
  646. nop;
  647. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  648. lwi r4, r1, PTO+PT_R4;
  649. /* Finally, return to user state. */
  650. 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
  651. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  652. swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
  653. VM_OFF;
  654. tophys(r1,r1);
  655. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  656. lwi r4, r1, PTO+PT_R4;
  657. RESTORE_REGS;
  658. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  659. lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
  660. bri 6f;
  661. /* Return to kernel state. */
  662. 2: VM_OFF;
  663. tophys(r1,r1);
  664. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  665. lwi r4, r1, PTO+PT_R4;
  666. RESTORE_REGS;
  667. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  668. tovirt(r1,r1);
  669. 6:
  670. EXC_return: /* Make global symbol for debugging */
  671. rtbd r14, 0; /* Instructions to return from an IRQ */
  672. nop;
  673. /*
  674. * HW EXCEPTION rutine end
  675. */
  676. /*
  677. * Hardware maskable interrupts.
  678. *
  679. * The stack-pointer (r1) should have already been saved to the memory
  680. * location PER_CPU(ENTRY_SP).
  681. */
  682. C_ENTRY(_interrupt):
  683. /* MS: we are in physical address */
  684. /* Save registers, switch to proper stack, convert SP to virtual.*/
  685. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
  686. swi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
  687. /* MS: See if already in kernel mode. */
  688. lwi r11, r0, TOPHYS(PER_CPU(KM));
  689. beqi r11, 1f; /* MS: Jump ahead if coming from user */
  690. /* Kernel-mode state save. */
  691. or r11, r1, r0
  692. tophys(r1,r11); /* MS: I have in r1 physical address where stack is */
  693. /* MS: Save original SP - position PT_R1 to next stack frame 4 *1 - 152*/
  694. swi r11, r1, (PT_R1 - PT_SIZE);
  695. /* MS: restore r11 because of saving in SAVE_REGS */
  696. lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
  697. /* save registers */
  698. /* MS: Make room on the stack -> activation record */
  699. addik r1, r1, -STATE_SAVE_SIZE;
  700. /* MS: store return registers separately because
  701. * this macros is use for others exceptions */
  702. swi r3, r1, PTO + PT_R3;
  703. swi r4, r1, PTO + PT_R4;
  704. SAVE_REGS
  705. /* MS: store mode */
  706. addi r11, r0, 1; /* MS: Was in kernel-mode. */
  707. swi r11, r1, PTO + PT_MODE; /* MS: and save it */
  708. brid 2f;
  709. nop; /* MS: Fill delay slot */
  710. 1:
  711. /* User-mode state save. */
  712. /* MS: restore r11 -> FIXME move before SAVE_REG */
  713. lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
  714. /* MS: get the saved current */
  715. lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
  716. tophys(r1,r1);
  717. lwi r1, r1, TS_THREAD_INFO;
  718. addik r1, r1, THREAD_SIZE;
  719. tophys(r1,r1);
  720. /* save registers */
  721. addik r1, r1, -STATE_SAVE_SIZE;
  722. swi r3, r1, PTO+PT_R3;
  723. swi r4, r1, PTO+PT_R4;
  724. SAVE_REGS
  725. /* calculate mode */
  726. swi r0, r1, PTO + PT_MODE;
  727. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
  728. swi r11, r1, PTO+PT_R1;
  729. /* setup kernel mode to KM */
  730. addi r11, r0, 1;
  731. swi r11, r0, TOPHYS(PER_CPU(KM));
  732. 2:
  733. lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
  734. swi r0, r1, PTO + PT_R0;
  735. tovirt(r1,r1)
  736. la r5, r1, PTO;
  737. set_vms;
  738. la r11, r0, do_IRQ;
  739. la r15, r0, irq_call;
  740. irq_call:rtbd r11, 0;
  741. nop;
  742. /* MS: we are in virtual mode */
  743. ret_from_irq:
  744. lwi r11, r1, PTO + PT_MODE;
  745. bnei r11, 2f;
  746. add r11, r0, CURRENT_TASK;
  747. lwi r11, r11, TS_THREAD_INFO;
  748. lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */
  749. andi r11, r11, _TIF_NEED_RESCHED;
  750. beqi r11, 5f
  751. bralid r15, schedule;
  752. nop; /* delay slot */
  753. /* Maybe handle a signal */
  754. 5: add r11, r0, CURRENT_TASK;
  755. lwi r11, r11, TS_THREAD_INFO; /* MS: get thread info */
  756. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  757. andi r11, r11, _TIF_SIGPENDING;
  758. beqid r11, no_intr_resched
  759. /* Handle a signal return; Pending signals should be in r18. */
  760. addi r7, r0, 0; /* Arg 3: int in_syscall */
  761. la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
  762. bralid r15, do_signal; /* Handle any signals */
  763. add r6, r0, r0; /* Arg 2: sigset_t *oldset */
  764. /* Finally, return to user state. */
  765. no_intr_resched:
  766. /* Disable interrupts, we are now committed to the state restore */
  767. disable_irq
  768. swi r0, r0, PER_CPU(KM); /* MS: Now officially in user state. */
  769. add r11, r0, CURRENT_TASK;
  770. swi r11, r0, PER_CPU(CURRENT_SAVE);
  771. VM_OFF;
  772. tophys(r1,r1);
  773. lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
  774. lwi r4, r1, PTO + PT_R4;
  775. RESTORE_REGS
  776. addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
  777. lwi r1, r1, PT_R1 - PT_SIZE;
  778. bri 6f;
  779. /* MS: Return to kernel state. */
  780. 2: VM_OFF /* MS: turn off MMU */
  781. tophys(r1,r1)
  782. lwi r3, r1, PTO + PT_R3; /* MS: restore saved r3, r4 registers */
  783. lwi r4, r1, PTO + PT_R4;
  784. RESTORE_REGS
  785. addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
  786. tovirt(r1,r1);
  787. 6:
  788. IRQ_return: /* MS: Make global symbol for debugging */
  789. rtid r14, 0
  790. nop
  791. /*
  792. * `Debug' trap
  793. * We enter dbtrap in "BIP" (breakpoint) mode.
  794. * So we exit the breakpoint mode with an 'rtbd' and proceed with the
  795. * original dbtrap.
  796. * however, wait to save state first
  797. */
  798. C_ENTRY(_debug_exception):
  799. /* BIP bit is set on entry, no interrupts can occur */
  800. swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
  801. swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
  802. set_bip; /*equalize initial state for all possible entries*/
  803. clear_eip;
  804. enable_irq;
  805. lwi r11, r0, TOPHYS(PER_CPU(KM));/* See if already in kernel mode.*/
  806. beqi r11, 1f; /* Jump ahead if coming from user */
  807. /* Kernel-mode state save. */
  808. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
  809. tophys(r1,r11);
  810. swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
  811. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
  812. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
  813. swi r3, r1, PTO + PT_R3;
  814. swi r4, r1, PTO + PT_R4;
  815. SAVE_REGS;
  816. addi r11, r0, 1; /* Was in kernel-mode. */
  817. swi r11, r1, PTO + PT_MODE;
  818. brid 2f;
  819. nop; /* Fill delay slot */
  820. 1: /* User-mode state save. */
  821. lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
  822. lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
  823. tophys(r1,r1);
  824. lwi r1, r1, TS_THREAD_INFO; /* get the thread info */
  825. addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
  826. tophys(r1,r1);
  827. addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
  828. swi r3, r1, PTO + PT_R3;
  829. swi r4, r1, PTO + PT_R4;
  830. SAVE_REGS;
  831. swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
  832. lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
  833. swi r11, r1, PTO+PT_R1; /* Store user SP. */
  834. addi r11, r0, 1;
  835. swi r11, r0, TOPHYS(PER_CPU(KM)); /* Now we're in kernel-mode. */
  836. 2: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
  837. /* Save away the syscall number. */
  838. swi r0, r1, PTO+PT_R0;
  839. tovirt(r1,r1)
  840. addi r5, r0, SIGTRAP /* send the trap signal */
  841. add r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  842. addk r7, r0, r0 /* 3rd param zero */
  843. set_vms;
  844. la r11, r0, send_sig;
  845. la r15, r0, dbtrap_call;
  846. dbtrap_call: rtbd r11, 0;
  847. nop;
  848. set_bip; /* Ints masked for state restore*/
  849. lwi r11, r1, PTO+PT_MODE;
  850. bnei r11, 2f;
  851. /* Get current task ptr into r11 */
  852. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  853. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  854. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  855. andi r11, r11, _TIF_NEED_RESCHED;
  856. beqi r11, 5f;
  857. /* Call the scheduler before returning from a syscall/trap. */
  858. bralid r15, schedule; /* Call scheduler */
  859. nop; /* delay slot */
  860. /* XXX Is PT_DTRACE handling needed here? */
  861. /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here. */
  862. /* Maybe handle a signal */
  863. 5: add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  864. lwi r11, r11, TS_THREAD_INFO; /* get thread info */
  865. lwi r11, r11, TI_FLAGS; /* get flags in thread info */
  866. andi r11, r11, _TIF_SIGPENDING;
  867. beqi r11, 1f; /* Signals to handle, handle them */
  868. /* Handle a signal return; Pending signals should be in r18. */
  869. /* Not all registers are saved by the normal trap/interrupt entry
  870. points (for instance, call-saved registers (because the normal
  871. C-compiler calling sequence in the kernel makes sure they're
  872. preserved), and call-clobbered registers in the case of
  873. traps), but signal handlers may want to examine or change the
  874. complete register state. Here we save anything not saved by
  875. the normal entry sequence, so that it may be safely restored
  876. (in a possibly modified form) after do_signal returns. */
  877. la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
  878. add r6, r0, r0; /* Arg 2: sigset_t *oldset */
  879. addi r7, r0, 0; /* Arg 3: int in_syscall */
  880. bralid r15, do_signal; /* Handle any signals */
  881. nop;
  882. /* Finally, return to user state. */
  883. 1: swi r0, r0, PER_CPU(KM); /* Now officially in user state. */
  884. add r11, r0, CURRENT_TASK; /* Get current task ptr into r11 */
  885. swi r11, r0, PER_CPU(CURRENT_SAVE); /* save current */
  886. VM_OFF;
  887. tophys(r1,r1);
  888. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  889. lwi r4, r1, PTO+PT_R4;
  890. RESTORE_REGS
  891. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  892. lwi r1, r1, PT_R1 - PT_SIZE;
  893. /* Restore user stack pointer. */
  894. bri 6f;
  895. /* Return to kernel state. */
  896. 2: VM_OFF;
  897. tophys(r1,r1);
  898. lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
  899. lwi r4, r1, PTO+PT_R4;
  900. RESTORE_REGS
  901. addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
  902. tovirt(r1,r1);
  903. 6:
  904. DBTRAP_return: /* Make global symbol for debugging */
  905. rtbd r14, 0; /* Instructions to return from an IRQ */
  906. nop;
  907. ENTRY(_switch_to)
  908. /* prepare return value */
  909. addk r3, r0, r31
  910. /* save registers in cpu_context */
  911. /* use r11 and r12, volatile registers, as temp register */
  912. /* give start of cpu_context for previous process */
  913. addik r11, r5, TI_CPU_CONTEXT
  914. swi r1, r11, CC_R1
  915. swi r2, r11, CC_R2
  916. /* skip volatile registers.
  917. * they are saved on stack when we jumped to _switch_to() */
  918. /* dedicated registers */
  919. swi r13, r11, CC_R13
  920. swi r14, r11, CC_R14
  921. swi r15, r11, CC_R15
  922. swi r16, r11, CC_R16
  923. swi r17, r11, CC_R17
  924. swi r18, r11, CC_R18
  925. /* save non-volatile registers */
  926. swi r19, r11, CC_R19
  927. swi r20, r11, CC_R20
  928. swi r21, r11, CC_R21
  929. swi r22, r11, CC_R22
  930. swi r23, r11, CC_R23
  931. swi r24, r11, CC_R24
  932. swi r25, r11, CC_R25
  933. swi r26, r11, CC_R26
  934. swi r27, r11, CC_R27
  935. swi r28, r11, CC_R28
  936. swi r29, r11, CC_R29
  937. swi r30, r11, CC_R30
  938. /* special purpose registers */
  939. mfs r12, rmsr
  940. nop
  941. swi r12, r11, CC_MSR
  942. mfs r12, rear
  943. nop
  944. swi r12, r11, CC_EAR
  945. mfs r12, resr
  946. nop
  947. swi r12, r11, CC_ESR
  948. mfs r12, rfsr
  949. nop
  950. swi r12, r11, CC_FSR
  951. /* update r31, the current */
  952. lwi r31, r6, TI_TASK/* give me pointer to task which will be next */
  953. /* stored it to current_save too */
  954. swi r31, r0, PER_CPU(CURRENT_SAVE)
  955. /* get new process' cpu context and restore */
  956. /* give me start where start context of next task */
  957. addik r11, r6, TI_CPU_CONTEXT
  958. /* non-volatile registers */
  959. lwi r30, r11, CC_R30
  960. lwi r29, r11, CC_R29
  961. lwi r28, r11, CC_R28
  962. lwi r27, r11, CC_R27
  963. lwi r26, r11, CC_R26
  964. lwi r25, r11, CC_R25
  965. lwi r24, r11, CC_R24
  966. lwi r23, r11, CC_R23
  967. lwi r22, r11, CC_R22
  968. lwi r21, r11, CC_R21
  969. lwi r20, r11, CC_R20
  970. lwi r19, r11, CC_R19
  971. /* dedicated registers */
  972. lwi r18, r11, CC_R18
  973. lwi r17, r11, CC_R17
  974. lwi r16, r11, CC_R16
  975. lwi r15, r11, CC_R15
  976. lwi r14, r11, CC_R14
  977. lwi r13, r11, CC_R13
  978. /* skip volatile registers */
  979. lwi r2, r11, CC_R2
  980. lwi r1, r11, CC_R1
  981. /* special purpose registers */
  982. lwi r12, r11, CC_FSR
  983. mts rfsr, r12
  984. nop
  985. lwi r12, r11, CC_MSR
  986. mts rmsr, r12
  987. nop
  988. rtsd r15, 8
  989. nop
  990. ENTRY(_reset)
  991. brai 0x70; /* Jump back to FS-boot */
  992. ENTRY(_break)
  993. mfs r5, rmsr
  994. nop
  995. swi r5, r0, 0x250 + TOPHYS(r0_ram)
  996. mfs r5, resr
  997. nop
  998. swi r5, r0, 0x254 + TOPHYS(r0_ram)
  999. bri 0
  1000. /* These are compiled and loaded into high memory, then
  1001. * copied into place in mach_early_setup */
  1002. .section .init.ivt, "ax"
  1003. .org 0x0
  1004. /* this is very important - here is the reset vector */
  1005. /* in current MMU branch you don't care what is here - it is
  1006. * used from bootloader site - but this is correct for FS-BOOT */
  1007. brai 0x70
  1008. nop
  1009. brai TOPHYS(_user_exception); /* syscall handler */
  1010. brai TOPHYS(_interrupt); /* Interrupt handler */
  1011. brai TOPHYS(_break); /* nmi trap handler */
  1012. brai TOPHYS(_hw_exception_handler); /* HW exception handler */
  1013. .org 0x60
  1014. brai TOPHYS(_debug_exception); /* debug trap handler*/
  1015. .section .rodata,"a"
  1016. #include "syscall_table.S"
  1017. syscall_table_size=(.-sys_call_table)