head-ram.S 3.0 KB

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  1. .global __main
  2. .global __rom_start
  3. .global _rambase
  4. .global _ramstart
  5. .global splash_bits
  6. .global _start
  7. .global _stext
  8. .global _edata
  9. #define DEBUG
  10. #define ROM_OFFSET 0x10C00000
  11. #define STACK_GAURD 0x10
  12. .text
  13. _start:
  14. _stext:
  15. movew #0x2700, %sr /* Exceptions off! */
  16. #if 0
  17. /* Init chip registers. uCsimm specific */
  18. moveb #0x00, 0xfffffb0b /* Watchdog off */
  19. moveb #0x10, 0xfffff000 /* SCR */
  20. movew #0x2400, 0xfffff200 /* PLLCR */
  21. movew #0x0123, 0xfffff202 /* PLLFSR */
  22. moveb #0x00, 0xfffff40b /* enable chip select */
  23. moveb #0x00, 0xfffff423 /* enable /DWE */
  24. moveb #0x08, 0xfffffd0d /* disable hardmap */
  25. moveb #0x07, 0xfffffd0e /* level 7 interrupt clear */
  26. movew #0x8600, 0xfffff100 /* FLASH at 0x10c00000 */
  27. movew #0x018b, 0xfffff110 /* 2Meg, enable, 0ws */
  28. movew #0x8f00, 0xfffffc00 /* DRAM configuration */
  29. movew #0x9667, 0xfffffc02 /* DRAM control */
  30. movew #0x0000, 0xfffff106 /* DRAM at 0x00000000 */
  31. movew #0x068f, 0xfffff116 /* 8Meg, enable, 0ws */
  32. moveb #0x40, 0xfffff300 /* IVR */
  33. movel #0x007FFFFF, %d0 /* IMR */
  34. movel %d0, 0xfffff304
  35. moveb 0xfffff42b, %d0
  36. andb #0xe0, %d0
  37. moveb %d0, 0xfffff42b
  38. moveb #0x08, 0xfffff907 /* Ignore CTS */
  39. movew #0x010b, 0xfffff902 /* BAUD to 9600 */
  40. movew #0xe100, 0xfffff900 /* enable */
  41. #endif
  42. movew #16384, %d0 /* PLL settle wait loop */
  43. L0:
  44. subw #1, %d0
  45. bne L0
  46. #ifdef DEBUG
  47. moveq #70, %d7 /* 'F' */
  48. moveb %d7,0xfffff907 /* No absolute addresses */
  49. pclp1:
  50. movew 0xfffff906, %d7
  51. andw #0x2000, %d7
  52. beq pclp1
  53. #endif /* DEBUG */
  54. #ifdef CONFIG_RELOCATE
  55. /* Copy me to RAM */
  56. moveal #__rom_start, %a0
  57. moveal #_stext, %a1
  58. moveal #_edata, %a2
  59. /* Copy %a0 to %a1 until %a1 == %a2 */
  60. LD1:
  61. movel %a0@+, %d0
  62. movel %d0, %a1@+
  63. cmpal %a1, %a2
  64. bhi LD1
  65. #ifdef DEBUG
  66. moveq #74, %d7 /* 'J' */
  67. moveb %d7,0xfffff907 /* No absolute addresses */
  68. pclp2:
  69. movew 0xfffff906, %d7
  70. andw #0x2000, %d7
  71. beq pclp2
  72. #endif /* DEBUG */
  73. /* jump into the RAM copy */
  74. jmp ram_jump
  75. ram_jump:
  76. #endif /* CONFIG_RELOCATE */
  77. #ifdef DEBUG
  78. moveq #82, %d7 /* 'R' */
  79. moveb %d7,0xfffff907 /* No absolute addresses */
  80. pclp3:
  81. movew 0xfffff906, %d7
  82. andw #0x2000, %d7
  83. beq pclp3
  84. #endif /* DEBUG */
  85. moveal #0x007ffff0, %ssp
  86. moveal #_sbss, %a0
  87. moveal #_ebss, %a1
  88. /* Copy 0 to %a0 until %a0 >= %a1 */
  89. L1:
  90. movel #0, %a0@+
  91. cmpal %a0, %a1
  92. bhi L1
  93. #ifdef DEBUG
  94. moveq #67, %d7 /* 'C' */
  95. jsr putc
  96. #endif /* DEBUG */
  97. pea 0
  98. pea env
  99. pea %sp@(4)
  100. pea 0
  101. #ifdef DEBUG
  102. moveq #70, %d7 /* 'F' */
  103. jsr putc
  104. #endif /* DEBUG */
  105. lp:
  106. jsr start_kernel
  107. jmp lp
  108. _exit:
  109. jmp _exit
  110. __main:
  111. /* nothing */
  112. rts
  113. #ifdef DEBUG
  114. putc:
  115. moveb %d7,0xfffff907
  116. pclp:
  117. movew 0xfffff906, %d7
  118. andw #0x2000, %d7
  119. beq pclp
  120. rts
  121. #endif /* DEBUG */
  122. .data
  123. /*
  124. * Set up the usable of RAM stuff. Size of RAM is determined then
  125. * an initial stack set up at the end.
  126. */
  127. .align 4
  128. _ramvec:
  129. .long 0
  130. _rambase:
  131. .long 0
  132. _ramstart:
  133. .long 0
  134. _ramend:
  135. .long 0
  136. env:
  137. .long 0