config.c 3.0 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5249/config.c
  4. *
  5. * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <asm/machdep.h>
  13. #include <asm/coldfire.h>
  14. #include <asm/mcfsim.h>
  15. #include <asm/mcfuart.h>
  16. /***************************************************************************/
  17. static struct mcf_platform_uart m5249_uart_platform[] = {
  18. {
  19. .mapbase = MCF_MBAR + MCFUART_BASE1,
  20. .irq = 73,
  21. },
  22. {
  23. .mapbase = MCF_MBAR + MCFUART_BASE2,
  24. .irq = 74,
  25. },
  26. { },
  27. };
  28. static struct platform_device m5249_uart = {
  29. .name = "mcfuart",
  30. .id = 0,
  31. .dev.platform_data = m5249_uart_platform,
  32. };
  33. static struct platform_device *m5249_devices[] __initdata = {
  34. &m5249_uart,
  35. };
  36. /***************************************************************************/
  37. static void __init m5249_uart_init_line(int line, int irq)
  38. {
  39. if (line == 0) {
  40. writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  41. writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  42. mcf_mapirq2imr(irq, MCFINTC_UART0);
  43. } else if (line == 1) {
  44. writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  45. writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  46. mcf_mapirq2imr(irq, MCFINTC_UART1);
  47. }
  48. }
  49. static void __init m5249_uarts_init(void)
  50. {
  51. const int nrlines = ARRAY_SIZE(m5249_uart_platform);
  52. int line;
  53. for (line = 0; (line < nrlines); line++)
  54. m5249_uart_init_line(line, m5249_uart_platform[line].irq);
  55. }
  56. /***************************************************************************/
  57. static void __init m5249_timers_init(void)
  58. {
  59. /* Timer1 is always used as system timer */
  60. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
  61. MCF_MBAR + MCFSIM_TIMER1ICR);
  62. mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
  63. #ifdef CONFIG_HIGHPROFILE
  64. /* Timer2 is to be used as a high speed profile timer */
  65. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
  66. MCF_MBAR + MCFSIM_TIMER2ICR);
  67. mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
  68. #endif
  69. }
  70. /***************************************************************************/
  71. void m5249_cpu_reset(void)
  72. {
  73. local_irq_disable();
  74. /* Set watchdog to soft reset, and enabled */
  75. __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
  76. for (;;)
  77. /* wait for watchdog to timeout */;
  78. }
  79. /***************************************************************************/
  80. void __init config_BSP(char *commandp, int size)
  81. {
  82. mach_reset = m5249_cpu_reset;
  83. m5249_timers_init();
  84. m5249_uarts_init();
  85. }
  86. /***************************************************************************/
  87. static int __init init_BSP(void)
  88. {
  89. platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
  90. return 0;
  91. }
  92. arch_initcall(init_BSP);
  93. /***************************************************************************/