bte.c 13 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
  7. */
  8. #include <linux/module.h>
  9. #include <asm/sn/nodepda.h>
  10. #include <asm/sn/addrs.h>
  11. #include <asm/sn/arch.h>
  12. #include <asm/sn/sn_cpuid.h>
  13. #include <asm/sn/pda.h>
  14. #include <asm/sn/shubio.h>
  15. #include <asm/nodedata.h>
  16. #include <asm/delay.h>
  17. #include <linux/bootmem.h>
  18. #include <linux/string.h>
  19. #include <linux/sched.h>
  20. #include <asm/sn/bte.h>
  21. #ifndef L1_CACHE_MASK
  22. #define L1_CACHE_MASK (L1_CACHE_BYTES - 1)
  23. #endif
  24. /* two interfaces on two btes */
  25. #define MAX_INTERFACES_TO_TRY 4
  26. #define MAX_NODES_TO_TRY 2
  27. static struct bteinfo_s *bte_if_on_node(nasid_t nasid, int interface)
  28. {
  29. nodepda_t *tmp_nodepda;
  30. if (nasid_to_cnodeid(nasid) == -1)
  31. return (struct bteinfo_s *)NULL;
  32. tmp_nodepda = NODEPDA(nasid_to_cnodeid(nasid));
  33. return &tmp_nodepda->bte_if[interface];
  34. }
  35. static inline void bte_start_transfer(struct bteinfo_s *bte, u64 len, u64 mode)
  36. {
  37. if (is_shub2()) {
  38. BTE_CTRL_STORE(bte, (IBLS_BUSY | ((len) | (mode) << 24)));
  39. } else {
  40. BTE_LNSTAT_STORE(bte, len);
  41. BTE_CTRL_STORE(bte, mode);
  42. }
  43. }
  44. /************************************************************************
  45. * Block Transfer Engine copy related functions.
  46. *
  47. ***********************************************************************/
  48. /*
  49. * bte_copy(src, dest, len, mode, notification)
  50. *
  51. * Use the block transfer engine to move kernel memory from src to dest
  52. * using the assigned mode.
  53. *
  54. * Parameters:
  55. * src - physical address of the transfer source.
  56. * dest - physical address of the transfer destination.
  57. * len - number of bytes to transfer from source to dest.
  58. * mode - hardware defined. See reference information
  59. * for IBCT0/1 in the SHUB Programmers Reference
  60. * notification - kernel virtual address of the notification cache
  61. * line. If NULL, the default is used and
  62. * the bte_copy is synchronous.
  63. *
  64. * NOTE: This function requires src, dest, and len to
  65. * be cacheline aligned.
  66. */
  67. bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
  68. {
  69. u64 transfer_size;
  70. u64 transfer_stat;
  71. u64 notif_phys_addr;
  72. struct bteinfo_s *bte;
  73. bte_result_t bte_status;
  74. unsigned long irq_flags;
  75. unsigned long itc_end = 0;
  76. int nasid_to_try[MAX_NODES_TO_TRY];
  77. int my_nasid = cpuid_to_nasid(raw_smp_processor_id());
  78. int bte_if_index, nasid_index;
  79. int bte_first, btes_per_node = BTES_PER_NODE;
  80. BTE_PRINTK(("bte_copy(0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%p)\n",
  81. src, dest, len, mode, notification));
  82. if (len == 0) {
  83. return BTE_SUCCESS;
  84. }
  85. BUG_ON(len & L1_CACHE_MASK);
  86. BUG_ON(src & L1_CACHE_MASK);
  87. BUG_ON(dest & L1_CACHE_MASK);
  88. BUG_ON(len > BTE_MAX_XFER);
  89. /*
  90. * Start with interface corresponding to cpu number
  91. */
  92. bte_first = raw_smp_processor_id() % btes_per_node;
  93. if (mode & BTE_USE_DEST) {
  94. /* try remote then local */
  95. nasid_to_try[0] = NASID_GET(dest);
  96. if (mode & BTE_USE_ANY) {
  97. nasid_to_try[1] = my_nasid;
  98. } else {
  99. nasid_to_try[1] = (int)NULL;
  100. }
  101. } else {
  102. /* try local then remote */
  103. nasid_to_try[0] = my_nasid;
  104. if (mode & BTE_USE_ANY) {
  105. nasid_to_try[1] = NASID_GET(dest);
  106. } else {
  107. nasid_to_try[1] = (int)NULL;
  108. }
  109. }
  110. retry_bteop:
  111. do {
  112. local_irq_save(irq_flags);
  113. bte_if_index = bte_first;
  114. nasid_index = 0;
  115. /* Attempt to lock one of the BTE interfaces. */
  116. while (nasid_index < MAX_NODES_TO_TRY) {
  117. bte = bte_if_on_node(nasid_to_try[nasid_index],bte_if_index);
  118. if (bte == NULL) {
  119. nasid_index++;
  120. continue;
  121. }
  122. if (spin_trylock(&bte->spinlock)) {
  123. if (!(*bte->most_rcnt_na & BTE_WORD_AVAILABLE) ||
  124. (BTE_LNSTAT_LOAD(bte) & BTE_ACTIVE)) {
  125. /* Got the lock but BTE still busy */
  126. spin_unlock(&bte->spinlock);
  127. } else {
  128. /* we got the lock and it's not busy */
  129. break;
  130. }
  131. }
  132. bte_if_index = (bte_if_index + 1) % btes_per_node; /* Next interface */
  133. if (bte_if_index == bte_first) {
  134. /*
  135. * We've tried all interfaces on this node
  136. */
  137. nasid_index++;
  138. }
  139. bte = NULL;
  140. }
  141. if (bte != NULL) {
  142. break;
  143. }
  144. local_irq_restore(irq_flags);
  145. if (!(mode & BTE_WACQUIRE)) {
  146. return BTEFAIL_NOTAVAIL;
  147. }
  148. } while (1);
  149. if (notification == NULL) {
  150. /* User does not want to be notified. */
  151. bte->most_rcnt_na = &bte->notify;
  152. } else {
  153. bte->most_rcnt_na = notification;
  154. }
  155. /* Calculate the number of cache lines to transfer. */
  156. transfer_size = ((len >> L1_CACHE_SHIFT) & BTE_LEN_MASK);
  157. /* Initialize the notification to a known value. */
  158. *bte->most_rcnt_na = BTE_WORD_BUSY;
  159. notif_phys_addr = (u64)bte->most_rcnt_na;
  160. /* Set the source and destination registers */
  161. BTE_PRINTKV(("IBSA = 0x%lx)\n", src));
  162. BTE_SRC_STORE(bte, src);
  163. BTE_PRINTKV(("IBDA = 0x%lx)\n", dest));
  164. BTE_DEST_STORE(bte, dest);
  165. /* Set the notification register */
  166. BTE_PRINTKV(("IBNA = 0x%lx)\n", notif_phys_addr));
  167. BTE_NOTIF_STORE(bte, notif_phys_addr);
  168. /* Initiate the transfer */
  169. BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
  170. bte_start_transfer(bte, transfer_size, BTE_VALID_MODE(mode));
  171. itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
  172. spin_unlock_irqrestore(&bte->spinlock, irq_flags);
  173. if (notification != NULL) {
  174. return BTE_SUCCESS;
  175. }
  176. while ((transfer_stat = *bte->most_rcnt_na) == BTE_WORD_BUSY) {
  177. cpu_relax();
  178. if (ia64_get_itc() > itc_end) {
  179. BTE_PRINTK(("BTE timeout nasid 0x%x bte%d IBLS = 0x%lx na 0x%lx\n",
  180. NASID_GET(bte->bte_base_addr), bte->bte_num,
  181. BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na) );
  182. bte->bte_error_count++;
  183. bte->bh_error = IBLS_ERROR;
  184. bte_error_handler((unsigned long)NODEPDA(bte->bte_cnode));
  185. *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
  186. goto retry_bteop;
  187. }
  188. }
  189. BTE_PRINTKV((" Delay Done. IBLS = 0x%lx, most_rcnt_na = 0x%lx\n",
  190. BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
  191. if (transfer_stat & IBLS_ERROR) {
  192. bte_status = BTE_GET_ERROR_STATUS(transfer_stat);
  193. } else {
  194. bte_status = BTE_SUCCESS;
  195. }
  196. *bte->most_rcnt_na = BTE_WORD_AVAILABLE;
  197. BTE_PRINTK(("Returning status is 0x%lx and most_rcnt_na is 0x%lx\n",
  198. BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na));
  199. return bte_status;
  200. }
  201. EXPORT_SYMBOL(bte_copy);
  202. /*
  203. * bte_unaligned_copy(src, dest, len, mode)
  204. *
  205. * use the block transfer engine to move kernel
  206. * memory from src to dest using the assigned mode.
  207. *
  208. * Parameters:
  209. * src - physical address of the transfer source.
  210. * dest - physical address of the transfer destination.
  211. * len - number of bytes to transfer from source to dest.
  212. * mode - hardware defined. See reference information
  213. * for IBCT0/1 in the SGI documentation.
  214. *
  215. * NOTE: If the source, dest, and len are all cache line aligned,
  216. * then it would be _FAR_ preferable to use bte_copy instead.
  217. */
  218. bte_result_t bte_unaligned_copy(u64 src, u64 dest, u64 len, u64 mode)
  219. {
  220. int destFirstCacheOffset;
  221. u64 headBteSource;
  222. u64 headBteLen;
  223. u64 headBcopySrcOffset;
  224. u64 headBcopyDest;
  225. u64 headBcopyLen;
  226. u64 footBteSource;
  227. u64 footBteLen;
  228. u64 footBcopyDest;
  229. u64 footBcopyLen;
  230. bte_result_t rv;
  231. char *bteBlock, *bteBlock_unaligned;
  232. if (len == 0) {
  233. return BTE_SUCCESS;
  234. }
  235. /* temporary buffer used during unaligned transfers */
  236. bteBlock_unaligned = kmalloc(len + 3 * L1_CACHE_BYTES, GFP_KERNEL);
  237. if (bteBlock_unaligned == NULL) {
  238. return BTEFAIL_NOTAVAIL;
  239. }
  240. bteBlock = (char *)L1_CACHE_ALIGN((u64) bteBlock_unaligned);
  241. headBcopySrcOffset = src & L1_CACHE_MASK;
  242. destFirstCacheOffset = dest & L1_CACHE_MASK;
  243. /*
  244. * At this point, the transfer is broken into
  245. * (up to) three sections. The first section is
  246. * from the start address to the first physical
  247. * cache line, the second is from the first physical
  248. * cache line to the last complete cache line,
  249. * and the third is from the last cache line to the
  250. * end of the buffer. The first and third sections
  251. * are handled by bte copying into a temporary buffer
  252. * and then bcopy'ing the necessary section into the
  253. * final location. The middle section is handled with
  254. * a standard bte copy.
  255. *
  256. * One nasty exception to the above rule is when the
  257. * source and destination are not symmetrically
  258. * mis-aligned. If the source offset from the first
  259. * cache line is different from the destination offset,
  260. * we make the first section be the entire transfer
  261. * and the bcopy the entire block into place.
  262. */
  263. if (headBcopySrcOffset == destFirstCacheOffset) {
  264. /*
  265. * Both the source and destination are the same
  266. * distance from a cache line boundary so we can
  267. * use the bte to transfer the bulk of the
  268. * data.
  269. */
  270. headBteSource = src & ~L1_CACHE_MASK;
  271. headBcopyDest = dest;
  272. if (headBcopySrcOffset) {
  273. headBcopyLen =
  274. (len >
  275. (L1_CACHE_BYTES -
  276. headBcopySrcOffset) ? L1_CACHE_BYTES
  277. - headBcopySrcOffset : len);
  278. headBteLen = L1_CACHE_BYTES;
  279. } else {
  280. headBcopyLen = 0;
  281. headBteLen = 0;
  282. }
  283. if (len > headBcopyLen) {
  284. footBcopyLen = (len - headBcopyLen) & L1_CACHE_MASK;
  285. footBteLen = L1_CACHE_BYTES;
  286. footBteSource = src + len - footBcopyLen;
  287. footBcopyDest = dest + len - footBcopyLen;
  288. if (footBcopyDest == (headBcopyDest + headBcopyLen)) {
  289. /*
  290. * We have two contiguous bcopy
  291. * blocks. Merge them.
  292. */
  293. headBcopyLen += footBcopyLen;
  294. headBteLen += footBteLen;
  295. } else if (footBcopyLen > 0) {
  296. rv = bte_copy(footBteSource,
  297. ia64_tpa((unsigned long)bteBlock),
  298. footBteLen, mode, NULL);
  299. if (rv != BTE_SUCCESS) {
  300. kfree(bteBlock_unaligned);
  301. return rv;
  302. }
  303. memcpy(__va(footBcopyDest),
  304. (char *)bteBlock, footBcopyLen);
  305. }
  306. } else {
  307. footBcopyLen = 0;
  308. footBteLen = 0;
  309. }
  310. if (len > (headBcopyLen + footBcopyLen)) {
  311. /* now transfer the middle. */
  312. rv = bte_copy((src + headBcopyLen),
  313. (dest +
  314. headBcopyLen),
  315. (len - headBcopyLen -
  316. footBcopyLen), mode, NULL);
  317. if (rv != BTE_SUCCESS) {
  318. kfree(bteBlock_unaligned);
  319. return rv;
  320. }
  321. }
  322. } else {
  323. /*
  324. * The transfer is not symmetric, we will
  325. * allocate a buffer large enough for all the
  326. * data, bte_copy into that buffer and then
  327. * bcopy to the destination.
  328. */
  329. headBcopySrcOffset = src & L1_CACHE_MASK;
  330. headBcopyDest = dest;
  331. headBcopyLen = len;
  332. headBteSource = src - headBcopySrcOffset;
  333. /* Add the leading and trailing bytes from source */
  334. headBteLen = L1_CACHE_ALIGN(len + headBcopySrcOffset);
  335. }
  336. if (headBcopyLen > 0) {
  337. rv = bte_copy(headBteSource,
  338. ia64_tpa((unsigned long)bteBlock), headBteLen,
  339. mode, NULL);
  340. if (rv != BTE_SUCCESS) {
  341. kfree(bteBlock_unaligned);
  342. return rv;
  343. }
  344. memcpy(__va(headBcopyDest), ((char *)bteBlock +
  345. headBcopySrcOffset), headBcopyLen);
  346. }
  347. kfree(bteBlock_unaligned);
  348. return BTE_SUCCESS;
  349. }
  350. EXPORT_SYMBOL(bte_unaligned_copy);
  351. /************************************************************************
  352. * Block Transfer Engine initialization functions.
  353. *
  354. ***********************************************************************/
  355. /*
  356. * bte_init_node(nodepda, cnode)
  357. *
  358. * Initialize the nodepda structure with BTE base addresses and
  359. * spinlocks.
  360. */
  361. void bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
  362. {
  363. int i;
  364. /*
  365. * Indicate that all the block transfer engines on this node
  366. * are available.
  367. */
  368. /*
  369. * Allocate one bte_recover_t structure per node. It holds
  370. * the recovery lock for node. All the bte interface structures
  371. * will point at this one bte_recover structure to get the lock.
  372. */
  373. spin_lock_init(&mynodepda->bte_recovery_lock);
  374. init_timer(&mynodepda->bte_recovery_timer);
  375. mynodepda->bte_recovery_timer.function = bte_error_handler;
  376. mynodepda->bte_recovery_timer.data = (unsigned long)mynodepda;
  377. for (i = 0; i < BTES_PER_NODE; i++) {
  378. u64 *base_addr;
  379. /* Which link status register should we use? */
  380. base_addr = (u64 *)
  381. REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode), BTE_BASE_ADDR(i));
  382. mynodepda->bte_if[i].bte_base_addr = base_addr;
  383. mynodepda->bte_if[i].bte_source_addr = BTE_SOURCE_ADDR(base_addr);
  384. mynodepda->bte_if[i].bte_destination_addr = BTE_DEST_ADDR(base_addr);
  385. mynodepda->bte_if[i].bte_control_addr = BTE_CTRL_ADDR(base_addr);
  386. mynodepda->bte_if[i].bte_notify_addr = BTE_NOTIF_ADDR(base_addr);
  387. /*
  388. * Initialize the notification and spinlock
  389. * so the first transfer can occur.
  390. */
  391. mynodepda->bte_if[i].most_rcnt_na =
  392. &(mynodepda->bte_if[i].notify);
  393. mynodepda->bte_if[i].notify = BTE_WORD_AVAILABLE;
  394. spin_lock_init(&mynodepda->bte_if[i].spinlock);
  395. mynodepda->bte_if[i].bte_cnode = cnode;
  396. mynodepda->bte_if[i].bte_error_count = 0;
  397. mynodepda->bte_if[i].bte_num = i;
  398. mynodepda->bte_if[i].cleanup_active = 0;
  399. mynodepda->bte_if[i].bh_error = 0;
  400. }
  401. }