dma-mapping.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104
  1. #ifndef _ASM_IA64_DMA_MAPPING_H
  2. #define _ASM_IA64_DMA_MAPPING_H
  3. /*
  4. * Copyright (C) 2003-2004 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. */
  7. #include <asm/machvec.h>
  8. #include <linux/scatterlist.h>
  9. #include <asm/swiotlb.h>
  10. #include <linux/dma-debug.h>
  11. #define ARCH_HAS_DMA_GET_REQUIRED_MASK
  12. extern struct dma_map_ops *dma_ops;
  13. extern struct ia64_machine_vector ia64_mv;
  14. extern void set_iommu_machvec(void);
  15. extern void machvec_dma_sync_single(struct device *, dma_addr_t, size_t,
  16. enum dma_data_direction);
  17. extern void machvec_dma_sync_sg(struct device *, struct scatterlist *, int,
  18. enum dma_data_direction);
  19. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  20. dma_addr_t *daddr, gfp_t gfp)
  21. {
  22. struct dma_map_ops *ops = platform_dma_get_ops(dev);
  23. void *caddr;
  24. caddr = ops->alloc_coherent(dev, size, daddr, gfp);
  25. debug_dma_alloc_coherent(dev, size, *daddr, caddr);
  26. return caddr;
  27. }
  28. static inline void dma_free_coherent(struct device *dev, size_t size,
  29. void *caddr, dma_addr_t daddr)
  30. {
  31. struct dma_map_ops *ops = platform_dma_get_ops(dev);
  32. debug_dma_free_coherent(dev, size, caddr, daddr);
  33. ops->free_coherent(dev, size, caddr, daddr);
  34. }
  35. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  36. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  37. #define get_dma_ops(dev) platform_dma_get_ops(dev)
  38. #include <asm-generic/dma-mapping-common.h>
  39. static inline int dma_mapping_error(struct device *dev, dma_addr_t daddr)
  40. {
  41. struct dma_map_ops *ops = platform_dma_get_ops(dev);
  42. return ops->mapping_error(dev, daddr);
  43. }
  44. static inline int dma_supported(struct device *dev, u64 mask)
  45. {
  46. struct dma_map_ops *ops = platform_dma_get_ops(dev);
  47. return ops->dma_supported(dev, mask);
  48. }
  49. static inline int
  50. dma_set_mask (struct device *dev, u64 mask)
  51. {
  52. if (!dev->dma_mask || !dma_supported(dev, mask))
  53. return -EIO;
  54. *dev->dma_mask = mask;
  55. return 0;
  56. }
  57. static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
  58. {
  59. if (!dev->dma_mask)
  60. return 0;
  61. return addr + size <= *dev->dma_mask;
  62. }
  63. static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
  64. {
  65. return paddr;
  66. }
  67. static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
  68. {
  69. return daddr;
  70. }
  71. extern int dma_get_cache_alignment(void);
  72. static inline void
  73. dma_cache_sync (struct device *dev, void *vaddr, size_t size,
  74. enum dma_data_direction dir)
  75. {
  76. /*
  77. * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
  78. * ensure that dma_cache_sync() enforces order, hence the mb().
  79. */
  80. mb();
  81. }
  82. #define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
  83. #endif /* _ASM_IA64_DMA_MAPPING_H */