tpu.c 2.0 KB

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  1. /*
  2. * linux/arch/h8300/kernel/timer/tpu.c
  3. *
  4. * Yoshinori Sato <ysato@users.sourceforge.jp>
  5. *
  6. * TPU Timer Handler
  7. *
  8. */
  9. #include <linux/errno.h>
  10. #include <linux/sched.h>
  11. #include <linux/kernel.h>
  12. #include <linux/param.h>
  13. #include <linux/string.h>
  14. #include <linux/mm.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/init.h>
  17. #include <linux/timex.h>
  18. #include <asm/segment.h>
  19. #include <asm/io.h>
  20. #include <asm/irq.h>
  21. #include <asm/regs267x.h>
  22. /* TPU */
  23. #if CONFIG_H8300_TPU_CH == 0
  24. #define TPUBASE 0xffffd0
  25. #define TPUIRQ 40
  26. #elif CONFIG_H8300_TPU_CH == 1
  27. #define TPUBASE 0xffffe0
  28. #define TPUIRQ 48
  29. #elif CONFIG_H8300_TPU_CH == 2
  30. #define TPUBASE 0xfffff0
  31. #define TPUIRQ 52
  32. #elif CONFIG_H8300_TPU_CH == 3
  33. #define TPUBASE 0xfffe80
  34. #define TPUIRQ 56
  35. #elif CONFIG_H8300_TPU_CH == 4
  36. #define TPUBASE 0xfffe90
  37. #define TPUIRQ 64
  38. #else
  39. #error Unknown timer channel.
  40. #endif
  41. #define _TCR 0
  42. #define _TMDR 1
  43. #define _TIOR 2
  44. #define _TIER 4
  45. #define _TSR 5
  46. #define _TCNT 6
  47. #define _GRA 8
  48. #define _GRB 10
  49. #define CCLR0 0x20
  50. static irqreturn_t timer_interrupt(int irq, void *dev_id)
  51. {
  52. h8300_timer_tick();
  53. ctrl_bclr(0, TPUBASE + _TSR);
  54. return IRQ_HANDLED;
  55. }
  56. static struct irqaction tpu_irq = {
  57. .name = "tpu",
  58. .handler = timer_interrupt,
  59. .flags = IRQF_DISABLED | IRQF_TIMER,
  60. };
  61. static const int __initdata divide_rate[] = {
  62. #if CONFIG_H8300_TPU_CH == 0
  63. 1,4,16,64,0,0,0,0,
  64. #elif (CONFIG_H8300_TPU_CH == 1) || (CONFIG_H8300_TPU_CH == 5)
  65. 1,4,16,64,0,0,256,0,
  66. #elif (CONFIG_H8300_TPU_CH == 2) || (CONFIG_H8300_TPU_CH == 4)
  67. 1,4,16,64,0,0,0,1024,
  68. #elif CONFIG_H8300_TPU_CH == 3
  69. 1,4,16,64,0,1024,256,4096,
  70. #endif
  71. };
  72. void __init h8300_timer_setup(void)
  73. {
  74. unsigned int cnt;
  75. unsigned int div;
  76. calc_param(cnt, div, divide_rate, 0x10000);
  77. setup_irq(TPUIRQ, &tpu_irq);
  78. /* TPU module enabled */
  79. ctrl_bclr(3, MSTPCRH);
  80. ctrl_outb(0, TSTR);
  81. ctrl_outb(CCLR0 | div, TPUBASE + _TCR);
  82. ctrl_outb(0, TPUBASE + _TMDR);
  83. ctrl_outw(0, TPUBASE + _TIOR);
  84. ctrl_outb(0x01, TPUBASE + _TIER);
  85. ctrl_outw(cnt, TPUBASE + _GRA);
  86. ctrl_bset(CONFIG_H8300_TPU_CH, TSTR);
  87. }