cm_bf561.c 12 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  16. #include <linux/usb/isp1362.h>
  17. #endif
  18. #include <linux/ata_platform.h>
  19. #include <linux/irq.h>
  20. #include <asm/dma.h>
  21. #include <asm/bfin5xx_spi.h>
  22. #include <asm/portmux.h>
  23. #include <asm/dpmc.h>
  24. #include <linux/mtd/physmap.h>
  25. /*
  26. * Name the Board for the /proc/cpuinfo
  27. */
  28. const char bfin_board_name[] = "Bluetechnix CM BF561";
  29. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  30. /* all SPI peripherals info goes here */
  31. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  32. static struct mtd_partition bfin_spi_flash_partitions[] = {
  33. {
  34. .name = "bootloader(spi)",
  35. .size = 0x00020000,
  36. .offset = 0,
  37. .mask_flags = MTD_CAP_ROM
  38. }, {
  39. .name = "linux kernel(spi)",
  40. .size = 0xe0000,
  41. .offset = 0x20000
  42. }, {
  43. .name = "file system(spi)",
  44. .size = 0x700000,
  45. .offset = 0x00100000,
  46. }
  47. };
  48. static struct flash_platform_data bfin_spi_flash_data = {
  49. .name = "m25p80",
  50. .parts = bfin_spi_flash_partitions,
  51. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  52. .type = "m25p64",
  53. };
  54. /* SPI flash chip (m25p64) */
  55. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  56. .enable_dma = 0, /* use dma transfer with this chip*/
  57. .bits_per_word = 8,
  58. };
  59. #endif
  60. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  61. /* SPI ADC chip */
  62. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  63. .enable_dma = 1, /* use dma transfer with this chip*/
  64. .bits_per_word = 16,
  65. };
  66. #endif
  67. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  68. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  69. .enable_dma = 0,
  70. .bits_per_word = 16,
  71. };
  72. #endif
  73. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  74. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  75. .enable_dma = 0,
  76. .bits_per_word = 8,
  77. };
  78. #endif
  79. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  80. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  81. {
  82. /* the modalias must be the same as spi device driver name */
  83. .modalias = "m25p80", /* Name of spi_driver for this device */
  84. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  85. .bus_num = 0, /* Framework bus number */
  86. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  87. .platform_data = &bfin_spi_flash_data,
  88. .controller_data = &spi_flash_chip_info,
  89. .mode = SPI_MODE_3,
  90. },
  91. #endif
  92. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  93. {
  94. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  95. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  96. .bus_num = 0, /* Framework bus number */
  97. .chip_select = 1, /* Framework chip select. */
  98. .platform_data = NULL, /* No spi_driver specific config */
  99. .controller_data = &spi_adc_chip_info,
  100. },
  101. #endif
  102. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  103. {
  104. .modalias = "ad1836",
  105. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  106. .bus_num = 0,
  107. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  108. .controller_data = &ad1836_spi_chip_info,
  109. },
  110. #endif
  111. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  112. {
  113. .modalias = "mmc_spi",
  114. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  115. .bus_num = 0,
  116. .chip_select = 1,
  117. .controller_data = &mmc_spi_chip_info,
  118. .mode = SPI_MODE_3,
  119. },
  120. #endif
  121. };
  122. /* SPI (0) */
  123. static struct resource bfin_spi0_resource[] = {
  124. [0] = {
  125. .start = SPI0_REGBASE,
  126. .end = SPI0_REGBASE + 0xFF,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. [1] = {
  130. .start = CH_SPI,
  131. .end = CH_SPI,
  132. .flags = IORESOURCE_DMA,
  133. },
  134. [2] = {
  135. .start = IRQ_SPI,
  136. .end = IRQ_SPI,
  137. .flags = IORESOURCE_IRQ,
  138. },
  139. };
  140. /* SPI controller data */
  141. static struct bfin5xx_spi_master bfin_spi0_info = {
  142. .num_chipselect = 8,
  143. .enable_dma = 1, /* master has the ability to do dma transfer */
  144. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  145. };
  146. static struct platform_device bfin_spi0_device = {
  147. .name = "bfin-spi",
  148. .id = 0, /* Bus number */
  149. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  150. .resource = bfin_spi0_resource,
  151. .dev = {
  152. .platform_data = &bfin_spi0_info, /* Passed to driver */
  153. },
  154. };
  155. #endif /* spi master and devices */
  156. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  157. static struct platform_device hitachi_fb_device = {
  158. .name = "hitachi-tx09",
  159. };
  160. #endif
  161. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  162. #include <linux/smc91x.h>
  163. static struct smc91x_platdata smc91x_info = {
  164. .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
  165. .leda = RPC_LED_100_10,
  166. .ledb = RPC_LED_TX_RX,
  167. };
  168. static struct resource smc91x_resources[] = {
  169. {
  170. .name = "smc91x-regs",
  171. .start = 0x28000300,
  172. .end = 0x28000300 + 16,
  173. .flags = IORESOURCE_MEM,
  174. }, {
  175. .start = IRQ_PF0,
  176. .end = IRQ_PF0,
  177. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  178. },
  179. };
  180. static struct platform_device smc91x_device = {
  181. .name = "smc91x",
  182. .id = 0,
  183. .num_resources = ARRAY_SIZE(smc91x_resources),
  184. .resource = smc91x_resources,
  185. .dev = {
  186. .platform_data = &smc91x_info,
  187. },
  188. };
  189. #endif
  190. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  191. #include <linux/smsc911x.h>
  192. static struct resource smsc911x_resources[] = {
  193. {
  194. .name = "smsc911x-memory",
  195. .start = 0x24008000,
  196. .end = 0x24008000 + 0xFF,
  197. .flags = IORESOURCE_MEM,
  198. },
  199. {
  200. .start = IRQ_PF43,
  201. .end = IRQ_PF43,
  202. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  203. },
  204. };
  205. static struct smsc911x_platform_config smsc911x_config = {
  206. .flags = SMSC911X_USE_16BIT,
  207. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  208. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  209. .phy_interface = PHY_INTERFACE_MODE_MII,
  210. };
  211. static struct platform_device smsc911x_device = {
  212. .name = "smsc911x",
  213. .id = 0,
  214. .num_resources = ARRAY_SIZE(smsc911x_resources),
  215. .resource = smsc911x_resources,
  216. .dev = {
  217. .platform_data = &smsc911x_config,
  218. },
  219. };
  220. #endif
  221. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  222. static struct resource net2272_bfin_resources[] = {
  223. {
  224. .start = 0x24000000,
  225. .end = 0x24000000 + 0x100,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = IRQ_PF45,
  229. .end = IRQ_PF45,
  230. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  231. },
  232. };
  233. static struct platform_device net2272_bfin_device = {
  234. .name = "net2272",
  235. .id = -1,
  236. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  237. .resource = net2272_bfin_resources,
  238. };
  239. #endif
  240. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  241. static struct resource isp1362_hcd_resources[] = {
  242. {
  243. .start = 0x24008000,
  244. .end = 0x24008000,
  245. .flags = IORESOURCE_MEM,
  246. }, {
  247. .start = 0x24008004,
  248. .end = 0x24008004,
  249. .flags = IORESOURCE_MEM,
  250. }, {
  251. .start = IRQ_PF47,
  252. .end = IRQ_PF47,
  253. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  254. },
  255. };
  256. static struct isp1362_platform_data isp1362_priv = {
  257. .sel15Kres = 1,
  258. .clknotstop = 0,
  259. .oc_enable = 0,
  260. .int_act_high = 0,
  261. .int_edge_triggered = 0,
  262. .remote_wakeup_connected = 0,
  263. .no_power_switching = 1,
  264. .power_switching_mode = 0,
  265. };
  266. static struct platform_device isp1362_hcd_device = {
  267. .name = "isp1362-hcd",
  268. .id = 0,
  269. .dev = {
  270. .platform_data = &isp1362_priv,
  271. },
  272. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  273. .resource = isp1362_hcd_resources,
  274. };
  275. #endif
  276. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  277. static struct resource bfin_uart_resources[] = {
  278. {
  279. .start = 0xFFC00400,
  280. .end = 0xFFC004FF,
  281. .flags = IORESOURCE_MEM,
  282. },
  283. };
  284. static struct platform_device bfin_uart_device = {
  285. .name = "bfin-uart",
  286. .id = 1,
  287. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  288. .resource = bfin_uart_resources,
  289. };
  290. #endif
  291. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  292. #ifdef CONFIG_BFIN_SIR0
  293. static struct resource bfin_sir0_resources[] = {
  294. {
  295. .start = 0xFFC00400,
  296. .end = 0xFFC004FF,
  297. .flags = IORESOURCE_MEM,
  298. },
  299. {
  300. .start = IRQ_UART0_RX,
  301. .end = IRQ_UART0_RX+1,
  302. .flags = IORESOURCE_IRQ,
  303. },
  304. {
  305. .start = CH_UART0_RX,
  306. .end = CH_UART0_RX+1,
  307. .flags = IORESOURCE_DMA,
  308. },
  309. };
  310. static struct platform_device bfin_sir0_device = {
  311. .name = "bfin_sir",
  312. .id = 0,
  313. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  314. .resource = bfin_sir0_resources,
  315. };
  316. #endif
  317. #endif
  318. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  319. #define PATA_INT IRQ_PF46
  320. static struct pata_platform_info bfin_pata_platform_data = {
  321. .ioport_shift = 2,
  322. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  323. };
  324. static struct resource bfin_pata_resources[] = {
  325. {
  326. .start = 0x2400C000,
  327. .end = 0x2400C001F,
  328. .flags = IORESOURCE_MEM,
  329. },
  330. {
  331. .start = 0x2400D018,
  332. .end = 0x2400D01B,
  333. .flags = IORESOURCE_MEM,
  334. },
  335. {
  336. .start = PATA_INT,
  337. .end = PATA_INT,
  338. .flags = IORESOURCE_IRQ,
  339. },
  340. };
  341. static struct platform_device bfin_pata_device = {
  342. .name = "pata_platform",
  343. .id = -1,
  344. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  345. .resource = bfin_pata_resources,
  346. .dev = {
  347. .platform_data = &bfin_pata_platform_data,
  348. }
  349. };
  350. #endif
  351. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  352. static struct mtd_partition para_partitions[] = {
  353. {
  354. .name = "bootloader(nor)",
  355. .size = 0x40000,
  356. .offset = 0,
  357. }, {
  358. .name = "linux kernel(nor)",
  359. .size = 0x100000,
  360. .offset = MTDPART_OFS_APPEND,
  361. }, {
  362. .name = "file system(nor)",
  363. .size = MTDPART_SIZ_FULL,
  364. .offset = MTDPART_OFS_APPEND,
  365. }
  366. };
  367. static struct physmap_flash_data para_flash_data = {
  368. .width = 2,
  369. .parts = para_partitions,
  370. .nr_parts = ARRAY_SIZE(para_partitions),
  371. };
  372. static struct resource para_flash_resource = {
  373. .start = 0x20000000,
  374. .end = 0x207fffff,
  375. .flags = IORESOURCE_MEM,
  376. };
  377. static struct platform_device para_flash_device = {
  378. .name = "physmap-flash",
  379. .id = 0,
  380. .dev = {
  381. .platform_data = &para_flash_data,
  382. },
  383. .num_resources = 1,
  384. .resource = &para_flash_resource,
  385. };
  386. #endif
  387. static const unsigned int cclk_vlev_datasheet[] =
  388. {
  389. VRPAIR(VLEV_085, 250000000),
  390. VRPAIR(VLEV_090, 300000000),
  391. VRPAIR(VLEV_095, 313000000),
  392. VRPAIR(VLEV_100, 350000000),
  393. VRPAIR(VLEV_105, 400000000),
  394. VRPAIR(VLEV_110, 444000000),
  395. VRPAIR(VLEV_115, 450000000),
  396. VRPAIR(VLEV_120, 475000000),
  397. VRPAIR(VLEV_125, 500000000),
  398. VRPAIR(VLEV_130, 600000000),
  399. };
  400. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  401. .tuple_tab = cclk_vlev_datasheet,
  402. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  403. .vr_settling_time = 25 /* us */,
  404. };
  405. static struct platform_device bfin_dpmc = {
  406. .name = "bfin dpmc",
  407. .dev = {
  408. .platform_data = &bfin_dmpc_vreg_data,
  409. },
  410. };
  411. static struct platform_device *cm_bf561_devices[] __initdata = {
  412. &bfin_dpmc,
  413. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  414. &hitachi_fb_device,
  415. #endif
  416. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  417. &bfin_uart_device,
  418. #endif
  419. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  420. #ifdef CONFIG_BFIN_SIR0
  421. &bfin_sir0_device,
  422. #endif
  423. #endif
  424. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  425. &isp1362_hcd_device,
  426. #endif
  427. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  428. &smc91x_device,
  429. #endif
  430. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  431. &smsc911x_device,
  432. #endif
  433. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  434. &net2272_bfin_device,
  435. #endif
  436. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  437. &bfin_spi0_device,
  438. #endif
  439. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  440. &bfin_pata_device,
  441. #endif
  442. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  443. &para_flash_device,
  444. #endif
  445. };
  446. static int __init cm_bf561_init(void)
  447. {
  448. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  449. platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
  450. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  451. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  452. #endif
  453. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  454. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  455. #endif
  456. return 0;
  457. }
  458. arch_initcall(cm_bf561_init);