mem_map.h 2.1 KB

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  1. /*
  2. * BF548 memory map
  3. *
  4. * Copyright 2004-2009 Analog Devices Inc.
  5. * Licensed under the GPL-2 or later.
  6. */
  7. #ifndef __BFIN_MACH_MEM_MAP_H__
  8. #define __BFIN_MACH_MEM_MAP_H__
  9. #ifndef __BFIN_MEM_MAP_H__
  10. # error "do not include mach/mem_map.h directly -- use asm/mem_map.h"
  11. #endif
  12. /* Async Memory Banks */
  13. #define ASYNC_BANK3_BASE 0x2C000000 /* Async Bank 3 */
  14. #define ASYNC_BANK3_SIZE 0x04000000 /* 64M */
  15. #define ASYNC_BANK2_BASE 0x28000000 /* Async Bank 2 */
  16. #define ASYNC_BANK2_SIZE 0x04000000 /* 64M */
  17. #define ASYNC_BANK1_BASE 0x24000000 /* Async Bank 1 */
  18. #define ASYNC_BANK1_SIZE 0x04000000 /* 64M */
  19. #define ASYNC_BANK0_BASE 0x20000000 /* Async Bank 0 */
  20. #define ASYNC_BANK0_SIZE 0x04000000 /* 64M */
  21. /* Boot ROM Memory */
  22. #define BOOT_ROM_START 0xEF000000
  23. #define BOOT_ROM_LENGTH 0x1000
  24. /* L1 Instruction ROM */
  25. #define L1_ROM_START 0xFFA14000
  26. #define L1_ROM_LENGTH 0x10000
  27. /* Level 1 Memory */
  28. /* Memory Map for ADSP-BF548 processors */
  29. #ifdef CONFIG_BFIN_ICACHE
  30. #define BFIN_ICACHESIZE (16*1024)
  31. #else
  32. #define BFIN_ICACHESIZE (0*1024)
  33. #endif
  34. #define L1_CODE_START 0xFFA00000
  35. #define L1_DATA_A_START 0xFF800000
  36. #define L1_DATA_B_START 0xFF900000
  37. #define L1_CODE_LENGTH 0xC000
  38. #ifdef CONFIG_BFIN_DCACHE
  39. #ifdef CONFIG_BFIN_DCACHE_BANKA
  40. #define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0)
  41. #define L1_DATA_A_LENGTH (0x8000 - 0x4000)
  42. #define L1_DATA_B_LENGTH 0x8000
  43. #define BFIN_DCACHESIZE (16*1024)
  44. #define BFIN_DSUPBANKS 1
  45. #else
  46. #define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0)
  47. #define L1_DATA_A_LENGTH (0x8000 - 0x4000)
  48. #define L1_DATA_B_LENGTH (0x8000 - 0x4000)
  49. #define BFIN_DCACHESIZE (32*1024)
  50. #define BFIN_DSUPBANKS 2
  51. #endif
  52. #else
  53. #define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0)
  54. #define L1_DATA_A_LENGTH 0x8000
  55. #define L1_DATA_B_LENGTH 0x8000
  56. #define BFIN_DCACHESIZE (0*1024)
  57. #define BFIN_DSUPBANKS 0
  58. #endif /*CONFIG_BFIN_DCACHE*/
  59. /* Level 2 Memory */
  60. #define L2_START 0xFEB00000
  61. #if defined(CONFIG_BF542)
  62. # define L2_LENGTH 0
  63. #elif defined(CONFIG_BF544)
  64. # define L2_LENGTH 0x10000
  65. #else
  66. # define L2_LENGTH 0x20000
  67. #endif
  68. #endif