dma.h 1.1 KB

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  1. /* mach/dma.h - arch-specific DMA defines
  2. *
  3. * Copyright 2004-2008 Analog Devices Inc.
  4. *
  5. * Licensed under the GPL-2 or later.
  6. */
  7. #ifndef _MACH_DMA_H_
  8. #define _MACH_DMA_H_
  9. #define CH_SPORT0_RX 0
  10. #define CH_SPORT0_TX 1
  11. #define CH_SPORT1_RX 2
  12. #define CH_SPORT1_TX 3
  13. #define CH_SPI0 4
  14. #define CH_SPI1 5
  15. #define CH_UART0_RX 6
  16. #define CH_UART0_TX 7
  17. #define CH_UART1_RX 8
  18. #define CH_UART1_TX 9
  19. #define CH_ATAPI_RX 10
  20. #define CH_ATAPI_TX 11
  21. #define CH_EPPI0 12
  22. #define CH_EPPI1 13
  23. #define CH_EPPI2 14
  24. #define CH_PIXC_IMAGE 15
  25. #define CH_PIXC_OVERLAY 16
  26. #define CH_PIXC_OUTPUT 17
  27. #define CH_SPORT2_RX 18
  28. #define CH_UART2_RX 18
  29. #define CH_SPORT2_TX 19
  30. #define CH_UART2_TX 19
  31. #define CH_SPORT3_RX 20
  32. #define CH_UART3_RX 20
  33. #define CH_SPORT3_TX 21
  34. #define CH_UART3_TX 21
  35. #define CH_SDH 22
  36. #define CH_NFC 22
  37. #define CH_SPI2 23
  38. #define CH_MEM_STREAM0_DEST 24
  39. #define CH_MEM_STREAM0_SRC 25
  40. #define CH_MEM_STREAM1_DEST 26
  41. #define CH_MEM_STREAM1_SRC 27
  42. #define CH_MEM_STREAM2_DEST 28
  43. #define CH_MEM_STREAM2_SRC 29
  44. #define CH_MEM_STREAM3_DEST 30
  45. #define CH_MEM_STREAM3_SRC 31
  46. #define MAX_DMA_CHANNELS 32
  47. #endif