pnav10.c 13 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/etherdevice.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  16. #include <linux/usb/isp1362.h>
  17. #endif
  18. #include <linux/irq.h>
  19. #include <asm/dma.h>
  20. #include <asm/bfin5xx_spi.h>
  21. #include <asm/portmux.h>
  22. #include <linux/usb/sl811.h>
  23. #include <linux/spi/ad7877.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "ADI PNAV-1.0";
  28. /*
  29. * Driver needs to know address, irq and flag pin.
  30. */
  31. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  32. static struct resource bfin_pcmcia_cf_resources[] = {
  33. {
  34. .start = 0x20310000, /* IO PORT */
  35. .end = 0x20312000,
  36. .flags = IORESOURCE_MEM,
  37. }, {
  38. .start = 0x20311000, /* Attribute Memory */
  39. .end = 0x20311FFF,
  40. .flags = IORESOURCE_MEM,
  41. }, {
  42. .start = IRQ_PF4,
  43. .end = IRQ_PF4,
  44. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  45. }, {
  46. .start = 6, /* Card Detect PF6 */
  47. .end = 6,
  48. .flags = IORESOURCE_IRQ,
  49. },
  50. };
  51. static struct platform_device bfin_pcmcia_cf_device = {
  52. .name = "bfin_cf_pcmcia",
  53. .id = -1,
  54. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  55. .resource = bfin_pcmcia_cf_resources,
  56. };
  57. #endif
  58. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  59. static struct platform_device rtc_device = {
  60. .name = "rtc-bfin",
  61. .id = -1,
  62. };
  63. #endif
  64. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  65. #include <linux/smc91x.h>
  66. static struct smc91x_platdata smc91x_info = {
  67. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  68. .leda = RPC_LED_100_10,
  69. .ledb = RPC_LED_TX_RX,
  70. };
  71. static struct resource smc91x_resources[] = {
  72. {
  73. .name = "smc91x-regs",
  74. .start = 0x20300300,
  75. .end = 0x20300300 + 16,
  76. .flags = IORESOURCE_MEM,
  77. }, {
  78. .start = IRQ_PF7,
  79. .end = IRQ_PF7,
  80. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  81. },
  82. };
  83. static struct platform_device smc91x_device = {
  84. .name = "smc91x",
  85. .id = 0,
  86. .num_resources = ARRAY_SIZE(smc91x_resources),
  87. .resource = smc91x_resources,
  88. .dev = {
  89. .platform_data = &smc91x_info,
  90. },
  91. };
  92. #endif
  93. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  94. static struct resource sl811_hcd_resources[] = {
  95. {
  96. .start = 0x20340000,
  97. .end = 0x20340000,
  98. .flags = IORESOURCE_MEM,
  99. }, {
  100. .start = 0x20340004,
  101. .end = 0x20340004,
  102. .flags = IORESOURCE_MEM,
  103. }, {
  104. .start = CONFIG_USB_SL811_BFIN_IRQ,
  105. .end = CONFIG_USB_SL811_BFIN_IRQ,
  106. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  107. },
  108. };
  109. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  110. void sl811_port_power(struct device *dev, int is_on)
  111. {
  112. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  113. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  114. }
  115. #endif
  116. static struct sl811_platform_data sl811_priv = {
  117. .potpg = 10,
  118. .power = 250, /* == 500mA */
  119. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  120. .port_power = &sl811_port_power,
  121. #endif
  122. };
  123. static struct platform_device sl811_hcd_device = {
  124. .name = "sl811-hcd",
  125. .id = 0,
  126. .dev = {
  127. .platform_data = &sl811_priv,
  128. },
  129. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  130. .resource = sl811_hcd_resources,
  131. };
  132. #endif
  133. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  134. static struct resource isp1362_hcd_resources[] = {
  135. {
  136. .start = 0x20360000,
  137. .end = 0x20360000,
  138. .flags = IORESOURCE_MEM,
  139. }, {
  140. .start = 0x20360004,
  141. .end = 0x20360004,
  142. .flags = IORESOURCE_MEM,
  143. }, {
  144. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  145. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  146. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  147. },
  148. };
  149. static struct isp1362_platform_data isp1362_priv = {
  150. .sel15Kres = 1,
  151. .clknotstop = 0,
  152. .oc_enable = 0,
  153. .int_act_high = 0,
  154. .int_edge_triggered = 0,
  155. .remote_wakeup_connected = 0,
  156. .no_power_switching = 1,
  157. .power_switching_mode = 0,
  158. };
  159. static struct platform_device isp1362_hcd_device = {
  160. .name = "isp1362-hcd",
  161. .id = 0,
  162. .dev = {
  163. .platform_data = &isp1362_priv,
  164. },
  165. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  166. .resource = isp1362_hcd_resources,
  167. };
  168. #endif
  169. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  170. static struct platform_device bfin_mii_bus = {
  171. .name = "bfin_mii_bus",
  172. };
  173. static struct platform_device bfin_mac_device = {
  174. .name = "bfin_mac",
  175. .dev.platform_data = &bfin_mii_bus,
  176. };
  177. #endif
  178. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  179. static struct resource net2272_bfin_resources[] = {
  180. {
  181. .start = 0x20300000,
  182. .end = 0x20300000 + 0x100,
  183. .flags = IORESOURCE_MEM,
  184. }, {
  185. .start = IRQ_PF7,
  186. .end = IRQ_PF7,
  187. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  188. },
  189. };
  190. static struct platform_device net2272_bfin_device = {
  191. .name = "net2272",
  192. .id = -1,
  193. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  194. .resource = net2272_bfin_resources,
  195. };
  196. #endif
  197. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  198. /* all SPI peripherals info goes here */
  199. #if defined(CONFIG_MTD_M25P80) \
  200. || defined(CONFIG_MTD_M25P80_MODULE)
  201. static struct mtd_partition bfin_spi_flash_partitions[] = {
  202. {
  203. .name = "bootloader(spi)",
  204. .size = 0x00020000,
  205. .offset = 0,
  206. .mask_flags = MTD_CAP_ROM
  207. }, {
  208. .name = "linux kernel(spi)",
  209. .size = 0xe0000,
  210. .offset = 0x20000
  211. }, {
  212. .name = "file system(spi)",
  213. .size = 0x700000,
  214. .offset = 0x00100000,
  215. }
  216. };
  217. static struct flash_platform_data bfin_spi_flash_data = {
  218. .name = "m25p80",
  219. .parts = bfin_spi_flash_partitions,
  220. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  221. .type = "m25p64",
  222. };
  223. /* SPI flash chip (m25p64) */
  224. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  225. .enable_dma = 0, /* use dma transfer with this chip*/
  226. .bits_per_word = 8,
  227. };
  228. #endif
  229. #if defined(CONFIG_BFIN_SPI_ADC) \
  230. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  231. /* SPI ADC chip */
  232. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  233. .enable_dma = 1, /* use dma transfer with this chip*/
  234. .bits_per_word = 16,
  235. };
  236. #endif
  237. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  238. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  239. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  240. .enable_dma = 0,
  241. .bits_per_word = 16,
  242. };
  243. #endif
  244. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  245. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  246. .enable_dma = 0,
  247. .bits_per_word = 8,
  248. };
  249. #endif
  250. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  251. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  252. .enable_dma = 0,
  253. .bits_per_word = 16,
  254. };
  255. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  256. .model = 7877,
  257. .vref_delay_usecs = 50, /* internal, no capacitor */
  258. .x_plate_ohms = 419,
  259. .y_plate_ohms = 486,
  260. .pressure_max = 1000,
  261. .pressure_min = 0,
  262. .stopacq_polarity = 1,
  263. .first_conversion_delay = 3,
  264. .acquisition_time = 1,
  265. .averaging = 1,
  266. .pen_down_acc_interval = 1,
  267. };
  268. #endif
  269. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  270. #if defined(CONFIG_MTD_M25P80) \
  271. || defined(CONFIG_MTD_M25P80_MODULE)
  272. {
  273. /* the modalias must be the same as spi device driver name */
  274. .modalias = "m25p80", /* Name of spi_driver for this device */
  275. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  276. .bus_num = 0, /* Framework bus number */
  277. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  278. .platform_data = &bfin_spi_flash_data,
  279. .controller_data = &spi_flash_chip_info,
  280. .mode = SPI_MODE_3,
  281. },
  282. #endif
  283. #if defined(CONFIG_BFIN_SPI_ADC) \
  284. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  285. {
  286. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  287. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  288. .bus_num = 0, /* Framework bus number */
  289. .chip_select = 1, /* Framework chip select. */
  290. .platform_data = NULL, /* No spi_driver specific config */
  291. .controller_data = &spi_adc_chip_info,
  292. },
  293. #endif
  294. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  295. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  296. {
  297. .modalias = "ad1836",
  298. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  299. .bus_num = 0,
  300. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  301. .controller_data = &ad1836_spi_chip_info,
  302. },
  303. #endif
  304. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  305. {
  306. .modalias = "mmc_spi",
  307. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  308. .bus_num = 0,
  309. .chip_select = 5,
  310. .controller_data = &mmc_spi_chip_info,
  311. .mode = SPI_MODE_3,
  312. },
  313. #endif
  314. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  315. {
  316. .modalias = "ad7877",
  317. .platform_data = &bfin_ad7877_ts_info,
  318. .irq = IRQ_PF2,
  319. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  320. .bus_num = 0,
  321. .chip_select = 5,
  322. .controller_data = &spi_ad7877_chip_info,
  323. },
  324. #endif
  325. };
  326. /* SPI (0) */
  327. static struct resource bfin_spi0_resource[] = {
  328. [0] = {
  329. .start = SPI0_REGBASE,
  330. .end = SPI0_REGBASE + 0xFF,
  331. .flags = IORESOURCE_MEM,
  332. },
  333. [1] = {
  334. .start = CH_SPI,
  335. .end = CH_SPI,
  336. .flags = IORESOURCE_DMA,
  337. },
  338. [2] = {
  339. .start = IRQ_SPI,
  340. .end = IRQ_SPI,
  341. .flags = IORESOURCE_IRQ,
  342. },
  343. };
  344. /* SPI controller data */
  345. static struct bfin5xx_spi_master bfin_spi0_info = {
  346. .num_chipselect = 8,
  347. .enable_dma = 1, /* master has the ability to do dma transfer */
  348. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  349. };
  350. static struct platform_device bfin_spi0_device = {
  351. .name = "bfin-spi",
  352. .id = 0, /* Bus number */
  353. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  354. .resource = bfin_spi0_resource,
  355. .dev = {
  356. .platform_data = &bfin_spi0_info, /* Passed to driver */
  357. },
  358. };
  359. #endif /* spi master and devices */
  360. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  361. static struct platform_device bfin_fb_device = {
  362. .name = "bf537-lq035",
  363. };
  364. #endif
  365. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  366. static struct resource bfin_uart_resources[] = {
  367. {
  368. .start = 0xFFC00400,
  369. .end = 0xFFC004FF,
  370. .flags = IORESOURCE_MEM,
  371. }, {
  372. .start = 0xFFC02000,
  373. .end = 0xFFC020FF,
  374. .flags = IORESOURCE_MEM,
  375. },
  376. };
  377. static struct platform_device bfin_uart_device = {
  378. .name = "bfin-uart",
  379. .id = 1,
  380. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  381. .resource = bfin_uart_resources,
  382. };
  383. #endif
  384. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  385. #ifdef CONFIG_BFIN_SIR0
  386. static struct resource bfin_sir0_resources[] = {
  387. {
  388. .start = 0xFFC00400,
  389. .end = 0xFFC004FF,
  390. .flags = IORESOURCE_MEM,
  391. },
  392. {
  393. .start = IRQ_UART0_RX,
  394. .end = IRQ_UART0_RX+1,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. {
  398. .start = CH_UART0_RX,
  399. .end = CH_UART0_RX+1,
  400. .flags = IORESOURCE_DMA,
  401. },
  402. };
  403. static struct platform_device bfin_sir0_device = {
  404. .name = "bfin_sir",
  405. .id = 0,
  406. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  407. .resource = bfin_sir0_resources,
  408. };
  409. #endif
  410. #ifdef CONFIG_BFIN_SIR1
  411. static struct resource bfin_sir1_resources[] = {
  412. {
  413. .start = 0xFFC02000,
  414. .end = 0xFFC020FF,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. {
  418. .start = IRQ_UART1_RX,
  419. .end = IRQ_UART1_RX+1,
  420. .flags = IORESOURCE_IRQ,
  421. },
  422. {
  423. .start = CH_UART1_RX,
  424. .end = CH_UART1_RX+1,
  425. .flags = IORESOURCE_DMA,
  426. },
  427. };
  428. static struct platform_device bfin_sir1_device = {
  429. .name = "bfin_sir",
  430. .id = 1,
  431. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  432. .resource = bfin_sir1_resources,
  433. };
  434. #endif
  435. #endif
  436. static struct platform_device *stamp_devices[] __initdata = {
  437. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  438. &bfin_pcmcia_cf_device,
  439. #endif
  440. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  441. &rtc_device,
  442. #endif
  443. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  444. &sl811_hcd_device,
  445. #endif
  446. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  447. &isp1362_hcd_device,
  448. #endif
  449. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  450. &smc91x_device,
  451. #endif
  452. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  453. &bfin_mii_bus,
  454. &bfin_mac_device,
  455. #endif
  456. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  457. &net2272_bfin_device,
  458. #endif
  459. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  460. &bfin_spi0_device,
  461. #endif
  462. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  463. &bfin_fb_device,
  464. #endif
  465. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  466. &bfin_uart_device,
  467. #endif
  468. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  469. #ifdef CONFIG_BFIN_SIR0
  470. &bfin_sir0_device,
  471. #endif
  472. #ifdef CONFIG_BFIN_SIR1
  473. &bfin_sir1_device,
  474. #endif
  475. #endif
  476. };
  477. static int __init pnav_init(void)
  478. {
  479. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  480. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  481. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  482. spi_register_board_info(bfin_spi_board_info,
  483. ARRAY_SIZE(bfin_spi_board_info));
  484. #endif
  485. return 0;
  486. }
  487. arch_initcall(pnav_init);
  488. void bfin_get_ether_addr(char *addr)
  489. {
  490. random_ether_addr(addr);
  491. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  492. }
  493. EXPORT_SYMBOL(bfin_get_ether_addr);