cm_bf537e.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691
  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/mtd/physmap.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <linux/ata_platform.h>
  21. #include <linux/irq.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. /*
  27. * Name the Board for the /proc/cpuinfo
  28. */
  29. const char bfin_board_name[] = "Bluetechnix CM BF537E";
  30. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  31. /* all SPI peripherals info goes here */
  32. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  33. static struct mtd_partition bfin_spi_flash_partitions[] = {
  34. {
  35. .name = "bootloader(spi)",
  36. .size = 0x00020000,
  37. .offset = 0,
  38. .mask_flags = MTD_CAP_ROM
  39. }, {
  40. .name = "linux kernel(spi)",
  41. .size = 0xe0000,
  42. .offset = 0x20000
  43. }, {
  44. .name = "file system(spi)",
  45. .size = 0x700000,
  46. .offset = 0x00100000,
  47. }
  48. };
  49. static struct flash_platform_data bfin_spi_flash_data = {
  50. .name = "m25p80",
  51. .parts = bfin_spi_flash_partitions,
  52. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  53. .type = "m25p64",
  54. };
  55. /* SPI flash chip (m25p64) */
  56. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  57. .enable_dma = 0, /* use dma transfer with this chip*/
  58. .bits_per_word = 8,
  59. };
  60. #endif
  61. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  62. /* SPI ADC chip */
  63. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  64. .enable_dma = 1, /* use dma transfer with this chip*/
  65. .bits_per_word = 16,
  66. };
  67. #endif
  68. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  69. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  70. .enable_dma = 0,
  71. .bits_per_word = 16,
  72. };
  73. #endif
  74. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  75. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  76. .enable_dma = 0,
  77. .bits_per_word = 8,
  78. };
  79. #endif
  80. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  81. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  82. {
  83. /* the modalias must be the same as spi device driver name */
  84. .modalias = "m25p80", /* Name of spi_driver for this device */
  85. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  86. .bus_num = 0, /* Framework bus number */
  87. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  88. .platform_data = &bfin_spi_flash_data,
  89. .controller_data = &spi_flash_chip_info,
  90. .mode = SPI_MODE_3,
  91. },
  92. #endif
  93. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  94. {
  95. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  96. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  97. .bus_num = 0, /* Framework bus number */
  98. .chip_select = 1, /* Framework chip select. */
  99. .platform_data = NULL, /* No spi_driver specific config */
  100. .controller_data = &spi_adc_chip_info,
  101. },
  102. #endif
  103. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  104. {
  105. .modalias = "ad1836",
  106. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  107. .bus_num = 0,
  108. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  109. .controller_data = &ad1836_spi_chip_info,
  110. },
  111. #endif
  112. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  113. {
  114. .modalias = "mmc_spi",
  115. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  116. .bus_num = 0,
  117. .chip_select = 1,
  118. .controller_data = &mmc_spi_chip_info,
  119. .mode = SPI_MODE_3,
  120. },
  121. #endif
  122. };
  123. /* SPI (0) */
  124. static struct resource bfin_spi0_resource[] = {
  125. [0] = {
  126. .start = SPI0_REGBASE,
  127. .end = SPI0_REGBASE + 0xFF,
  128. .flags = IORESOURCE_MEM,
  129. },
  130. [1] = {
  131. .start = CH_SPI,
  132. .end = CH_SPI,
  133. .flags = IORESOURCE_DMA,
  134. },
  135. [2] = {
  136. .start = IRQ_SPI,
  137. .end = IRQ_SPI,
  138. .flags = IORESOURCE_IRQ,
  139. },
  140. };
  141. /* SPI controller data */
  142. static struct bfin5xx_spi_master bfin_spi0_info = {
  143. .num_chipselect = 8,
  144. .enable_dma = 1, /* master has the ability to do dma transfer */
  145. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  146. };
  147. static struct platform_device bfin_spi0_device = {
  148. .name = "bfin-spi",
  149. .id = 0, /* Bus number */
  150. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  151. .resource = bfin_spi0_resource,
  152. .dev = {
  153. .platform_data = &bfin_spi0_info, /* Passed to driver */
  154. },
  155. };
  156. #endif /* spi master and devices */
  157. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  158. static struct platform_device rtc_device = {
  159. .name = "rtc-bfin",
  160. .id = -1,
  161. };
  162. #endif
  163. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  164. static struct platform_device hitachi_fb_device = {
  165. .name = "hitachi-tx09",
  166. };
  167. #endif
  168. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  169. #include <linux/smc91x.h>
  170. static struct smc91x_platdata smc91x_info = {
  171. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  172. .leda = RPC_LED_100_10,
  173. .ledb = RPC_LED_TX_RX,
  174. };
  175. static struct resource smc91x_resources[] = {
  176. {
  177. .start = 0x20200300,
  178. .end = 0x20200300 + 16,
  179. .flags = IORESOURCE_MEM,
  180. }, {
  181. .start = IRQ_PF14,
  182. .end = IRQ_PF14,
  183. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  184. },
  185. };
  186. static struct platform_device smc91x_device = {
  187. .name = "smc91x",
  188. .id = 0,
  189. .num_resources = ARRAY_SIZE(smc91x_resources),
  190. .resource = smc91x_resources,
  191. .dev = {
  192. .platform_data = &smc91x_info,
  193. },
  194. };
  195. #endif
  196. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  197. static struct resource isp1362_hcd_resources[] = {
  198. {
  199. .start = 0x20308000,
  200. .end = 0x20308000,
  201. .flags = IORESOURCE_MEM,
  202. }, {
  203. .start = 0x20308004,
  204. .end = 0x20308004,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = IRQ_PG15,
  208. .end = IRQ_PG15,
  209. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  210. },
  211. };
  212. static struct isp1362_platform_data isp1362_priv = {
  213. .sel15Kres = 1,
  214. .clknotstop = 0,
  215. .oc_enable = 0,
  216. .int_act_high = 0,
  217. .int_edge_triggered = 0,
  218. .remote_wakeup_connected = 0,
  219. .no_power_switching = 1,
  220. .power_switching_mode = 0,
  221. };
  222. static struct platform_device isp1362_hcd_device = {
  223. .name = "isp1362-hcd",
  224. .id = 0,
  225. .dev = {
  226. .platform_data = &isp1362_priv,
  227. },
  228. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  229. .resource = isp1362_hcd_resources,
  230. };
  231. #endif
  232. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  233. static struct resource net2272_bfin_resources[] = {
  234. {
  235. .start = 0x20300000,
  236. .end = 0x20300000 + 0x100,
  237. .flags = IORESOURCE_MEM,
  238. }, {
  239. .start = IRQ_PG13,
  240. .end = IRQ_PG13,
  241. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  242. },
  243. };
  244. static struct platform_device net2272_bfin_device = {
  245. .name = "net2272",
  246. .id = -1,
  247. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  248. .resource = net2272_bfin_resources,
  249. };
  250. #endif
  251. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  252. static struct mtd_partition cm_partitions[] = {
  253. {
  254. .name = "bootloader(nor)",
  255. .size = 0x40000,
  256. .offset = 0,
  257. }, {
  258. .name = "linux kernel(nor)",
  259. .size = 0x100000,
  260. .offset = MTDPART_OFS_APPEND,
  261. }, {
  262. .name = "file system(nor)",
  263. .size = MTDPART_SIZ_FULL,
  264. .offset = MTDPART_OFS_APPEND,
  265. }
  266. };
  267. static struct physmap_flash_data cm_flash_data = {
  268. .width = 2,
  269. .parts = cm_partitions,
  270. .nr_parts = ARRAY_SIZE(cm_partitions),
  271. };
  272. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  273. static struct resource cm_flash_resource[] = {
  274. {
  275. .name = "cfi_probe",
  276. .start = 0x20000000,
  277. .end = 0x201fffff,
  278. .flags = IORESOURCE_MEM,
  279. }, {
  280. .start = (unsigned long)cm_flash_gpios,
  281. .end = ARRAY_SIZE(cm_flash_gpios),
  282. .flags = IORESOURCE_IRQ,
  283. }
  284. };
  285. static struct platform_device cm_flash_device = {
  286. .name = "gpio-addr-flash",
  287. .id = 0,
  288. .dev = {
  289. .platform_data = &cm_flash_data,
  290. },
  291. .num_resources = ARRAY_SIZE(cm_flash_resource),
  292. .resource = cm_flash_resource,
  293. };
  294. #endif
  295. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  296. #ifdef CONFIG_SERIAL_BFIN_UART0
  297. static struct resource bfin_uart0_resources[] = {
  298. {
  299. .start = 0xFFC00400,
  300. .end = 0xFFC004FF,
  301. .flags = IORESOURCE_MEM,
  302. },
  303. {
  304. .start = IRQ_UART0_RX,
  305. .end = IRQ_UART0_RX+1,
  306. .flags = IORESOURCE_IRQ,
  307. },
  308. {
  309. .start = IRQ_UART0_ERROR,
  310. .end = IRQ_UART0_ERROR,
  311. .flags = IORESOURCE_IRQ,
  312. },
  313. {
  314. .start = CH_UART0_TX,
  315. .end = CH_UART0_TX,
  316. .flags = IORESOURCE_DMA,
  317. },
  318. {
  319. .start = CH_UART0_RX,
  320. .end = CH_UART0_RX,
  321. .flags = IORESOURCE_DMA,
  322. },
  323. #ifdef CONFIG_BFIN_UART0_CTSRTS
  324. {
  325. /*
  326. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  327. */
  328. .start = -1,
  329. .end = -1,
  330. .flags = IORESOURCE_IO,
  331. },
  332. {
  333. /*
  334. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  335. */
  336. .start = -1,
  337. .end = -1,
  338. .flags = IORESOURCE_IO,
  339. },
  340. #endif
  341. };
  342. static struct platform_device bfin_uart0_device = {
  343. .name = "bfin-uart",
  344. .id = 0,
  345. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  346. .resource = bfin_uart0_resources,
  347. };
  348. #endif
  349. #ifdef CONFIG_SERIAL_BFIN_UART1
  350. static struct resource bfin_uart1_resources[] = {
  351. {
  352. .start = 0xFFC02000,
  353. .end = 0xFFC020FF,
  354. .flags = IORESOURCE_MEM,
  355. },
  356. {
  357. .start = IRQ_UART1_RX,
  358. .end = IRQ_UART1_RX+1,
  359. .flags = IORESOURCE_IRQ,
  360. },
  361. {
  362. .start = IRQ_UART1_ERROR,
  363. .end = IRQ_UART1_ERROR,
  364. .flags = IORESOURCE_IRQ,
  365. },
  366. {
  367. .start = CH_UART1_TX,
  368. .end = CH_UART1_TX,
  369. .flags = IORESOURCE_DMA,
  370. },
  371. {
  372. .start = CH_UART1_RX,
  373. .end = CH_UART1_RX,
  374. .flags = IORESOURCE_DMA,
  375. },
  376. #ifdef CONFIG_BFIN_UART1_CTSRTS
  377. {
  378. /*
  379. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  380. */
  381. .start = -1,
  382. .end = -1,
  383. .flags = IORESOURCE_IO,
  384. },
  385. {
  386. /*
  387. * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
  388. */
  389. .start = -1,
  390. .end = -1,
  391. .flags = IORESOURCE_IO,
  392. },
  393. #endif
  394. };
  395. static struct platform_device bfin_uart1_device = {
  396. .name = "bfin-uart",
  397. .id = 1,
  398. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  399. .resource = bfin_uart1_resources,
  400. };
  401. #endif
  402. #endif
  403. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  404. #ifdef CONFIG_BFIN_SIR0
  405. static struct resource bfin_sir0_resources[] = {
  406. {
  407. .start = 0xFFC00400,
  408. .end = 0xFFC004FF,
  409. .flags = IORESOURCE_MEM,
  410. },
  411. {
  412. .start = IRQ_UART0_RX,
  413. .end = IRQ_UART0_RX+1,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. {
  417. .start = CH_UART0_RX,
  418. .end = CH_UART0_RX+1,
  419. .flags = IORESOURCE_DMA,
  420. },
  421. };
  422. static struct platform_device bfin_sir0_device = {
  423. .name = "bfin_sir",
  424. .id = 0,
  425. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  426. .resource = bfin_sir0_resources,
  427. };
  428. #endif
  429. #ifdef CONFIG_BFIN_SIR1
  430. static struct resource bfin_sir1_resources[] = {
  431. {
  432. .start = 0xFFC02000,
  433. .end = 0xFFC020FF,
  434. .flags = IORESOURCE_MEM,
  435. },
  436. {
  437. .start = IRQ_UART1_RX,
  438. .end = IRQ_UART1_RX+1,
  439. .flags = IORESOURCE_IRQ,
  440. },
  441. {
  442. .start = CH_UART1_RX,
  443. .end = CH_UART1_RX+1,
  444. .flags = IORESOURCE_DMA,
  445. },
  446. };
  447. static struct platform_device bfin_sir1_device = {
  448. .name = "bfin_sir",
  449. .id = 1,
  450. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  451. .resource = bfin_sir1_resources,
  452. };
  453. #endif
  454. #endif
  455. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  456. static struct resource bfin_twi0_resource[] = {
  457. [0] = {
  458. .start = TWI0_REGBASE,
  459. .end = TWI0_REGBASE,
  460. .flags = IORESOURCE_MEM,
  461. },
  462. [1] = {
  463. .start = IRQ_TWI,
  464. .end = IRQ_TWI,
  465. .flags = IORESOURCE_IRQ,
  466. },
  467. };
  468. static struct platform_device i2c_bfin_twi_device = {
  469. .name = "i2c-bfin-twi",
  470. .id = 0,
  471. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  472. .resource = bfin_twi0_resource,
  473. };
  474. #endif
  475. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  476. static struct platform_device bfin_sport0_uart_device = {
  477. .name = "bfin-sport-uart",
  478. .id = 0,
  479. };
  480. static struct platform_device bfin_sport1_uart_device = {
  481. .name = "bfin-sport-uart",
  482. .id = 1,
  483. };
  484. #endif
  485. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  486. static struct platform_device bfin_mii_bus = {
  487. .name = "bfin_mii_bus",
  488. };
  489. static struct platform_device bfin_mac_device = {
  490. .name = "bfin_mac",
  491. .dev.platform_data = &bfin_mii_bus,
  492. };
  493. #endif
  494. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  495. #define PATA_INT IRQ_PF14
  496. static struct pata_platform_info bfin_pata_platform_data = {
  497. .ioport_shift = 2,
  498. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  499. };
  500. static struct resource bfin_pata_resources[] = {
  501. {
  502. .start = 0x2030C000,
  503. .end = 0x2030C01F,
  504. .flags = IORESOURCE_MEM,
  505. },
  506. {
  507. .start = 0x2030D018,
  508. .end = 0x2030D01B,
  509. .flags = IORESOURCE_MEM,
  510. },
  511. {
  512. .start = PATA_INT,
  513. .end = PATA_INT,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. };
  517. static struct platform_device bfin_pata_device = {
  518. .name = "pata_platform",
  519. .id = -1,
  520. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  521. .resource = bfin_pata_resources,
  522. .dev = {
  523. .platform_data = &bfin_pata_platform_data,
  524. }
  525. };
  526. #endif
  527. static const unsigned int cclk_vlev_datasheet[] =
  528. {
  529. VRPAIR(VLEV_085, 250000000),
  530. VRPAIR(VLEV_090, 376000000),
  531. VRPAIR(VLEV_095, 426000000),
  532. VRPAIR(VLEV_100, 426000000),
  533. VRPAIR(VLEV_105, 476000000),
  534. VRPAIR(VLEV_110, 476000000),
  535. VRPAIR(VLEV_115, 476000000),
  536. VRPAIR(VLEV_120, 500000000),
  537. VRPAIR(VLEV_125, 533000000),
  538. VRPAIR(VLEV_130, 600000000),
  539. };
  540. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  541. .tuple_tab = cclk_vlev_datasheet,
  542. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  543. .vr_settling_time = 25 /* us */,
  544. };
  545. static struct platform_device bfin_dpmc = {
  546. .name = "bfin dpmc",
  547. .dev = {
  548. .platform_data = &bfin_dmpc_vreg_data,
  549. },
  550. };
  551. static struct platform_device *cm_bf537e_devices[] __initdata = {
  552. &bfin_dpmc,
  553. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  554. &hitachi_fb_device,
  555. #endif
  556. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  557. &rtc_device,
  558. #endif
  559. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  560. #ifdef CONFIG_SERIAL_BFIN_UART0
  561. &bfin_uart0_device,
  562. #endif
  563. #ifdef CONFIG_SERIAL_BFIN_UART1
  564. &bfin_uart1_device,
  565. #endif
  566. #endif
  567. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  568. #ifdef CONFIG_BFIN_SIR0
  569. &bfin_sir0_device,
  570. #endif
  571. #ifdef CONFIG_BFIN_SIR1
  572. &bfin_sir1_device,
  573. #endif
  574. #endif
  575. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  576. &i2c_bfin_twi_device,
  577. #endif
  578. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  579. &bfin_sport0_uart_device,
  580. &bfin_sport1_uart_device,
  581. #endif
  582. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  583. &isp1362_hcd_device,
  584. #endif
  585. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  586. &smc91x_device,
  587. #endif
  588. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  589. &bfin_mii_bus,
  590. &bfin_mac_device,
  591. #endif
  592. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  593. &net2272_bfin_device,
  594. #endif
  595. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  596. &bfin_spi0_device,
  597. #endif
  598. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  599. &bfin_pata_device,
  600. #endif
  601. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  602. &cm_flash_device,
  603. #endif
  604. };
  605. static int __init cm_bf537e_init(void)
  606. {
  607. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  608. platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
  609. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  610. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  611. #endif
  612. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  613. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  614. #endif
  615. return 0;
  616. }
  617. arch_initcall(cm_bf537e_init);
  618. void bfin_get_ether_addr(char *addr)
  619. {
  620. random_ether_addr(addr);
  621. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  622. }
  623. EXPORT_SYMBOL(bfin_get_ether_addr);