bfin_gpio.c 30 KB

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  1. /*
  2. * GPIO Abstraction Layer
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later
  7. */
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <linux/err.h>
  11. #include <linux/proc_fs.h>
  12. #include <asm/blackfin.h>
  13. #include <asm/gpio.h>
  14. #include <asm/portmux.h>
  15. #include <linux/irq.h>
  16. #if ANOMALY_05000311 || ANOMALY_05000323
  17. enum {
  18. AWA_data = SYSCR,
  19. AWA_data_clear = SYSCR,
  20. AWA_data_set = SYSCR,
  21. AWA_toggle = SYSCR,
  22. AWA_maska = BFIN_UART_SCR,
  23. AWA_maska_clear = BFIN_UART_SCR,
  24. AWA_maska_set = BFIN_UART_SCR,
  25. AWA_maska_toggle = BFIN_UART_SCR,
  26. AWA_maskb = BFIN_UART_GCTL,
  27. AWA_maskb_clear = BFIN_UART_GCTL,
  28. AWA_maskb_set = BFIN_UART_GCTL,
  29. AWA_maskb_toggle = BFIN_UART_GCTL,
  30. AWA_dir = SPORT1_STAT,
  31. AWA_polar = SPORT1_STAT,
  32. AWA_edge = SPORT1_STAT,
  33. AWA_both = SPORT1_STAT,
  34. #if ANOMALY_05000311
  35. AWA_inen = TIMER_ENABLE,
  36. #elif ANOMALY_05000323
  37. AWA_inen = DMA1_1_CONFIG,
  38. #endif
  39. };
  40. /* Anomaly Workaround */
  41. #define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
  42. #else
  43. #define AWA_DUMMY_READ(...) do { } while (0)
  44. #endif
  45. static struct gpio_port_t * const gpio_array[] = {
  46. #if defined(BF533_FAMILY) || defined(BF538_FAMILY)
  47. (struct gpio_port_t *) FIO_FLAG_D,
  48. #elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  49. (struct gpio_port_t *) PORTFIO,
  50. (struct gpio_port_t *) PORTGIO,
  51. (struct gpio_port_t *) PORTHIO,
  52. #elif defined(BF561_FAMILY)
  53. (struct gpio_port_t *) FIO0_FLAG_D,
  54. (struct gpio_port_t *) FIO1_FLAG_D,
  55. (struct gpio_port_t *) FIO2_FLAG_D,
  56. #elif defined(CONFIG_BF54x)
  57. (struct gpio_port_t *)PORTA_FER,
  58. (struct gpio_port_t *)PORTB_FER,
  59. (struct gpio_port_t *)PORTC_FER,
  60. (struct gpio_port_t *)PORTD_FER,
  61. (struct gpio_port_t *)PORTE_FER,
  62. (struct gpio_port_t *)PORTF_FER,
  63. (struct gpio_port_t *)PORTG_FER,
  64. (struct gpio_port_t *)PORTH_FER,
  65. (struct gpio_port_t *)PORTI_FER,
  66. (struct gpio_port_t *)PORTJ_FER,
  67. #else
  68. # error no gpio arrays defined
  69. #endif
  70. };
  71. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  72. static unsigned short * const port_fer[] = {
  73. (unsigned short *) PORTF_FER,
  74. (unsigned short *) PORTG_FER,
  75. (unsigned short *) PORTH_FER,
  76. };
  77. # if !defined(BF537_FAMILY)
  78. static unsigned short * const port_mux[] = {
  79. (unsigned short *) PORTF_MUX,
  80. (unsigned short *) PORTG_MUX,
  81. (unsigned short *) PORTH_MUX,
  82. };
  83. static const
  84. u8 pmux_offset[][16] = {
  85. # if defined(CONFIG_BF52x)
  86. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
  87. { 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
  88. { 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
  89. # elif defined(CONFIG_BF51x)
  90. { 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
  91. { 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
  92. { 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
  93. # endif
  94. };
  95. # endif
  96. #endif
  97. static unsigned short reserved_gpio_map[GPIO_BANK_NUM];
  98. static unsigned short reserved_peri_map[gpio_bank(MAX_RESOURCES)];
  99. static unsigned short reserved_gpio_irq_map[GPIO_BANK_NUM];
  100. #define RESOURCE_LABEL_SIZE 16
  101. static struct str_ident {
  102. char name[RESOURCE_LABEL_SIZE];
  103. } str_ident[MAX_RESOURCES];
  104. #if defined(CONFIG_PM)
  105. static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
  106. #endif
  107. inline int check_gpio(unsigned gpio)
  108. {
  109. #if defined(CONFIG_BF54x)
  110. if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
  111. || gpio == GPIO_PH14 || gpio == GPIO_PH15
  112. || gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
  113. return -EINVAL;
  114. #endif
  115. if (gpio >= MAX_BLACKFIN_GPIOS)
  116. return -EINVAL;
  117. return 0;
  118. }
  119. static void gpio_error(unsigned gpio)
  120. {
  121. printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
  122. }
  123. static void set_label(unsigned short ident, const char *label)
  124. {
  125. if (label) {
  126. strncpy(str_ident[ident].name, label,
  127. RESOURCE_LABEL_SIZE);
  128. str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
  129. }
  130. }
  131. static char *get_label(unsigned short ident)
  132. {
  133. return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
  134. }
  135. static int cmp_label(unsigned short ident, const char *label)
  136. {
  137. if (label == NULL) {
  138. dump_stack();
  139. printk(KERN_ERR "Please provide none-null label\n");
  140. }
  141. if (label)
  142. return strcmp(str_ident[ident].name, label);
  143. else
  144. return -EINVAL;
  145. }
  146. static void port_setup(unsigned gpio, unsigned short usage)
  147. {
  148. if (check_gpio(gpio))
  149. return;
  150. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  151. if (usage == GPIO_USAGE)
  152. *port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  153. else
  154. *port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
  155. SSYNC();
  156. #elif defined(CONFIG_BF54x)
  157. if (usage == GPIO_USAGE)
  158. gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
  159. else
  160. gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
  161. SSYNC();
  162. #endif
  163. }
  164. #ifdef BF537_FAMILY
  165. static struct {
  166. unsigned short res;
  167. unsigned short offset;
  168. } port_mux_lut[] = {
  169. {.res = P_PPI0_D13, .offset = 11},
  170. {.res = P_PPI0_D14, .offset = 11},
  171. {.res = P_PPI0_D15, .offset = 11},
  172. {.res = P_SPORT1_TFS, .offset = 11},
  173. {.res = P_SPORT1_TSCLK, .offset = 11},
  174. {.res = P_SPORT1_DTPRI, .offset = 11},
  175. {.res = P_PPI0_D10, .offset = 10},
  176. {.res = P_PPI0_D11, .offset = 10},
  177. {.res = P_PPI0_D12, .offset = 10},
  178. {.res = P_SPORT1_RSCLK, .offset = 10},
  179. {.res = P_SPORT1_RFS, .offset = 10},
  180. {.res = P_SPORT1_DRPRI, .offset = 10},
  181. {.res = P_PPI0_D8, .offset = 9},
  182. {.res = P_PPI0_D9, .offset = 9},
  183. {.res = P_SPORT1_DRSEC, .offset = 9},
  184. {.res = P_SPORT1_DTSEC, .offset = 9},
  185. {.res = P_TMR2, .offset = 8},
  186. {.res = P_PPI0_FS3, .offset = 8},
  187. {.res = P_TMR3, .offset = 7},
  188. {.res = P_SPI0_SSEL4, .offset = 7},
  189. {.res = P_TMR4, .offset = 6},
  190. {.res = P_SPI0_SSEL5, .offset = 6},
  191. {.res = P_TMR5, .offset = 5},
  192. {.res = P_SPI0_SSEL6, .offset = 5},
  193. {.res = P_UART1_RX, .offset = 4},
  194. {.res = P_UART1_TX, .offset = 4},
  195. {.res = P_TMR6, .offset = 4},
  196. {.res = P_TMR7, .offset = 4},
  197. {.res = P_UART0_RX, .offset = 3},
  198. {.res = P_UART0_TX, .offset = 3},
  199. {.res = P_DMAR0, .offset = 3},
  200. {.res = P_DMAR1, .offset = 3},
  201. {.res = P_SPORT0_DTSEC, .offset = 1},
  202. {.res = P_SPORT0_DRSEC, .offset = 1},
  203. {.res = P_CAN0_RX, .offset = 1},
  204. {.res = P_CAN0_TX, .offset = 1},
  205. {.res = P_SPI0_SSEL7, .offset = 1},
  206. {.res = P_SPORT0_TFS, .offset = 0},
  207. {.res = P_SPORT0_DTPRI, .offset = 0},
  208. {.res = P_SPI0_SSEL2, .offset = 0},
  209. {.res = P_SPI0_SSEL3, .offset = 0},
  210. };
  211. static void portmux_setup(unsigned short per)
  212. {
  213. u16 y, offset, muxreg;
  214. u16 function = P_FUNCT2MUX(per);
  215. for (y = 0; y < ARRAY_SIZE(port_mux_lut); y++) {
  216. if (port_mux_lut[y].res == per) {
  217. /* SET PORTMUX REG */
  218. offset = port_mux_lut[y].offset;
  219. muxreg = bfin_read_PORT_MUX();
  220. if (offset != 1)
  221. muxreg &= ~(1 << offset);
  222. else
  223. muxreg &= ~(3 << 1);
  224. muxreg |= (function << offset);
  225. bfin_write_PORT_MUX(muxreg);
  226. }
  227. }
  228. }
  229. #elif defined(CONFIG_BF54x)
  230. inline void portmux_setup(unsigned short per)
  231. {
  232. u32 pmux;
  233. u16 ident = P_IDENT(per);
  234. u16 function = P_FUNCT2MUX(per);
  235. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  236. pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
  237. pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
  238. gpio_array[gpio_bank(ident)]->port_mux = pmux;
  239. }
  240. inline u16 get_portmux(unsigned short per)
  241. {
  242. u32 pmux;
  243. u16 ident = P_IDENT(per);
  244. pmux = gpio_array[gpio_bank(ident)]->port_mux;
  245. return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
  246. }
  247. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  248. inline void portmux_setup(unsigned short per)
  249. {
  250. u16 pmux, ident = P_IDENT(per), function = P_FUNCT2MUX(per);
  251. u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
  252. pmux = *port_mux[gpio_bank(ident)];
  253. pmux &= ~(3 << offset);
  254. pmux |= (function & 3) << offset;
  255. *port_mux[gpio_bank(ident)] = pmux;
  256. SSYNC();
  257. }
  258. #else
  259. # define portmux_setup(...) do { } while (0)
  260. #endif
  261. #ifndef CONFIG_BF54x
  262. /***********************************************************
  263. *
  264. * FUNCTIONS: Blackfin General Purpose Ports Access Functions
  265. *
  266. * INPUTS/OUTPUTS:
  267. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  268. *
  269. *
  270. * DESCRIPTION: These functions abstract direct register access
  271. * to Blackfin processor General Purpose
  272. * Ports Regsiters
  273. *
  274. * CAUTION: These functions do not belong to the GPIO Driver API
  275. *************************************************************
  276. * MODIFICATION HISTORY :
  277. **************************************************************/
  278. /* Set a specific bit */
  279. #define SET_GPIO(name) \
  280. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  281. { \
  282. unsigned long flags; \
  283. local_irq_save_hw(flags); \
  284. if (arg) \
  285. gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
  286. else \
  287. gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
  288. AWA_DUMMY_READ(name); \
  289. local_irq_restore_hw(flags); \
  290. } \
  291. EXPORT_SYMBOL(set_gpio_ ## name);
  292. SET_GPIO(dir) /* set_gpio_dir() */
  293. SET_GPIO(inen) /* set_gpio_inen() */
  294. SET_GPIO(polar) /* set_gpio_polar() */
  295. SET_GPIO(edge) /* set_gpio_edge() */
  296. SET_GPIO(both) /* set_gpio_both() */
  297. #define SET_GPIO_SC(name) \
  298. void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
  299. { \
  300. unsigned long flags; \
  301. if (ANOMALY_05000311 || ANOMALY_05000323) \
  302. local_irq_save_hw(flags); \
  303. if (arg) \
  304. gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
  305. else \
  306. gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
  307. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  308. AWA_DUMMY_READ(name); \
  309. local_irq_restore_hw(flags); \
  310. } \
  311. } \
  312. EXPORT_SYMBOL(set_gpio_ ## name);
  313. SET_GPIO_SC(maska)
  314. SET_GPIO_SC(maskb)
  315. SET_GPIO_SC(data)
  316. void set_gpio_toggle(unsigned gpio)
  317. {
  318. unsigned long flags;
  319. if (ANOMALY_05000311 || ANOMALY_05000323)
  320. local_irq_save_hw(flags);
  321. gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
  322. if (ANOMALY_05000311 || ANOMALY_05000323) {
  323. AWA_DUMMY_READ(toggle);
  324. local_irq_restore_hw(flags);
  325. }
  326. }
  327. EXPORT_SYMBOL(set_gpio_toggle);
  328. /*Set current PORT date (16-bit word)*/
  329. #define SET_GPIO_P(name) \
  330. void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
  331. { \
  332. unsigned long flags; \
  333. if (ANOMALY_05000311 || ANOMALY_05000323) \
  334. local_irq_save_hw(flags); \
  335. gpio_array[gpio_bank(gpio)]->name = arg; \
  336. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  337. AWA_DUMMY_READ(name); \
  338. local_irq_restore_hw(flags); \
  339. } \
  340. } \
  341. EXPORT_SYMBOL(set_gpiop_ ## name);
  342. SET_GPIO_P(data)
  343. SET_GPIO_P(dir)
  344. SET_GPIO_P(inen)
  345. SET_GPIO_P(polar)
  346. SET_GPIO_P(edge)
  347. SET_GPIO_P(both)
  348. SET_GPIO_P(maska)
  349. SET_GPIO_P(maskb)
  350. /* Get a specific bit */
  351. #define GET_GPIO(name) \
  352. unsigned short get_gpio_ ## name(unsigned gpio) \
  353. { \
  354. unsigned long flags; \
  355. unsigned short ret; \
  356. if (ANOMALY_05000311 || ANOMALY_05000323) \
  357. local_irq_save_hw(flags); \
  358. ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
  359. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  360. AWA_DUMMY_READ(name); \
  361. local_irq_restore_hw(flags); \
  362. } \
  363. return ret; \
  364. } \
  365. EXPORT_SYMBOL(get_gpio_ ## name);
  366. GET_GPIO(data)
  367. GET_GPIO(dir)
  368. GET_GPIO(inen)
  369. GET_GPIO(polar)
  370. GET_GPIO(edge)
  371. GET_GPIO(both)
  372. GET_GPIO(maska)
  373. GET_GPIO(maskb)
  374. /*Get current PORT date (16-bit word)*/
  375. #define GET_GPIO_P(name) \
  376. unsigned short get_gpiop_ ## name(unsigned gpio) \
  377. { \
  378. unsigned long flags; \
  379. unsigned short ret; \
  380. if (ANOMALY_05000311 || ANOMALY_05000323) \
  381. local_irq_save_hw(flags); \
  382. ret = (gpio_array[gpio_bank(gpio)]->name); \
  383. if (ANOMALY_05000311 || ANOMALY_05000323) { \
  384. AWA_DUMMY_READ(name); \
  385. local_irq_restore_hw(flags); \
  386. } \
  387. return ret; \
  388. } \
  389. EXPORT_SYMBOL(get_gpiop_ ## name);
  390. GET_GPIO_P(data)
  391. GET_GPIO_P(dir)
  392. GET_GPIO_P(inen)
  393. GET_GPIO_P(polar)
  394. GET_GPIO_P(edge)
  395. GET_GPIO_P(both)
  396. GET_GPIO_P(maska)
  397. GET_GPIO_P(maskb)
  398. #ifdef CONFIG_PM
  399. static unsigned short wakeup_map[GPIO_BANK_NUM];
  400. static unsigned char wakeup_flags_map[MAX_BLACKFIN_GPIOS];
  401. static const unsigned int sic_iwr_irqs[] = {
  402. #if defined(BF533_FAMILY)
  403. IRQ_PROG_INTB
  404. #elif defined(BF537_FAMILY)
  405. IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
  406. #elif defined(BF538_FAMILY)
  407. IRQ_PORTF_INTB
  408. #elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  409. IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
  410. #elif defined(BF561_FAMILY)
  411. IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
  412. #else
  413. # error no SIC_IWR defined
  414. #endif
  415. };
  416. /***********************************************************
  417. *
  418. * FUNCTIONS: Blackfin PM Setup API
  419. *
  420. * INPUTS/OUTPUTS:
  421. * gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
  422. * type -
  423. * PM_WAKE_RISING
  424. * PM_WAKE_FALLING
  425. * PM_WAKE_HIGH
  426. * PM_WAKE_LOW
  427. * PM_WAKE_BOTH_EDGES
  428. *
  429. * DESCRIPTION: Blackfin PM Driver API
  430. *
  431. * CAUTION:
  432. *************************************************************
  433. * MODIFICATION HISTORY :
  434. **************************************************************/
  435. int gpio_pm_wakeup_request(unsigned gpio, unsigned char type)
  436. {
  437. unsigned long flags;
  438. if ((check_gpio(gpio) < 0) || !type)
  439. return -EINVAL;
  440. local_irq_save_hw(flags);
  441. wakeup_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  442. wakeup_flags_map[gpio] = type;
  443. local_irq_restore_hw(flags);
  444. return 0;
  445. }
  446. EXPORT_SYMBOL(gpio_pm_wakeup_request);
  447. void gpio_pm_wakeup_free(unsigned gpio)
  448. {
  449. unsigned long flags;
  450. if (check_gpio(gpio) < 0)
  451. return;
  452. local_irq_save_hw(flags);
  453. wakeup_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  454. local_irq_restore_hw(flags);
  455. }
  456. EXPORT_SYMBOL(gpio_pm_wakeup_free);
  457. static int bfin_gpio_wakeup_type(unsigned gpio, unsigned char type)
  458. {
  459. port_setup(gpio, GPIO_USAGE);
  460. set_gpio_dir(gpio, 0);
  461. set_gpio_inen(gpio, 1);
  462. if (type & (PM_WAKE_RISING | PM_WAKE_FALLING))
  463. set_gpio_edge(gpio, 1);
  464. else
  465. set_gpio_edge(gpio, 0);
  466. if ((type & (PM_WAKE_BOTH_EDGES)) == (PM_WAKE_BOTH_EDGES))
  467. set_gpio_both(gpio, 1);
  468. else
  469. set_gpio_both(gpio, 0);
  470. if ((type & (PM_WAKE_FALLING | PM_WAKE_LOW)))
  471. set_gpio_polar(gpio, 1);
  472. else
  473. set_gpio_polar(gpio, 0);
  474. SSYNC();
  475. return 0;
  476. }
  477. u32 bfin_pm_standby_setup(void)
  478. {
  479. u16 bank, mask, i, gpio;
  480. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  481. mask = wakeup_map[gpio_bank(i)];
  482. bank = gpio_bank(i);
  483. gpio_bank_saved[bank].maskb = gpio_array[bank]->maskb;
  484. gpio_array[bank]->maskb = 0;
  485. if (mask) {
  486. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  487. gpio_bank_saved[bank].fer = *port_fer[bank];
  488. #endif
  489. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  490. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  491. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  492. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  493. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  494. gpio_bank_saved[bank].reserved =
  495. reserved_gpio_map[bank];
  496. gpio = i;
  497. while (mask) {
  498. if ((mask & 1) && (wakeup_flags_map[gpio] !=
  499. PM_WAKE_IGNORE)) {
  500. reserved_gpio_map[gpio_bank(gpio)] |=
  501. gpio_bit(gpio);
  502. bfin_gpio_wakeup_type(gpio,
  503. wakeup_flags_map[gpio]);
  504. set_gpio_data(gpio, 0); /*Clear*/
  505. }
  506. gpio++;
  507. mask >>= 1;
  508. }
  509. bfin_internal_set_wake(sic_iwr_irqs[bank], 1);
  510. gpio_array[bank]->maskb_set = wakeup_map[gpio_bank(i)];
  511. }
  512. }
  513. AWA_DUMMY_READ(maskb_set);
  514. return 0;
  515. }
  516. void bfin_pm_standby_restore(void)
  517. {
  518. u16 bank, mask, i;
  519. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  520. mask = wakeup_map[gpio_bank(i)];
  521. bank = gpio_bank(i);
  522. if (mask) {
  523. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  524. *port_fer[bank] = gpio_bank_saved[bank].fer;
  525. #endif
  526. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  527. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  528. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  529. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  530. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  531. reserved_gpio_map[bank] =
  532. gpio_bank_saved[bank].reserved;
  533. bfin_internal_set_wake(sic_iwr_irqs[bank], 0);
  534. }
  535. gpio_array[bank]->maskb = gpio_bank_saved[bank].maskb;
  536. }
  537. AWA_DUMMY_READ(maskb);
  538. }
  539. void bfin_gpio_pm_hibernate_suspend(void)
  540. {
  541. int i, bank;
  542. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  543. bank = gpio_bank(i);
  544. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  545. gpio_bank_saved[bank].fer = *port_fer[bank];
  546. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  547. gpio_bank_saved[bank].mux = *port_mux[bank];
  548. #else
  549. if (bank == 0)
  550. gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
  551. #endif
  552. #endif
  553. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  554. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  555. gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
  556. gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
  557. gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
  558. gpio_bank_saved[bank].both = gpio_array[bank]->both;
  559. gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
  560. }
  561. AWA_DUMMY_READ(maska);
  562. }
  563. void bfin_gpio_pm_hibernate_restore(void)
  564. {
  565. int i, bank;
  566. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  567. bank = gpio_bank(i);
  568. #if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
  569. #if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
  570. *port_mux[bank] = gpio_bank_saved[bank].mux;
  571. #else
  572. if (bank == 0)
  573. bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
  574. #endif
  575. *port_fer[bank] = gpio_bank_saved[bank].fer;
  576. #endif
  577. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  578. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  579. & gpio_bank_saved[bank].dir;
  580. gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
  581. gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
  582. gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
  583. gpio_array[bank]->both = gpio_bank_saved[bank].both;
  584. gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
  585. }
  586. AWA_DUMMY_READ(maska);
  587. }
  588. #endif
  589. #else /* CONFIG_BF54x */
  590. #ifdef CONFIG_PM
  591. u32 bfin_pm_standby_setup(void)
  592. {
  593. return 0;
  594. }
  595. void bfin_pm_standby_restore(void)
  596. {
  597. }
  598. void bfin_gpio_pm_hibernate_suspend(void)
  599. {
  600. int i, bank;
  601. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  602. bank = gpio_bank(i);
  603. gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
  604. gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
  605. gpio_bank_saved[bank].data = gpio_array[bank]->data;
  606. gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
  607. gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
  608. }
  609. }
  610. void bfin_gpio_pm_hibernate_restore(void)
  611. {
  612. int i, bank;
  613. for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
  614. bank = gpio_bank(i);
  615. gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
  616. gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
  617. gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
  618. gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
  619. gpio_array[bank]->data_set = gpio_bank_saved[bank].data
  620. | gpio_bank_saved[bank].dir;
  621. }
  622. }
  623. #endif
  624. unsigned short get_gpio_dir(unsigned gpio)
  625. {
  626. return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
  627. }
  628. EXPORT_SYMBOL(get_gpio_dir);
  629. #endif /* CONFIG_BF54x */
  630. /***********************************************************
  631. *
  632. * FUNCTIONS: Blackfin Peripheral Resource Allocation
  633. * and PortMux Setup
  634. *
  635. * INPUTS/OUTPUTS:
  636. * per Peripheral Identifier
  637. * label String
  638. *
  639. * DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
  640. *
  641. * CAUTION:
  642. *************************************************************
  643. * MODIFICATION HISTORY :
  644. **************************************************************/
  645. int peripheral_request(unsigned short per, const char *label)
  646. {
  647. unsigned long flags;
  648. unsigned short ident = P_IDENT(per);
  649. /*
  650. * Don't cares are pins with only one dedicated function
  651. */
  652. if (per & P_DONTCARE)
  653. return 0;
  654. if (!(per & P_DEFINED))
  655. return -ENODEV;
  656. local_irq_save_hw(flags);
  657. /* If a pin can be muxed as either GPIO or peripheral, make
  658. * sure it is not already a GPIO pin when we request it.
  659. */
  660. if (unlikely(!check_gpio(ident) &&
  661. reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
  662. if (system_state == SYSTEM_BOOTING)
  663. dump_stack();
  664. printk(KERN_ERR
  665. "%s: Peripheral %d is already reserved as GPIO by %s !\n",
  666. __func__, ident, get_label(ident));
  667. local_irq_restore_hw(flags);
  668. return -EBUSY;
  669. }
  670. if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
  671. /*
  672. * Pin functions like AMC address strobes my
  673. * be requested and used by several drivers
  674. */
  675. #ifdef CONFIG_BF54x
  676. if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
  677. #else
  678. if (!(per & P_MAYSHARE)) {
  679. #endif
  680. /*
  681. * Allow that the identical pin function can
  682. * be requested from the same driver twice
  683. */
  684. if (cmp_label(ident, label) == 0)
  685. goto anyway;
  686. if (system_state == SYSTEM_BOOTING)
  687. dump_stack();
  688. printk(KERN_ERR
  689. "%s: Peripheral %d function %d is already reserved by %s !\n",
  690. __func__, ident, P_FUNCT2MUX(per), get_label(ident));
  691. local_irq_restore_hw(flags);
  692. return -EBUSY;
  693. }
  694. }
  695. anyway:
  696. reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
  697. portmux_setup(per);
  698. port_setup(ident, PERIPHERAL_USAGE);
  699. local_irq_restore_hw(flags);
  700. set_label(ident, label);
  701. return 0;
  702. }
  703. EXPORT_SYMBOL(peripheral_request);
  704. int peripheral_request_list(const unsigned short per[], const char *label)
  705. {
  706. u16 cnt;
  707. int ret;
  708. for (cnt = 0; per[cnt] != 0; cnt++) {
  709. ret = peripheral_request(per[cnt], label);
  710. if (ret < 0) {
  711. for ( ; cnt > 0; cnt--)
  712. peripheral_free(per[cnt - 1]);
  713. return ret;
  714. }
  715. }
  716. return 0;
  717. }
  718. EXPORT_SYMBOL(peripheral_request_list);
  719. void peripheral_free(unsigned short per)
  720. {
  721. unsigned long flags;
  722. unsigned short ident = P_IDENT(per);
  723. if (per & P_DONTCARE)
  724. return;
  725. if (!(per & P_DEFINED))
  726. return;
  727. local_irq_save_hw(flags);
  728. if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
  729. local_irq_restore_hw(flags);
  730. return;
  731. }
  732. if (!(per & P_MAYSHARE))
  733. port_setup(ident, GPIO_USAGE);
  734. reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
  735. set_label(ident, "free");
  736. local_irq_restore_hw(flags);
  737. }
  738. EXPORT_SYMBOL(peripheral_free);
  739. void peripheral_free_list(const unsigned short per[])
  740. {
  741. u16 cnt;
  742. for (cnt = 0; per[cnt] != 0; cnt++)
  743. peripheral_free(per[cnt]);
  744. }
  745. EXPORT_SYMBOL(peripheral_free_list);
  746. /***********************************************************
  747. *
  748. * FUNCTIONS: Blackfin GPIO Driver
  749. *
  750. * INPUTS/OUTPUTS:
  751. * gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
  752. * label String
  753. *
  754. * DESCRIPTION: Blackfin GPIO Driver API
  755. *
  756. * CAUTION:
  757. *************************************************************
  758. * MODIFICATION HISTORY :
  759. **************************************************************/
  760. int bfin_gpio_request(unsigned gpio, const char *label)
  761. {
  762. unsigned long flags;
  763. if (check_gpio(gpio) < 0)
  764. return -EINVAL;
  765. local_irq_save_hw(flags);
  766. /*
  767. * Allow that the identical GPIO can
  768. * be requested from the same driver twice
  769. * Do nothing and return -
  770. */
  771. if (cmp_label(gpio, label) == 0) {
  772. local_irq_restore_hw(flags);
  773. return 0;
  774. }
  775. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  776. if (system_state == SYSTEM_BOOTING)
  777. dump_stack();
  778. printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
  779. gpio, get_label(gpio));
  780. local_irq_restore_hw(flags);
  781. return -EBUSY;
  782. }
  783. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  784. if (system_state == SYSTEM_BOOTING)
  785. dump_stack();
  786. printk(KERN_ERR
  787. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  788. gpio, get_label(gpio));
  789. local_irq_restore_hw(flags);
  790. return -EBUSY;
  791. }
  792. if (unlikely(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  793. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
  794. " (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
  795. }
  796. #ifndef CONFIG_BF54x
  797. else { /* Reset POLAR setting when acquiring a gpio for the first time */
  798. set_gpio_polar(gpio, 0);
  799. }
  800. #endif
  801. reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  802. set_label(gpio, label);
  803. local_irq_restore_hw(flags);
  804. port_setup(gpio, GPIO_USAGE);
  805. return 0;
  806. }
  807. EXPORT_SYMBOL(bfin_gpio_request);
  808. void bfin_gpio_free(unsigned gpio)
  809. {
  810. unsigned long flags;
  811. if (check_gpio(gpio) < 0)
  812. return;
  813. might_sleep();
  814. local_irq_save_hw(flags);
  815. if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  816. if (system_state == SYSTEM_BOOTING)
  817. dump_stack();
  818. gpio_error(gpio);
  819. local_irq_restore_hw(flags);
  820. return;
  821. }
  822. reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  823. set_label(gpio, "free");
  824. local_irq_restore_hw(flags);
  825. }
  826. EXPORT_SYMBOL(bfin_gpio_free);
  827. int bfin_gpio_irq_request(unsigned gpio, const char *label)
  828. {
  829. unsigned long flags;
  830. if (check_gpio(gpio) < 0)
  831. return -EINVAL;
  832. local_irq_save_hw(flags);
  833. if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  834. if (system_state == SYSTEM_BOOTING)
  835. dump_stack();
  836. printk(KERN_ERR
  837. "bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
  838. gpio, get_label(gpio));
  839. local_irq_restore_hw(flags);
  840. return -EBUSY;
  841. }
  842. if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))
  843. printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
  844. "(Documentation/blackfin/bfin-gpio-notes.txt)\n",
  845. gpio, get_label(gpio));
  846. reserved_gpio_irq_map[gpio_bank(gpio)] |= gpio_bit(gpio);
  847. set_label(gpio, label);
  848. local_irq_restore_hw(flags);
  849. port_setup(gpio, GPIO_USAGE);
  850. return 0;
  851. }
  852. void bfin_gpio_irq_free(unsigned gpio)
  853. {
  854. unsigned long flags;
  855. if (check_gpio(gpio) < 0)
  856. return;
  857. local_irq_save_hw(flags);
  858. if (unlikely(!(reserved_gpio_irq_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
  859. if (system_state == SYSTEM_BOOTING)
  860. dump_stack();
  861. gpio_error(gpio);
  862. local_irq_restore_hw(flags);
  863. return;
  864. }
  865. reserved_gpio_irq_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
  866. set_label(gpio, "free");
  867. local_irq_restore_hw(flags);
  868. }
  869. static inline void __bfin_gpio_direction_input(unsigned gpio)
  870. {
  871. #ifdef CONFIG_BF54x
  872. gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
  873. #else
  874. gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
  875. #endif
  876. gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
  877. }
  878. int bfin_gpio_direction_input(unsigned gpio)
  879. {
  880. unsigned long flags;
  881. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  882. gpio_error(gpio);
  883. return -EINVAL;
  884. }
  885. local_irq_save_hw(flags);
  886. __bfin_gpio_direction_input(gpio);
  887. AWA_DUMMY_READ(inen);
  888. local_irq_restore_hw(flags);
  889. return 0;
  890. }
  891. EXPORT_SYMBOL(bfin_gpio_direction_input);
  892. void bfin_gpio_irq_prepare(unsigned gpio)
  893. {
  894. #ifdef CONFIG_BF54x
  895. unsigned long flags;
  896. #endif
  897. port_setup(gpio, GPIO_USAGE);
  898. #ifdef CONFIG_BF54x
  899. local_irq_save_hw(flags);
  900. __bfin_gpio_direction_input(gpio);
  901. local_irq_restore_hw(flags);
  902. #endif
  903. }
  904. void bfin_gpio_set_value(unsigned gpio, int arg)
  905. {
  906. if (arg)
  907. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  908. else
  909. gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
  910. }
  911. EXPORT_SYMBOL(bfin_gpio_set_value);
  912. int bfin_gpio_direction_output(unsigned gpio, int value)
  913. {
  914. unsigned long flags;
  915. if (!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
  916. gpio_error(gpio);
  917. return -EINVAL;
  918. }
  919. local_irq_save_hw(flags);
  920. gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
  921. gpio_set_value(gpio, value);
  922. #ifdef CONFIG_BF54x
  923. gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
  924. #else
  925. gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
  926. #endif
  927. AWA_DUMMY_READ(dir);
  928. local_irq_restore_hw(flags);
  929. return 0;
  930. }
  931. EXPORT_SYMBOL(bfin_gpio_direction_output);
  932. int bfin_gpio_get_value(unsigned gpio)
  933. {
  934. #ifdef CONFIG_BF54x
  935. return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
  936. #else
  937. unsigned long flags;
  938. if (unlikely(get_gpio_edge(gpio))) {
  939. int ret;
  940. local_irq_save_hw(flags);
  941. set_gpio_edge(gpio, 0);
  942. ret = get_gpio_data(gpio);
  943. set_gpio_edge(gpio, 1);
  944. local_irq_restore_hw(flags);
  945. return ret;
  946. } else
  947. return get_gpio_data(gpio);
  948. #endif
  949. }
  950. EXPORT_SYMBOL(bfin_gpio_get_value);
  951. /* If we are booting from SPI and our board lacks a strong enough pull up,
  952. * the core can reset and execute the bootrom faster than the resistor can
  953. * pull the signal logically high. To work around this (common) error in
  954. * board design, we explicitly set the pin back to GPIO mode, force /CS
  955. * high, and wait for the electrons to do their thing.
  956. *
  957. * This function only makes sense to be called from reset code, but it
  958. * lives here as we need to force all the GPIO states w/out going through
  959. * BUG() checks and such.
  960. */
  961. void bfin_reset_boot_spi_cs(unsigned short pin)
  962. {
  963. unsigned short gpio = P_IDENT(pin);
  964. port_setup(gpio, GPIO_USAGE);
  965. gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
  966. AWA_DUMMY_READ(data_set);
  967. udelay(1);
  968. }
  969. #if defined(CONFIG_PROC_FS)
  970. static int gpio_proc_read(char *buf, char **start, off_t offset,
  971. int len, int *unused_i, void *unused_v)
  972. {
  973. int c, irq, gpio, outlen = 0;
  974. for (c = 0; c < MAX_RESOURCES; c++) {
  975. irq = reserved_gpio_irq_map[gpio_bank(c)] & gpio_bit(c);
  976. gpio = reserved_gpio_map[gpio_bank(c)] & gpio_bit(c);
  977. if (!check_gpio(c) && (gpio || irq))
  978. len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
  979. get_label(c), (gpio && irq) ? " *" : "",
  980. get_gpio_dir(c) ? "OUTPUT" : "INPUT");
  981. else if (reserved_peri_map[gpio_bank(c)] & gpio_bit(c))
  982. len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
  983. else
  984. continue;
  985. buf += len;
  986. outlen += len;
  987. }
  988. return outlen;
  989. }
  990. static __init int gpio_register_proc(void)
  991. {
  992. struct proc_dir_entry *proc_gpio;
  993. proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
  994. if (proc_gpio)
  995. proc_gpio->read_proc = gpio_proc_read;
  996. return proc_gpio != NULL;
  997. }
  998. __initcall(gpio_register_proc);
  999. #endif
  1000. #ifdef CONFIG_GPIOLIB
  1001. int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
  1002. {
  1003. return bfin_gpio_direction_input(gpio);
  1004. }
  1005. int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
  1006. {
  1007. return bfin_gpio_direction_output(gpio, level);
  1008. }
  1009. int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
  1010. {
  1011. return bfin_gpio_get_value(gpio);
  1012. }
  1013. void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
  1014. {
  1015. return bfin_gpio_set_value(gpio, value);
  1016. }
  1017. int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
  1018. {
  1019. return bfin_gpio_request(gpio, chip->label);
  1020. }
  1021. void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
  1022. {
  1023. return bfin_gpio_free(gpio);
  1024. }
  1025. static struct gpio_chip bfin_chip = {
  1026. .label = "Blackfin-GPIOlib",
  1027. .direction_input = bfin_gpiolib_direction_input,
  1028. .get = bfin_gpiolib_get_value,
  1029. .direction_output = bfin_gpiolib_direction_output,
  1030. .set = bfin_gpiolib_set_value,
  1031. .request = bfin_gpiolib_gpio_request,
  1032. .free = bfin_gpiolib_gpio_free,
  1033. .base = 0,
  1034. .ngpio = MAX_BLACKFIN_GPIOS,
  1035. };
  1036. static int __init bfin_gpiolib_setup(void)
  1037. {
  1038. return gpiochip_add(&bfin_chip);
  1039. }
  1040. arch_initcall(bfin_gpiolib_setup);
  1041. #endif