cpu.c 2.7 KB

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  1. /* linux/arch/arm/plat-s5pc1xx/cpu.c
  2. *
  3. * Copyright 2009 Samsung Electronics Co.
  4. * Byungho Min <bhmin@samsung.com>
  5. *
  6. * S5PC1XX CPU Support
  7. *
  8. * Based on plat-s3c64xx/cpu.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/ioport.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <mach/hardware.h>
  22. #include <mach/map.h>
  23. #include <asm/mach/map.h>
  24. #include <plat/regs-serial.h>
  25. #include <plat/cpu.h>
  26. #include <plat/devs.h>
  27. #include <plat/clock.h>
  28. #include <plat/s5pc100.h>
  29. /* table of supported CPUs */
  30. static const char name_s5pc100[] = "S5PC100";
  31. static struct cpu_table cpu_ids[] __initdata = {
  32. {
  33. .idcode = 0x43100000,
  34. .idmask = 0xfffff000,
  35. .map_io = s5pc100_map_io,
  36. .init_clocks = s5pc100_init_clocks,
  37. .init_uarts = s5pc100_init_uarts,
  38. .init = s5pc100_init,
  39. .name = name_s5pc100,
  40. },
  41. };
  42. /* minimal IO mapping */
  43. /* see notes on uart map in arch/arm/mach-s5pc100/include/mach/debug-macro.S */
  44. #define UART_OFFS (S3C_PA_UART & 0xffff)
  45. static struct map_desc s5pc1xx_iodesc[] __initdata = {
  46. {
  47. .virtual = (unsigned long)S5PC1XX_VA_CHIPID,
  48. .pfn = __phys_to_pfn(S5PC1XX_PA_CHIPID),
  49. .length = SZ_16,
  50. .type = MT_DEVICE,
  51. }, {
  52. .virtual = (unsigned long)S5PC1XX_VA_CLK,
  53. .pfn = __phys_to_pfn(S5PC1XX_PA_CLK),
  54. .length = SZ_4K,
  55. .type = MT_DEVICE,
  56. }, {
  57. .virtual = (unsigned long)S5PC1XX_VA_PWR,
  58. .pfn = __phys_to_pfn(S5PC1XX_PA_PWR),
  59. .length = SZ_4K,
  60. .type = MT_DEVICE,
  61. }, {
  62. .virtual = (unsigned long)(S5PC1XX_VA_UART),
  63. .pfn = __phys_to_pfn(S5PC1XX_PA_UART),
  64. .length = SZ_4K,
  65. .type = MT_DEVICE,
  66. }, {
  67. .virtual = (unsigned long)S5PC1XX_VA_VIC(0),
  68. .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(0)),
  69. .length = SZ_4K,
  70. .type = MT_DEVICE,
  71. }, {
  72. .virtual = (unsigned long)S5PC1XX_VA_VIC(1),
  73. .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(1)),
  74. .length = SZ_4K,
  75. .type = MT_DEVICE,
  76. }, {
  77. .virtual = (unsigned long)S5PC1XX_VA_VIC(2),
  78. .pfn = __phys_to_pfn(S5PC1XX_PA_VIC(2)),
  79. .length = SZ_4K,
  80. .type = MT_DEVICE,
  81. }, {
  82. .virtual = (unsigned long)S5PC1XX_VA_TIMER,
  83. .pfn = __phys_to_pfn(S5PC1XX_PA_TIMER),
  84. .length = SZ_256,
  85. .type = MT_DEVICE,
  86. },
  87. };
  88. /* read cpu identification code */
  89. void __init s5pc1xx_init_io(struct map_desc *mach_desc, int size)
  90. {
  91. unsigned long idcode;
  92. /* initialise the io descriptors we need for initialisation */
  93. iotable_init(s5pc1xx_iodesc, ARRAY_SIZE(s5pc1xx_iodesc));
  94. iotable_init(mach_desc, size);
  95. idcode = __raw_readl(S5PC1XX_VA_CHIPID);
  96. s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
  97. }